DVCCCTA-Based Implementation of Mutually Coupled Circuit

This paper presents implementation of mutually coupled circuit using differential voltage current-controlled conveyor transconductance amplifier (DVCCCTA). It employs only two DVCCCTAs, one grounded resistor, and two grounded capacitors. The primary, secondary, and mutual inductances of the circuit can be independently controlled and tuned electronically. The effect of non-ideal behaviour of DVCCCTA on the proposed circuit is analyzed. The functionality of the proposed circuit is verified through SPICE simulation using 0.25 μm TSMC CMOS technology parameters.


Introduction
Since the beginning of current-mode circuit concept, a lot of research has been directed towards the development of active inductance and immittance simulator circuits. A limited literature is available on active realizations (simulators) of mutually coupled circuit (MCC). The MCC is characterized by primary inductance, secondary inductance, mutual inductance, and the coupling factor. The MCC simulators can be integrated easily and have reduced possibility of magnetic interference due to absence of inductive components. Also, there exists a possibility of tunability of inductance values along with the coupling coefficient. Considering this, some MCC simulators have recently been reported in literature that uses different active building blocks [1][2][3][4][5][6][7][8].
In this paper, a new DVCCCTA- [9] based MCC is proposed that uses Gorski Popiel Technique [10]. It is floating in nature and uses only two DVCCCTAs, one resistor, and two grounded capacitors. The primary inductance (L 1 ), secondary inductance (L 2 ), and mutual inductance (M) can be electronically and independently controlled. The effect of nonideal behaviour of DVCCCTA on the proposed circuit is discussed. The functionality of the proposed circuit is tested under open-circuit condition. Its performance is exhibited by connecting it as a double-tuned band pass filter by using two additional resistors and two capacitors. The theoretical proposition has been verified with SPICE simulations using the parameters of 0.25 μm TSMC CMOS Technology.

Circuit Description
2.1. DVCCCTA. The DVCCCTA [9] is based on differential voltage current conveyor transconductance amplifier (DVC-CTA) [11] and consists of differential amplifier, translinear loop and transconductance amplifier. The port relationships of the DVCCCTA as shown in Figure 1 can be characterized by the following matrix: where R X is the intrinsic resistance at X terminal and g m is the transconductance from Z terminal to O terminal of the DVCCCTA. The CMOS-based internal circuit of DVCCCTA [9] in CMOS is depicted in Figure 2. The values of R X and g m depend on bias currents I B1 and I B2 , respectively, which may be expressed as 2μ n C ox (W/L) 18,19 I B1 + 2μ p C ox (W/L) 16,17 I B1 , g m = μ n C ox (W/L) 24,25 I B2 . (3)

DVCCCTA-Based Floating Mutually Coupled Circuit.
In this section, firstly the port equations for a floating MCC are stated. Then, Gorski Popiel technique is outlined which is followed by realieation of the proposed DVCCCTA-based floating mutually coupled circuit.

Floating Mutually Coupled Circuit.
A floating MCC is shown in Figure 3(a) and is functionally represented as where L P = L 1 + M 11 and L S = L 2 + M 22 , and M 12 and M 21 represent mutual inductances of MCC. Alternately, (4) can be represented as Representing the voltages V 1F − V 3F and V 2F − V 3F as V 1D and V 2D , respectively, (5) reduces to V 1D = s(L 1 + M 11 )I 1 + sM 12 I 2 , Equation (6) can be represented pictorially in Figure 3(b) which can be realized using Gorski Popiel technique [10] described in the following section. [10]. This technique is generalization of inductor simulation method and uses generalized impedance converter (GIC). The GICs are circuits whose input impedance can be changed by appropriate selection of components and load. A simplified pictorial representation of GIC is shown in Figure 4. The characteristic equation of GIC may be written as

Gorski Popiel Technique
where T represents time constant of GIC. In Figure 5, a GIC connected to a resistor in input branch makes the input impedance inductive. The value of the inductance would be TR. This technique implies that a resistive network embedded in GICs appears like an inductive network of same topology with the inductance matrix L i = TR i . Thus it allows replacement of complete inductor networks by similar resistive networks rather than treating each inductor separately. Thus, this technique can be easily applied to T-shaped resistive network to get the mutually coupled circuit as shown in Figure 6.

Proposed Floating Mutually Coupled Circuit.
The method outlined in preceding section can be used for floating MCC realization if the voltages V 1 and V 2 (Figure 6) represent differential voltage as shown in Figure 7. The DVCCCTA, being capable of processing differential inputs through Y 1 and Y 2 terminals, can be used to implement floating mutually coupled circuit.
The proposed floating MCC circuit is shown in Figure 8 where each DVCCCTA realizes GIC block (sT : 1) and a series resistance. Thus the circuit uses X-port resistances of 1st and 2nd DVCCCTA for realization of inductances L 1 and L 2 whereas resistance R M provides mutual coupling. The analysis of the circuit in Figure 8 gives where , R Xi and g mi represent intrinsic X-port resistance and transconductance of ith DVCCCTA.  Figure 2: CMOS implementation of DVCCCTA [9].    Using (3) and (6), the values of various inductances L 1 , L 2 , M 11 , M 22 , M 12 , and M 21 can be computed as For symmetrical coupling, M 12 = M 21 = M. Assuming g m1 = g m2 = g m , and C 1 = C 2 = C, the inductances become  Figure 7: Floating MCC implementation using Gorski Popiel Technique. The coefficient of coupling (k) can be computed as The resistance R M being grounded can easily be implemented with MOS transistor [12]. Thus, the inductances of MCC as well as coefficient of coupling can be electronically tuned.

Non-Ideal Analysis.
The frequency performance of the proposed MCC may deviate from the ideal one due to nonidealities. The DVCCCTA nonidealities may be categorized in two groups. The first comes from nonunity internal current and voltage transfers in DVCCCTA. The modified port relationships may be written in matrix form as follows: where the voltage transfer functions β 1 = 1 − ε v1 and β 2 = 1 − ε v2 . The ε v1 and ε v2 denote voltage tracking errors where equal values of α, β, and γ are assumed for both DVCCCTAs. Equation (9) clearly indicates that the nonunity voltage and current transfer functions of DVCCCTA affect various inductances. Apart from having non-unity values, the current and voltage transfer functions also have poles at high frequencies. Their effect on proposed MCC performance can however be ignored if the operating frequencies are chosen sufficiently smaller than voltage and current transfer pole frequencies of the DVCCCTA. The second group of nonidealities comes from parasitics of DVCCCTA comprising of resistances and capacitances connected in parallel at terminals Y 1, Y 2, Z, and O (i.e., R Y 1 , The effects of these parasitics on filter response depend strongly on circuit topology. In the proposed structure, the external capacitor appears in parallel to the parasitic capacitor, the effect of these may be accommodated by preadjusting the external capacitor value.

Simulation Results
To verify the functionality of the proposed DVCCCTAbased MCC, SPICE simulations have been carried out using TSMC 0.25 μm CMOS process model parameters and power supplies of V DD = −V SS = 1.25 V and V BB = 0.8 V. The aspect ratios of various transistors of DVCCCTA (Figure 2) are listed in Table 1. Firstly, the proposed circuit is tested under the open-circuit condition, that is, I 2 = 0, so the ratio between the secondary and the primary voltage can be expressed as Equation (14) Mutually coupled circuit will be frequency independent. The open circuit is tested for bias currents I B1 and I B2 taken as 10 μA and 160 μA, respectively, for both DVCCCTA. The values of C 1 , C 2 , and R M are 10 pF, 10 pF, and 1.33 kΩ, respectively. The simulation result as shown in Figure 9 confirms the relation between V out and V in .
To illustrate an application of proposed mutually coupled circuit, a double-tuned circuit is constructed as shown in Figure 10. The primary and secondary side resonance frequencies ( f P and f S ) and quality factors (Q P and Q S ) can be obtained as , The performance of the double-tuned circuit is tested with following component values: R P = R S = 11 kΩ; C P = C S = 20 pF; for proposed MCC: R M = 1.33 kΩ, C 1 = C 2 = 10 pF. The bias current I B1 and I B2 are selected as 10 μA and 160 μA, respectively, so as to provide R X1 = R X2 as 2 kΩ and 1/g m1 = 1/g m2 as 1.  electronic tunability is demonstrated by varying bias current I B2 of both the DVCCCTAs from 10 μA to 250 μA and the simulation results are shown in Figure 12.
To study the time domain behaviour of the double-tuned circuit ( Figure 10), a sinusoidal signal of 300 mV amplitude and frequency of 5.035 MHz is applied as input. The transient response is depicted in Figure 13 which shows that ideal and simulated responses are in close approximation. The power consumption of the circuit was 2.77 mW. The double-tuned circuit is also tested to judge the level of harmonic distortion at the output of the signal. The %THD result is shown in Figure 14 which shows that the output distortion is low and within 3% up to about 800 mV.

Conclusion
In this paper, DVCCCTA-based circuit for simulation of floating mutually coupled circuit has been presented. The proposed circuit uses only two DVCCCTAs, one grounded resistor, and two grounded capacitors. The primary and 6 ISRN Electronics  secondary inductances of the circuit can be independently controlled and tuned electronically via bias currents of DVCCCTAs whereas mutual coupling can be adjusted via grounded resistor. This resistor can be realized with MOS transistors. The nonideal analysis of circuit is included and as an application a double-tuned circuit is simulated.