The paper presents and discusses an algorithm for average modeling of the PWM modulator in switch-mode power systems by general purpose electronic circuit simulators such as PSPICE. A comparison with previous theoretical models is conducted. To test the accuracy of the average PWM models comparison to cycle-by-cycle simulation was conducted. The proposed algorithm shows better accuracy than earlier counterparts.

Today circuit simulation and computer-aided design are universally accepted engineering tools and have become industry standard method of product development. Two approaches are possible for simulation of switched mode systems: cycle-by-cycle simulation and average behavior simulation. Cycle-by-cycle simulation is a quite straightforward approach. Cycle-by-cycle simulation can be performed programming the complete power electronic circuit to the simulator. Cycle-by-cycle simulation allows studding the power stage at the switching frequency scale and observing the instantaneous voltages and currents at any point in the circuit. First disadvantage of cycle-by-cycle simulation is that simulating the detailed switching process is time consuming. This is particularly true for nontrivial practical cases. The second and by far more important limitation is that the cycle-by-cycle model of a switching circuit does not lend itself to frequency response analysis. This is because the switching stage has no stable operating point and, hence, does not allow the PSPICE simulator to perform linearization and calculate the small signal gains required for frequency response analysis. Therefore, a different approach is needed to attain frequency domain simulation of the control loop.

State Space Averaging is a classical theoretical analysis method of switch-mode power electronics systems [

The distinct characteristic of SMPS is that a switched-mode stage is employed as power processor, whereas the control circuits are mostly analog where Pulse Width Modulator (PWM) is used as an interface. A typical structure of a PWM switch-mode power system (SMPS) is illustrated in Figure

A typical ACM SMPS. Modeling the SMPS requires the SIM to model the power stage and the DCG to model the PWM [

This paper proposes a more precise, PSPICE compatible, average DCG algorithm for modeling the PWM comparator. The operation of the proposed average PWM model is demonstrated by time domain and frequency domain simulations. The paper also conducts a comparison with previously reported results. To validate the model’s accuracy, the proposed average algorithm and its earlier counterparts are compared to cycle-by-cycle simulation. Particularly, in the discontinuous current mode the proposed algorithm shows better accuracy than earlier counterparts.

In recent years ACM control has become the method of choice for many advanced SMPS. The principle of ACM is to implement a multiloop control system in which the inner loop (see Figure

Usually, the average current loop amplifier (CA) is designed to have a high/low-frequency gain and a flat response in the vicinity of the switching frequency as shown in Figure

The inner loop amplifier, CA, frequency response.

PWM comparator input waveforms in DCM (a) and CCM (b) modes.

Referring to Figures

Let the external, charging, and discharging slopes of PWM comparator input signals (see Figure

The intersection instance of current error amplifier and the ramp voltages (see Figure

The required on duty cycle,

The proposed software DCG algorithm (

Inspection of (

DCG based on (

Considering that the power stage is operating with slow varying signals in the vicinity of the CCM steady-state equilibrium so that

For a CA amplifier with a significant attenuation of the switching ripple,

Algorithms (

The modulator model (

Implementation of (

Here, the constant

A different programming approach is required in order to apply the nonlinear DCG algorithms (

Due to its relative complexity, the proposed DCG implementation (

As suggested by [

In order to compare the performance of the previously described software duty cycle generator algorithms, a PSPICE simulation program was created. The program simulated the time domain response of an ACM dc-dc boost converter in DCM and CCM regimes. Simulation diagram of the circuit is shown in Figure

Simulation diagram of the ACM Boost converter (a): simulated waveforms of the instantaneous inductor current IL, instantaneous normalized ramp voltage VrampN, instantaneous normalized current programming voltage VcpN, cycle-by-cycle duty cycle

The simulated waveforms of the key variables in both the DCM and the CCM modes are shown in Figures

Next, a complete model of the inner loop of an ACM Boost PFC converter based on benchmark design [

PSPICE simulation diagram of the Average Current mode APFC current loop (a); Simulation of the current loop frequency responses (b); time domain waveforms of the scaled line voltage Vline/100 and line current

The paper presented a PSPICE software algorithm for modeling the average behavior of PWM modulator in switch-mode systems. The proposed duty cycle algorithm describes the PWM function in both CCM and DCM operating modes and correctly predicts the duty cycle under any operating conditions. Comparison with previously published results supports the theoretical validity of the proposed approach. The proposed average PWM model (

Energy transfer in hard switched power converters is accomplished by periodic charging and discharging of an inductor. The topology of the switched inductor is shown in Figure

The topology of the switched inductor in PWM converters (a); and the Switched Inductor Model (SIM) equivalent circuit (b) [

SIM derives the average inductor current applying an average voltage,

The physical feature of current steering between the terminals

To implement (

Definition of the inductor discharge duty cycle Doff: CCM mode (a) and the DCM (b).

In the case of DCM, however (see Figure

The DCM

As a result, PSPICE is able to identify CCM-DCM mode changes and calculate the correct