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An engineering change orders design using multiple variable linear programming for VLSI design is presented in this paper. This approach addresses the main issues of resource between spare cells and target cells. We adopt linear programming technique to plan and balance the spare cells and target cells to meet the new specification according to logic transformation. The proposed method solves the related problem of resource for ECO problems and provides a well solution. The scheme shows new concept to manage the spare cells to meet possible target cells for ECO research.

Engineering change orders (ECO) are important technologies used for changes in integrated circuit (IC) layout and compensate for design problems. Traditionally, when chip shows errors, it often requires new photomasks for all layers. However, photomasks of deep-submicron semiconductor fabrication process are very expensive. In order to save money, ECO technology modifies only a few of the metal layers (metal-mask ECO) to reduce the cost of photomasks for all layers [

To perform the ECO, IC designers adopt sprinkling many unused logic gates during IC design flow. When chip is manufactured and shows design errors, IC designers modify the gate-level net-list using the presprinkling unused logic gates. At the same time, the designers track and verify the modification to check formal equivalence after ECO process. The designers must guarantee the revised design matching the revised specification.

How to achieve ECO efficiently? There are some literatures that address this problem and provide related solution. In literature [

This paper is organized as follows. In Section

Before describing the proposed method, we address a typical manual ECO design flow in Figure

A typical ECO design flow.

Next, we describe two-phase ECO design flow in Figure

Two-phase ECO design flow.

However, there are some important problems that appear during patching logic. Are there enough spare cells and types to satisfy the consumption of patch logic? How to estimate the quantity and logic types of ECO procedure? In order to solve this problem, we proposed an engineering change orders design using multiple variables linear programming for VLSI design in this paper.

Before discussing the engineering change orders design using multiple variables linear programming, we addressed ECO logic transformation. Figure

Example of an ECO problem. (a) EC equation: output =

However, most of spare cells only provide basic logical functions that include AND, OR, NOT, NAND, and NOR. Half Adder (HA), Full Adder (FA), And-Or-Inverter (AOI), and Or-And-Inverter (OAI) can provide complex logical functions. We can adopt these logical cells to perform ECO function. For example, AOI22 can be implemented by two NAND and one AND cells in Figure

AOI22 can be implemented by two NAND and one AND cells.

Although logic transformation skill makes the ECO technology come true, a chip often does not own enough spare cells to modify the function to meet a new specification. How to allocate limited resource? We should estimate quantity of spare cells and logic transformation rule to perform optimal engineering charge orders.

In Figure

ECO design using multiple variables linear programming for VLSI design and relation of logic transformation.

We assume

Besides,

Therefore, the restriction rule of the number of spare cells and transformed target cells in Figure

Besides, the restriction rule of the engineering change orders design using multiple variables linear programming in Figure

However, spare cells are not often enough; designer should balance the spare cell allocation to meet all requirements of desirable cells.

We assume one case when

Similarly, when

Therefore, we define another restriction rule of the engineering change orders design which is written as follows:

According to formulas (

In a similar way, we define the restriction rule of the engineering change orders design which is written as follows:

According to formulas (

We model the engineering change orders problems using multiple variables linear programming. According to the functions, we can understand the engineering change orders relation between supply and requirement. Then, designer can estimate and perform ECO using spare cell efficiently.

In this Section, we discuss the advantage and disadvantage of the related works. Table

ECO methods comparison.

Method | Traditional ECO | Proposed method |
---|---|---|

Cell resource prediction | Constraint based | Multiple variables linear programming |

Predictive precision of patching logic number | Normal precision | High precision |

Balance between spare cells and target cells | Low balance | High balance |

Restriction rule | Not define | Define |

Resource optimization | Not define | Define |

Solution boundary | Not define | Define |

In this paper, we proposed an engineering change orders design using multiple variables linear programming for VLSI design. The paper discusses typical ECO design flow, logic transformation, and multiple variables linear programming for VLSI design. The presented scheme estimates the resource of spare cells and provides a well solution of ECO problems.

The authors declare that there is no conflict of interests regarding the publication of this paper.

This work was supported by the National Science Council of Taiwan under Grant nos. NSC 101-2221-E-027-135-MY2 and 102-2622-E-027-008-CC3. The authors gratefully acknowledge the Chip Implementation Center (CIC), for supplying the technology models used in IC design.