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This paper analyses the undoped DG-MOSFETs capability for the operation of rectifiers for RFIDs and Wireless Power Transmission (WPT) at microwave frequencies. For this purpose, a large-signal compact model has been developed and implemented in Verilog-A. The model has been numerically validated with a device simulator (Sentaurus). It is found that the number of stages to achieve the optimal rectifier performance is inferior to that required with conventional MOSFETs. In addition, the DC output voltage could be incremented with the use of appropriate mid-gap metals for the gate, as TiN. Minor impact of short channel effects (SCEs) on rectification is also pointed out.

Nowadays, SOI technology offers wafers with thin and uniformly distributed oxide layers, exhibiting excellent electrical insulation and very high quality silicon/oxide interfaces. These properties encourage the design of different multiple-gate devices [

The topology of the rectifier under consideration is shown in Figure

Schematic of the rectifier.

Rectification mechanism.

When DG-M2 switches off,

The structure of this paper is as follows. In Section

The large-signal equivalent circuit proposed for the undoped DG-MOSFETs, with pads, is shown in Figure

DG-MOSFET large-signal equivalent circuit.

The intrinsic current, based on the charge control model in [

For DG-M1 and DG-M2, a constant mobility, ^{−1}s^{−1}, is assumed, and the gate length, ^{+} polysilicon gate, and

Setting the gate-to-drain bias voltage,

Substituting (

In a similar way, the drain-to-source capacitance can be written as

Finally,

Note that all the capacitance and the drain current can be explicitly expressed in terms of the charge density in source and drain,

We implement the large-signal equivalent circuit for the DG-MOSFET in Keysight Advanced Design System (ADS), using Verilog-A, which is the industry standard modelling language for analogic circuits [

In the rectifier under consideration (see Figure

Fitting parameters for

| | | |
---|---|---|---|

(×10^{−14} Fcm^{−2}) | — | (V^{−1}) | (×10^{−14} Fcm^{−2}) |

−1.3, 3.3 | −15.3, −4.9 | 15.1, 11.4 | 1.3, −3.3 |

Modelled

The electrical simulations for the rectifier in ADS are validated through numerical simulations with Sentaurus, accounting for the extrinsic elements of the transistors. Thus, Figures

Numerical (with symbols) and modelled (with solid line) steady-state dynamic current for (a) DG-M1 and (b) DG-M2, with an input signal of 1 V amplitude at 1 GHz.

Additionally, Figure

Numerical (with symbols) and modelled (with line) rectified output voltage as function of the RF input power at 5 GHz.

Once the rectifier performance with ADS has been numerically validated, Figure

Transient response for the rectified output voltage with conventional DG-MOSFETs (squares), Texas Instruments 0.18

When threshold voltage is reduced, by using alternative gate metals, a higher rectified output voltage is expected. The use of titanium nitride (TiN) films as gate electrode in MOS capacitors and in Schottky diodes on n-type Si (100) substrates has been reported in [

On the other hand, the influence of the number of stages on the rectified output voltage has been analysed. In every stage (single rectifier in Figure

Figure

Modelled rectified output voltage for multiple stage configurations as function of the RF input power at 5 GHz with TiN.

Finally, it can be pointed out that with short channel effects (SCEs) a superior current and, consequently, a higher DC output voltage would be expected. However, when incorporating the saturation velocity, effective mobility, and channel length modulation effects, as in [

A compact model for DG-MOSFETs has been developed and implemented in ADS, with Verilog-A, to perform electrical simulations of RFID rectifiers, which have been validated through numerical simulations with Sentaurus.

From transient simulations at microwave frequencies, it has been observed that the proposed rectifier with DG-MOSFETs efficiently produces a DC output voltage. Furthermore, using TiN as metal gate, the DC output voltage increases 0.25 V, compared with that obtained with n^{+} polysilicon. We have also demonstrated that just two stages are necessary to achieve the optimal performance of the rectifier, less than with conventional N-MOSFETs, and that SCEs have a minor impact on the DC output voltage.

The authors declare that there are no competing interests regarding the publication of this paper.

This work has been supported by the Spanish national research project TEC2015-67883-R.