Advances in Materials Science and Engineering
Volume 2017 (2017), Article ID 6050541, 1 page
https://doi.org/10.1155/2017/6050541

Erratum

Erratum to “Electrical Characterization of Postmetal Annealed Ultrathin TiN Gate Electrodes in Si MOS Capacitors”

Z. N. Khan,1,2 S. Ahmed,¹ and M. Ali¹

¹Advanced Electronics Laboratories, International Islamic University, Islamabad, Pakistan
²COMSATS Institute of Information Technology, Islamabad, Pakistan

Correspondence should be addressed to Z. N. Khan; zeeshan.najam@comsats.edu.pk

Received 19 January 2017; Accepted 20 February 2017; Published 11 April 2017

Copyright © 2017 Z. N. Khan et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

In the article titled “Electrical Characterization of Postmetal Annealed Ultrathin TiN Gate Electrodes in Si MOS Capacitors” [1], there was an error in reference [] which should be corrected as follows:

“[] Z. N. Khan, S. Ahmed, and M. Ali, “Effect of thermal budget on the electrical characterization of atomic layer deposited HfSiO/TiN gate stack MOSCAP structure,” PLoS ONE, vol. 11, no. 8, Article ID e0161736, 2016.”

References

Z. N. Khan, S. Ahmed, and M. Ali, “Electrical characterization of postmetal annealed ultrathin TiN gate electrodes in Si MOS capacitors,” Advances in Materials Science and Engineering, vol. 2016, Article ID 3740517, 4 pages, 2016.