Hindawi Publishing Corporation
Active and Passive Electronic Components
Volume 2009 (2009), Article ID 987304
doi:10.1155/2009/987304

Research Article

DDCC-Based Quadrature Oscillator with Grounded Capacitors and Resistors

Montree Kumngern and Kobchai Dejhan

Telecommunications Engineering Department, Faculty of Engineering, King Mongkut's Institute of Technology Ladkrabang, Bangkok 10520, Thailand

Correspondence should be addressed to Montree Kumngern, kkmontre@kmitl.ac.th

Received 2 October 2008; Revised 24 November 2008; Accepted 19 January 2009

Recommended by Krishnamachar Prasad

A new voltage-mode quadrature oscillator using two differential difference current conveyors (DDCCs), two grounded capacitors, and three grounded resistors is presented. The proposed oscillator provides the following advantages: the oscillation condition and oscillation frequency are orthogonally controlled; the oscillation frequency is controlled through a single grounded resistor; the use of only grounded capacitors and resistors makes the proposed circuit ideal for IC implementation; low passive and active sensitivities. Simulation results verifying the theoretical analysis are also included.

Copyright © 2009 M. Kumngern and K. Dejhan. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

1. Introduction

Second-generation current conveyors (CCIIs) have been found very useful in many applications. This is attributed to their higher signal bandwidths, greater linearity, and larger dynamic range than those of the operational-amplifiers (op-amps) based ones. Recently, Chiu et al. [1] proposed a new current conveyor circuit called the differential difference current conveyor (DDCC). The DDCC has the advantages of both the CCII and the differential difference amplifier (DDA) (such as high input impedance and arithmetic operation capability) [1].

A quadrature oscillator typically provides two sinusoids with phase difference for a variety of applications, such as in telecommunications for quadrature mixers, in single-sideband generators, in direct-conversion receivers, or for measurement purposes in vector generators or selective voltmeters [2, 3]. As a result, a number of circuits have been presented in technical literature [4–8].

In this paper, a new voltage-mode quadrature oscillator based on DDCCs is presented. The proposed circuit employs two DDCCs, two grounded capacitors, and three grounded resistors. The proposed circuit enjoys independent oscillation control through a single grounded resistor and independent frequency control through another single grounded resistor. The use of grounded capacitors and resistors makes the proposed circuit suitable for integrated circuit implementation [9]. The theoretical results are verified by PSpice simulation.

2. Proposed Circuit

The electrical symbol of DDCC is shown in Figure 1. It was proposed in 1996 by Chiu et al. [1], and it enjoys the advantages of CCII and DDA such as larger signal bandwidth, greater linearity, wider dynamic range, simple circuitry, low power consumption, and high input impedance [1]. The DDCC has three voltage input terminals: , and , which have high input impedance. Terminal X is a low-impedance current input terminal. There is a high-impedance current output terminal Z. The input-output characteristics of the DDCC is described as [1] (1) The CMOS realization of the DDCC used in this paper for the quadrature oscillator circuit is shown in Figure 2.

Figure 1: Electrical symbol of DDCC.

Figure 2: The CMOS implementation of DDCC.

The proposed quadrature oscillator is shown in Figure 3. It is composed of two DDCCs, two grounded capacitors, and three grounded resistors. The characteristic equation of the circuit can be expressed as (2) The oscillation condition and oscillation frequency can be obtained as (3)(4) It can be seen from (3) and (4) that the oscillation condition can be adjusted by grounded resistor or/and and the oscillation frequency can be controlled by varying the grounded resistor without disturbing the oscillation condition. This means that the oscillation frequency and oscillation condition are orthogonaly controlled. By using a JFET to replace , a voltage-controlled oscillator can be obtained [10]. From (4), the passive sensitivities of proposed quadrature oscillator are low. From Figure 3, DDCC₂ along with and form the lossless integrator. Hence, the phase difference between and is given by (5) At , (5) can be obtained as , ensuring that the currents and are in quadrature.

Figure 3: Proposed voltage-mode quadrature oscillator.

3. Nonideal Effects

To consider the nonideal effect of a DDCC, taking the nonidealities of the DDCCs into account, the relationship of the terminal voltages and currents can be rewritten as [11](6) where and denotes the voltage tracking error from terminal to terminal of the kth DDCC, and denotes the voltage tracking error from terminal to terminal of the kth DDCC, and denotes the voltage tracking error from terminal to terminal of the kth DDCC, and and denotes the output current tracking error of the kth DDCC. The characteristic equation of Figure 3 becomes (7) The modified oscillation condition and oscillation frequency are (8)(9) From (7) and (8), the tracking errors slightly change the oscillation condition and oscillation frequency. However, the oscillation condition and oscillation frequency still can be orthogonally controllable.

4. Simulation Results

To verify the theoretical prediction of the proposed circuit, Figure 3 has been simulated using PSpice simulation program. The DDCC in Figure 2 was simulated using the 0.5 m MIETEC as tabulated in Table 1 [12]. The transistor aspect ratios of DDCC are listed in Table 2 [12], and the supply voltages were = 2.5 V. The biasing voltage was taken as −1.7 V. The quadrature oscillator was designed with = = 50 pF, = = 5 k, and = 5.2 k for the oscillation frequency of = 649 kHz that where was varied with by (3) to ensure the oscillator will start. The simulation results are shown in Figure 4. In this figure, the oscillation frequency of 640 kHz is obtained. The oscillation frequency is 640 kHz instead of 649 kHz owing the effect described in Section 3. According to (9), this drop-off would be caused by voltage and current tracking errors. Figure 5 shows the simulated frequency spectrums of and in Figure 4. The result of the total harmonic distortion analysis is 1.02%. Figure 6 shows the simulation results of the proposed quadrature oscillator in Figure 3 by varying the values of the resistor with = = 50 pF, = 5 k, and = 5.2 k. The nonidealities may be due to the ignored tracking errors of the DDCC.

Table 1: CMOS model used in simulation.

.MODEL NMOS LEVEL = 3 UO = 460.5 TOX = 1.0E-8 TPG = 1 VTO = +0.62

JS = 1.08E-6 XJ = 0.15U RS = 417 RSH = 2.73 LD = 0.04U VMAX = 130E3 NSUB = 1.71E17

PB = 0.761 ETA = 0.00 THETA = 0.129 PHI = 0.905 GAMMA = 0.69 KAPPA = 0.10 CJ = 76.4E-5

MJ = 0.357 CJSW = 5.68E-10 MJSW = 0.302 CGSO = 1.38E-10 CGDO = 1.38E-10

CGBO = 3.45E-10 KF = 3.07E-28 AF = 1 WD = +0.11U DELTA = +0.42 NFS = 1.2E11 DELL = 0U

LIS = 2 ISTMP = 10 TT = 0.1E-9

.MODEL PMOS LEVEL = 3 UO = 100 TOX = 1.0E-8 TPG = 1 VTO = −0.58

JS = 0.38E-6 XJ = 0.10U RS = 886 RSH = 1.81 LD = 0.03U VMAX = 113E3 NSUB = 2.08E17

PB = 0.911 ETA = 00 THETA = 0.120 PHI = 0.905 GAMMA = 0.76 KAPPA = 2 CJ = 85E-5

MJ = 0.429 CJSW = 4.67E-10 MJSW = 0.631 CGSO = 1.38E-10 CGDO = 1.38E-10

CGBO = 3.45E-10 KF = 1.08E-29 AF = 1 WD = +0.14U DELTA = 0.81 NFS = 0.52E11 DELL = 0U

LIS = 2 ISTMP = 10 TT = 0.1E-9

Table 2: Transistor aspect ratios of the used DDCC.

MOS transistor
W/L

1.6/1

-
8/1

-
20/1

-
29/1

-
90/1

Figure 4: The simulated quadrature output waveforms.

Figure 5: The simulated frequency spectrum of and .

Figure 6: Simulated results of the oscillation frequency.

5. Conclusions

In this paper, a new DDCC-based voltage-mode quadrature oscillator circuit has been presented. The proposed circuit employs two DDCCs, two grounded capacitors, and three grounded resistors. The proposed circuit enjoys independent oscillation control through a single grounded resistor and independent frequency control through another single grounded resistor. The use of grounded capacitors makes the circuit attractive for integration, and the use of grounded resistor for independent control of the oscillation frequency makes the circuit attractive for the realization of voltage-controlled oscillators. The active and passive sensitivities are no more than unity. Simulation results, which confirm the theoretical analysis, are obtained.

Acknowledgment

The authors would like to thank the anonymous reviewers for their valuable comments.

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