The paper presents a performance analysis of novel CMOS Integrated pseudoPMOS ISFET (PPISFET) having zero static power dissipation. The main focus is on simulation of power and performance analysis along with the comparison with existing devices, which is used for water quality monitoring. The conventional devices, generally used, consume high power and are not stable for long term monitoring. The conventional device has the drawbacks of low value of slew rate, high power consumption, and nonlinear characteristics, but in this novel design, due to zero static power, less load capacitance on input signals, faster switching, fewer transistors, and higher circuit density, the device exhibits a better slew rate and piecewise linear characteristics and is seen consuming low power of the order of 30 mW. The proposed circuit reduces total power consumption per cycle, increases the speed of operation, is fairly linear, and is simple to implement.
Water is vital for all known forms of life. With the expansion of industrial production and increase in the population every year, wastewater produced by industry is discharged into rivers and lakes due to which the quality of water is degraded. Hence, it is the most urgent to take an effective measure to monitor and protect the water resources. The supervision of water quality is generally done by taking and analysing some liquid samples in the laboratory. This method is very expensive and tedious, and it can take several weeks to get tests result. Many research works have contributed to design quality measuring devices [
gate leakage,
subthreshold leakage,
reversebiased junction leakage,
gateinduced drain leakage.
Out of these, subthreshold leakage and gateleakage are dominant. The subthreshold leakage current of an MOS device can be given by:
An ISFET is an ionsensitive fieldeffect transistor which has a property of measuring ion concentrations in solution; when the ion concentration (such as H^{+}) changes, the current through the transistor will change accordingly. Here, the solution is used as the gate electrode. A voltage between substrate and oxide surfaces arises due to an ions’ sheath. The ISFET has similar structure as that of the MOSFET except that the poly gate of MOSFET is removed from the silicon surface and is replaced with a reference electrode inserted inside the solution, which is directly in contact with the hydrogen ion (H^{+}) sensitive gate electrode [
Subcircuit block of ISFET macromodel.
At the interface between gate insulator and the solution, there is an electric potential difference that depends on the concentration of H^{+} of the solution, or the socalled pH value. The variation of this potential caused by the pH variation will lead to modulation of the drain current. As a result, the
The threshold voltage is only different in case of MOSFET. In ISFET, defining the metal connection of the reference electrode as a remote gate, the threshold voltage is given by
PseudoNMOS logic is a ratioed logic which uses a grounded PMOS load as a pullup network and an NMOS driver circuit as pulldown network that realizes the logic function. The main advantage of this logic is that it uses only
For the integrated sensor, the measurement circuit tracks the threshold voltage (or the flatband voltage) of the ISFET as the electrolyte pH is varied. A practical solution to integrate the sensor with electronics is to view the ISFET sensor as a circuit component in an integrated circuit rather than as an addon sensor whose output signals are further processed. In this paper, the ISFET is used as one of the input transistors in the differential stage of the current conveyor as shown in Figure
Circuit diagram of PPISFET.
Transient analysis of the PPISFET is observed on Tanner tool Version 15, and it is found that the output is fairly linear with respect to input with the passage of time as shown in Figure
Transient analysis.
In the regression statistics including multiple
Regression statistics.
Regression statistics  

Multiple 
0.998428255 

0.99685898 
Adjusted 
0.996662667 
Standard error  0.08121496 
Observations  18 
ANOVA analysis.
ANOVA  

df  SS  MS 

Significance 

Regression  1  33.49  33.492  5077.88 

Residual  16  0.10  0.0065  
 
Total  17  33.59 
On plotting a linear trend line between
Trend line between
ANOVA is a simple analysis of variance on data for two or more samples.
The ANOVA table gives the following information:
degrees of freedom (df),
the sum of the squares (SS),
the mean square (MS),
the
the significance
The analysis provides a test of the hypothesis that each sample is drawn from the same underlying probability distribution against the alternative hypothesis that underlying probability distributions are not the same for all samples. A high
A residual plot between output and input determines if the regression model is a good fit to your data. When plotted, the residuals should be random. There should be no recognizable pattern. Good regression models give uncorrelated residuals. The residual plot for the device is plotted and shown in given Figure
Residual plot.
The normal probability plot is a special case of the probability plot. The points on this plot form a nearly linear pattern, which indicates that the normal distribution is a good model for this data set. The normal probability plot for the device is plotted and shown in Figure
Normal probability plot.
The various results obtained are summarized in this section. Figures
Component comparison chart.
Power comparison chart.
On comparing the new design with the existing design, we arrive at following results.
The number of MOSFETs is 27 in [
Static power is almost zero.
No capacitor is used in the new technique.
The number of current sources deployed is 43 in conventional device and 0 in the new device.
The numbers of nMOS and pMOS required are as follows: 17 and 10 in [
No resistor is required in the new technique.
Voltage sources required for proper operation of the devices are 4 in [
From Table
Comparative analysis with existing devices.
Parameters  OpAmpISFET [ 
CCISFET [ 
PPISFET 

Technology  CMOS  CMOS  PseudoPMOS 
Power supply  0 V–5 V  0 V–5 V  0 V–5 V 
No. of MOSFETs  27  16  9 
Capacitor  2  2  0 
Current source  4  3  0 
NMOS  17  10  8 
PMOS  10  6  1 
Resistor  5  5  0 
Voltage source  4  2  1 
Max power (W) 



Min power (W) 



Stability analysis  Closed loop 
Closed loop 
Closed loop 
In this novel design, a new device employing PPISFET is proposed. The PP introduced is a convenient building block that provides a simplified approach to the design of linear analog systems. It also consumes considerably low power. There is a significant improvement in the slew rate. The output observed is highly linear. A significant advantage of the proposed design is its simple architecture and low component count. Therefore, it is very suitable for water quality monitoring applications. This study may be extended for further improvements in terms of power and size, besides the wiring and layout characteristics level.