Complexity
Volume 2018 (2018), Article ID 5431619, 8 pages
https://doi.org/10.1155/2018/5431619

Research Article

On Designing Feedback Controllers for Master-Slave Synchronization of Memristor-Based Chua’s Circuits

Ke Ding1,2

¹School of Information Technology, Jiangxi University of Finance and Economics, Nanchang 330013, China
²Jiangxi E-commerce High Level Engineering Technology Research Centre, Jiangxi University of Finance and Economics, Nanchang 330013, China

Correspondence should be addressed to Ke Ding; keding@jxufe.edu.cn

Received 26 April 2018; Accepted 22 July 2018; Published 16 October 2018

Academic Editor: Viet-Thanh Pham

Copyright © 2018 Ke Ding. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

Abstract.

This paper is concerned with designing feedback controllers for master-slave synchronization of two chaotic memristor-based Chua’s circuits. The memductance function of memristor-based Chua’s circuits is a bounded function with a bounded derivative which is more generalized than those piecewise constant-valued functions or quadratic functions in some existing papers. The main contributions are that one master-slave synchronization criterion is established for two chaotic memristor-based Chua’s circuits, and the feedback controller gain is easily obtained by solving a set of linear matrix inequalities. One numerical example is given to illustrate the effectiveness of the design method.

1. Introduction

Since the memristor, a missing circuit element, was first introduced by Chua in 1971 [1] and was realized in 2008 [2], memristor-based Chua’s circuits have received some attention, see, for example, [3–5].

When some equipment of circuits in oscillators were replaced by memristors, complex and dynamical properties were revealed in the circuits. Chaotic attractors have been studied in memristor-based Chua’s circuits in which the memductance functions of memristors were characterized by a piecewise constant-valued function [3, 6, 7] or a quadratic function [4, 5, 8, 9]. It should be pointed out that the memductance function of memristor can be represented by a bounded function with a bounded derivative [2], which is more generalized than those piecewise constant-valued functions or quadratic functions in some existing papers [3, 4]. However, to the best of author’s knowledge, there is no result available in the existing published literature to study memristor-based Chua’s circuits with abovementioned memductance function, which is the first motivation of this paper.

Chaotic synchronization and chaos control have received much attention due to its theoretical importance and practical applications [10–33]. Due to the existence of memristors, the product of the memductance function and voltage can give rise to chaotical behaviors in circuits. Most research efforts [3–5, 7–9, 17–19] were made to chaotic behaviors of memristor-based circuits, rather than master-slave synchronization and chaos control for two memristor-based circuits. Zhang et al. [6] conducted stability analysis for a single circuit with a piecewise constant-valued memductance function, but they did not consider the synchronization problem of two circuits. In [15, 16], synchronization of memristor-based Chua’s circuits has been investigated, in which the memductance elements were piecewise linear functions. In addition, the memristor with a passive nonlinearity and a piecewise constant-valued memductance function is essential to generate the high signal-to-noise ratio which is not suitable for achieving the secure communication [5]. Therefore, the memristor with nonlinear memductance function which is suitable for secure communication should be worth studying. The memristor in which the memductance function is a bounded function with a bounded derivative can satisfy this criterion, but the mathematical model of corresponding circuit is a set of nonlinear differential equations as well as the corresponding error systems derived by the master-slave scheme. Thus, how to derive master-slave synchronization criteria for two memristor-based Chua’s circuits in which the memductance function is a bounded function with a bounded derivative and how to design a feedback controller matrix gain to achieve synchronization is the second motivation of this paper.

In this paper, we will deal with the problem of the controller design for master-slave synchronization of chaotic memristor-based Chua’s circuits. The master-slave scheme will be constructed by using an error state feedback control. We will derive one synchronization criterion. Based on the obtained synchronization criterion, we will give the sufficient conditions on the existence of an error state feedback controller. Moreover, we will obtain the controller gain. We will also use one numerical example to illustrate the effectiveness of the synchronization criterion and the design method.

Notation 1. denotes the -dimensional Euclidean space. is the set of all real matrices. For symmetric matrices and , the notation (respectively, ) means that matrix is positive definite (respectively, positive semidefinite). and are the maximum and minimum eigenvalues of the matrix , respectively.

2. Memristor-Based Chua’s Circuits

The memristor in Chua’s circuits is a two-terminal element. The magnetic flux of memristor between the terminals is a function of the electric charge which passes through the device [1]. A flux-controlled memristor can be characterized by the incremental menductance function describing the flux-dependent rate of change of charge [2], i.e., . Therefore, the voltage across and the current through the memristor can be described as [3].

Figure 1 shows a smooth flux-controlled memristor-based Chua’s circuit, where and are the voltages across capacitors and , respectively; is the current through the inductances ; is a linear resistor; the Chua’s diode is replaced by a memristor. The mathematical model of the Chua’s circuit with the memristor can be described as

with the initial condition .

Figure 1: The memristor-based chaotic Chua’s circuit.

Let and be two differentiable functions. In this paper, we mainly focus on the following nonlinearity, i.e., , , , and , where and are the parameters of electronic equipment. Besides is differentiable, we assume that is a bounded function and is a bounded function where, i.e., there exist two scales and such that

Rescaling the parameters of the circuit as , , , , , , , , , and , we obtain the following dimensionless form for system (1):

where the initial condition is , , , and . Let , and

Then, system (3) can be rewritten as

where and .

Remark 1. In [3–5, 7–9, 17–19], dynamical behaviors of the single memristor-based Chua’s circuit have been studied. In this paper, the synchronization of two memristor-based Chua’s circuits is investigated.

Remark 2. In [6, 15, 16], the memductance elements of memristor-based Chua’s circuits were either piecewise linear functions or piecewise constant-valued memductance functions. It is well known that the memristor with a passive nonlinearity or a piecewise constant-valued memductance function is easy to generate the high signal-to-noise ratio which is not suitable for achieving the secure communication [5]. Thus, the memristor with nonlinear memductance function should be investigated. The memristor with bounded memductance functions and bounded derivatives which is suitable for secure communication can satisfy this criterion. Moreover, the mathematical model of corresponding circuit is easily to set up. Thus, it is worth studying master-slave synchronization for two memristor-based Chua’s circuits in which the memductance function is a bounded function with a bounded derivative. It is also worth designing a feedback controller matrix gain to achieve synchronization.

3. Master-Slave Synchronization

Let . We construct a master-slave synchronization scheme for system (5).

with master system , slave system , and controller .

Defining a signal with , we have the error system

where

The initial values of (6) and (7) are and , respectively. Thus,

with

It follows from (10) and the differential mean value theorem that

where . Notice that the error system (9) can be rewritten as

where

with

Choosing the proper parameters of system (3), there exist some chaotic attractors which indicate that for any initial condition within the domain of system (3), there are bounds such that

From inequalities (2) and (16), we know that

Therefore, the error system (13) can be modeled as a polytopic system.

Let

It is clear that are the vertices of .

This paper intends to derive synchronization criteria for two memristor-based Chua’s circuits and to design the controller (8), i.e., to find the controller gain , such that the system described by (13) is asymptotically stable, which means that the system described by (6), (7), and (8) synchronizes.

4. Controller Design

4.1. A Synchronization Criterion

This subsection aims to derive a synchronization criterion for two memristor-based Chua’s circuits. Choose the quadratic Lyapunov function.

where .

Applying Lyapunov’s direct method, we obtain the following result.

Proposition 1. The error system described by (11) and (13) is asymptotically stable if there exists a matrix such that

Proof 1. Taking the derivative of with respect to along the trajectory of (13) yields

A sufficient condition for the asymptotic stability of system (13) is that there exists a matrix such that

It is easy to see that LMI (22) can be ensured by LMIs (20). This ends the proof.
If the menductance function is a linear piecewise constant-valued function, i.e.,

we obtain the following dimensionless form for system (1):

by rescaling the parameters of the circuit as (3), where

, , and the initial condition is , , , and . The switched rule is if , then ; if , then . The chaotical behaviors of model (24) have been studied in [3, 6, 7].

We construct a master-slave synchronization scheme for system (24).

with master system , slave system , and controller . Defining an error signal , we obtain the error system.

where , , , , and . The initial value is the same as that defined in (11). The switched rule is if , , then ; if , , then ; if , , then ; if , , then .

We choose the quadratic Lyapunov function.

Taking the derivative of (28) with respect to along the trajectory of (27), we can derive the following state estate which can be stated as the error system described by (27) and (11) converges exponentially to the following ball with a convergence rate , where with , , , , and .

4.2. The Controller Design

In this subsection, we will design the controller (8) based on the synchronization criterion derived in Section 4.1.

Applying Proposition 1, we establish the following result.

Proposition 2. The error system described by (11) and (13) is asymptotically stable if there exists a matrix and a matrix of appropriate dimensions such that

Moreover, the feedback controller gain matrix is given by .

Proof 2. Pre- and postmultiplying both sides of (20) with gives

Setting and yields (29).

5. Simulation Results

In this section, in order to illustrate the effectiveness of the derived results, we consider a memristor-based Chua’s circuit (1) in which the parameters are chosen as , , , and . Thus, we have .

For the initial value (0.11, 0.11, 0, 0) of (6), we give Figures 2 and 3 for system (3) with and to illustrate the chaotic attractors in the plate. We can also obtain the values for , , , , and , respectively. If , then , , , , , and . If , then , , , , , and .

Figure 2: The chaotic attractors of system (3) with .

Figure 3: The chaotic attractors of system (3) with .

We choose the initial condition of master system (6) as and the initial condition of slave system (7) as . From Proposition 2, we obtain the feedback gain matrix for and , respectively, which are listed in Table 1.

Table 1: The feedback gain matrix derived by Proposition 2.

The simulation results for master, slave, and error systems for and and the feedback controller gain derived by Proposition 2 are illustrated in Figures 4 and 5, from which one can clearly see that the master and slave systems are synchronized, which means that the design method is effective.

(a)

(b)

Figure 4: (a) Simulation result for master system with and derived by Proposition 2. (b) Simulation result for slave system with and derived by Proposition 2.

(a)

(b)

Figure 5: (a) Simulation result for master system with and derived by Proposition 2. (b) Simulation result for slave system with and derived by Proposition 2.

6. Conclusions and Future Works

We have addressed the problem of the controller design for master-slave synchronization of memristor-based Chua’s circuits and constructed a master-slave scheme by using an error state feedback control. We have derived a master-slave synchronization criterion and provided the sufficient conditions on the existence of an error feedback controller. Moreover, we have obtained the error state feedback controller gain by solving a set of LMIs. The effectiveness of the synchronization criterion and the design method has been illustrated through one numerical example. It should be pointed out that we only consider the state feedback control for synchronization of memristor-based Chua’s circuits in this paper. To design the time-delayed controller is our future research focus.

Data Availability

The data used to support the findings of this study are included within the article.

Conflicts of Interest

The author declares that there is no conflict of interest regarding the publication of this paper.

Acknowledgments

This work is partially supported by the National Natural Science Foundation of China under Grant 61561023, the key project of Youth Science Fund of Jiangxi China under Grant 20133ACB21009, the project of Science and Technology Fund of Jiangxi Education Department of China under Grant GJJ160429, and the project of Jiangxi E-Commerce High Level Engineering Technology Research Centre.

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