Alternative Approach of Developing Optical Binary Adder Using Reversible

All-optical devices will play a very significant and crucial role in the modern all-optical network by eliminating the bottleneck of opto-electro-opto(O-E-O-) conversion. Unfortunately, the conventional logic gates lose information at the output, and the states of the outputs cannot give any credible impressions of the states of the inputs. In this article, at first, the authors have proposed a method of designing an optical three-input-three-output reversible Peres gate. Authors have deployed polarization switching characteristic of Semiconductor Optical Amplifier (SOA) for designing this circuit. The authors have also proposed a method of designing an optical reversible full adder, using two such Peres gates and subsequently a data recovery circuit which can recover the input data of the adder. The authors have chosen frequency encoded data for processing the operation. The proposed scheme has been verified by simulation results.


Introduction
In the modern communication network, where the system deals with a large number of data, the reversible logic circuit is preferable to conventional logic circuit due to low power consumption.The conventional logic gates like AND, OR, EX-OR, and so on commonly generate less output information than the inputs.Thus, information loss occurs at the output.The information loss leads to energy loss.Landauer's principle exposes that the system generates  * ln 2 joules of heat energy for every bit loss [1].Though, at room temperature, the heat energy dissipated due to single bit loss is very small, when a system deals with a large amount of data and there exist larger numbers of logic processors, then the loss of bits is larger.Then, the heat generated due to bit loss is larger, which in turn increases the temperature of the system.Consequently, this cumulative process dissipates more energy.Bennett has illustrated that  * ln 2 joules of energy dissipation in an irreversible circuit can be avoided if the computation is done in a reversible manner [2].In case of the reversible logic gate, there exists a direct mapping between inputs and outputs, and therefore ideally there is no chance of bit loss.This is not the be-all and end-all here.The output information of the conventional logic gates does not give any clear idea about the input information.In case of reversible logic gate, the inputs are individually retrievable from the outputs.Hence, the reversible logic gate may be the bliss to overcome such shortcomings.In the electronic communication network, various types of arithmetic and logical units have been designed using reversible logic gates [3][4][5].Van Rentergem and De Vos designed reversible full adder, implemented into electronic circuitry based on CMOS technology and pass-transistor design [3].Aradhya et al. designed control unit for low power AU using reversible logic for the implementation in electronics [4].But, in the 21st century, the scientists are dealing with the optical signals in the communication network.To develop an all-optical network, optical devices are the basic requirement.In case of optical devices, the signals remain in the photonic state, thereby removing the "electronic bottleneck."Consequently, the speed of the system can reach up to THz.
Peres gate is a three-input three-output, reversible logic gate with quantum cost "4."The block diagram of Peres gate is shown in Figure 1.Three input signals "A," "B," and "C" are fed into the Peres gate through three input terminals "1," "2," and "3," respectively, and three output signals "P," "Q," and "R" are received from three output terminals "1," "2," and "3," respectively.Logic expressions of the outputs in terms of inputs are as follows: P = A, Q = A ⊕ B, R = A ⋅ B ⊕ C; that is, output "P" always gives the result, same as "A," and "Q" gives "A" EX-OR "B."If both the inputs "A" and "B" are in binary "1" state, then "R" will be "1 ⊕ C," that is, nothing but C. When at least one of the inputs "A" and "B" is in binary "0" state, then "R" will be "0 ⊕ C"; that is, "R = C".Here, it is easy to determine the input "A" from "P," input "B" from "P" and "Q," input "C" from "P," and "Q" and "R."In this article, authors at first have designed an optical Peres gate using polarization switch (PSW), and then they have also designed optical full adder circuit using two such Peres gates and subsequently a data recovery circuit which can recover the input data of the adder.The principle of nonlinear polarization rotation of the probe beam in presence of pump beam in a Semiconductor Optical Amplifier (SOA) is exploited here to explain the switching characteristic of PSW.Simulated results of the switching action of the PSW are shown in the figures in the respective sections.The authors deal with frequency encoded data as the frequency is the fundamental character of the signal and it does not change due to reflection, refraction, or attenuation.To execute the operation, binary state "1" is represented by the optical beam of frequency ] 2 and binary state "0" is represented by the optical beam of frequency ] 1 .Simulated power spectrums of input-output of Peres gate are shown in the figures in respective sections which confirm the feasibility of the proposed schemes.Some optical Multiplexers (MUXs) and Demultiplexers (DMUXs) have been used to construct the optical circuits.MUX and DMUX work on frequency encoded data also.DMUX routes the optical signal of frequency ] 1 to channel 1 of it.If the frequency of the optical signal is ] 2 , then it is transmitted via channel 2. MUXs are used to connect the optical channels.
So many researchers have designed Peres gate using various techniques.Kotiyal et al. developed Peres gate using four Mach-Zehnder interferometers (MZI) [6].Maity et al. also designed the Peres gate using Mach-Zehnder interferometers (MZI) [7].Kotiyal et al. designed binary adder using MZI [8].Mandal et al. have also designed all-optical full adder circuit using five reversible Toffoli gates [9].But in this article the circuit complexity of the proposed full adder is reduced as here the authors have designed a full adder using two Peres gates only.Quantum cost of Toffoli gate is greater than that of Peres gate.Full adder circuit using reversible logic gate is developed based on CMOS technology and passtransistor design [3,10] in the electronic domain, but in this article the authors have used SOA as the key element and the whole circuit is optical and frequency encoded.SOA is a worthy choice for designing various types of optical devices due to the fact of compactness, integration potential, high gain, and large operating bandwidth.From the outputs of the proposed full adder circuit, one can easily retrieve the inputs and this makes the scheme novel one.The switching speed of the PSW is very high and it is near 0.01 ns.Thus, the proposed full adder will be very helpful for designing various types of optical processors with less energy dissipation.The simulated power spectrums of the input-outputs of the Peres gate and full adder circuit make the scheme more reliable and these are shown in respective section of the article.The article is arranged as follows: Section 1 is the introductory part of the article.The working principle of the proposed scheme is explained in Section 2. The scheme of optical Peres gate is discussed in Section 3. Proposed optical full adder using Peres gates is designed and explained in Section 4. Sections 5 and 6 are the discussion part and the conclusion part of the article, respectively.

Working Principle
In this article, the proposed work focuses on the polarization switches (PSW).PSW works on the principle of nonlinear polarization rotation of the Semiconductor Optical Amplifier (SOA).So many researchers have already explained the nonlinear polarization rotation characteristic of SOA in different ways [11][12][13], but in this article the basic theory of nonlinear polarization rotation is explained with the help of simple rateequation model as stated by Dorren et al. [14].
To explain the basic theory, two different optical beams are considered.One is less intense probe beam, and another is a highly intense pump beam, and these are fed into the SOA from the two opposite directions of the SOA as shown in Figure 2. The probe beam is injected into SOA via a polarization controller (PC) which controls the polarization direction of the incident probe beam at 45 ∘ to the orientation of the SOA layer.An attenuator is placed in the path of the probe beam and this attenuator attenuates the power of the probe beam to the desired value so that the SOA works in a linear way in the absence of the pump beam.In the presence of the highly intense pump beam, SOA produces nonlinearity and this leads to polarization dependent gain at the output.The output probe beam of SOA is fed into a polarization beam splitter (PBS).PBS transmits the output beam to port 1 or port 2 according to the polarization direction of the output beam.PBS and PC are set in such a way that in the absence of the pump beam total power is developed at port 2, but in the presence of the pump beam, the output beam reaches port 1. Block diagram of PSW is shown in Figure 3.
Detailed theory of nonlinear polarization rotation in SOA is demonstrated using the simple rate-equation model [14][15][16][17].If the optical probe beam in SOA is decomposed into two mutually perpendicular components, called TE mode and TM mode, then these two components experience different optical properties in the presence of the pump beam.According to Dorren's model, the gain of the SOA for TE mode is [14]  TE (, ) =  TE [  (, ) +   (, ) −  0 ] .
Similarly for TM mode gain will be The field is considered to be propagated along the -direction and thus only -transition (corresponding to TE mode) and -transition (corresponding to TE mode) are possible.
Here   (, ) and   (, ) are denoted as number of holes involved in the -transitions and -transitions, respectively, and   (, ) is the electron in the conduction band.The total number of electronic states involved in the transitions is  0 . TM/TE is the gain coefficient corresponding to TM/TE mode.Actually, in this case, the valence band is considered to be divided into two subbands which are heavy hole band (HHB) and light hole band (LHB).The -transitions taking place with heavy holes are much greater in number than the -transitions whereas the -transitions taking place with the light holes are much greater in number than the transitions.When there is no anisotropy in the SOA, then the -transitions and the -transitions take place symmetrically.But in the case of SOA with anisotropy, the -transitions will be promoted over the -transitions.Actually, in this case, the carrier distribution corresponding to -transition ( TE ) and -transition ( TM ) is not same.The population imbalance factor "" signifies the ratio of the carrier distribution of TE mode and TM mode; that is,  =  TE / TM .Now the rate equations for   (, ) and   (, ) can be expressed as where  1 and  2 are electron-hole recombination time and interhole relaxation time, respectively."" is the hole population imbalance factor. TM/TE (, ) is the photon number which is proportional to power of the input signal.  and   are the respective equilibrium values and these depend on the electric biasing current () as follows: where "" is the electric unit charge.Now solving (3) under steady state condition (neglecting the ultrafast nonlinear optical processes), the carrier density for respective modes is Here  TE is total photon density of the pump beam and the probe beam.Now, the power of each mode is related to the photon density by the equation where "" is the length of the SOA, V TE/TM  is the group velocity of the respective mode, and  is frequency of optical signal.
So, the gain of the SOA can be expressed in terms of power of the input signal as well as electric biasing current using ( 5), (6), and (7).When the electric current is sufficiently high (greater than 160 mA) and the power of the probe beam The meaning of the symbols, used in the above equation, and their values are shown in Table 1 [14].Each mode of (, ) is related to the intensity (, ) by the equation  TE/TM (, ) = √  TE/TM (, ) Φ TE/TM (,) . (9) From ( 5), the phase of each mode at the output can be expressed as where "" is the length of the SOA.So the phase difference between the TE mode and TM mode at the output is given by The phase difference between two modes depends on the gain of the respective modes.For the SOA with anisotropy, the gain of the different modes is not equal and also depends on the power of the input beams (using ( 5), (6), and ( 7)).If the power of the probe beam is very low and input injected current is fixed (more than 160 mA) then the phase difference between two modes depends on the power of the pump beam.Now, the output intensity "  " of different modes of the probe beam can be expressed in terms of input intensity "  " by the equation The resultant output can be expressed as So the amplification in decibel unit by the SOA is Using ( 1)-( 7) and ( 11), the variation of the phase difference between TE mode and TM mode with respect to the power of the pump beam is plotted in Figure 5.It can be observed from Figure 5 that when the power of the pump beam is 0.5 mWatt, then phase difference between two modes becomes almost 180 degrees.Due to the presence of PBS, the output probe beam is transmitted to port 1 or port 2 according to the polarization direction of the output beam.The variation of the output power at port 2 with respect to pump beam is shown in Figure 6.When the power of the pump beam is 0.4 mWatt or more, the power at port 2 is almost zero.Then, the total power is developed at port 1.
In the above theory, the linearly polarized input probe signal is fed into the SOA and then this signal is decomposed into two mutually perpendicular linearly polarized components (TE mode and TM mode).These two components move through the SOA with unequal velocity due to the presence of anisotropy in SOA and different carrier dynamics.These two components recombine again at the output of the SOA with a certain phase difference between them.The direction of the polarization of the output signal depends on the phase difference between two modes and thus the polarization direction of the output signal is rotated.As the phase difference between two modes depends on the power of the pump beam for the fixed input biasing current, the direction of the polarization of the output signal of the SOA also depends on the power of the input pump beam.Now, the PBS is set in such a way that in the absence of the pump beam the PBS passes the output beam to port 2.
So, based on the above working principle, switching action of PSW can be stated as follows: in the presence of the pump beam, power is developed at port 1; that is, port-1 remains "ON" and port-2 remains "OFF," and in the absence of the pump beam power is developed at port 2; that is, port 2 is "ON" and port 1 is "OFF."Thus, the PSW can be a worthy choice as an optical switching element for designing of various types of optical processors.In this article, the optical Peres gate is designed using PSWs and the technique of the International Journal of Optics designing of the optical Peres gate is discussed in the next section.

Scheme of Optical Peres Gate
The proposed optical Peres gate is consisting of five PSWs (P1, P2, P3, P4, and P5), three MUXs (M1, M2, and M3), and two DMUXs (D1 and D2) as shown in Figure 7. Three inputs of the Peres gate are denoted as the inputs "A," "B," and "C" and outputs of the Peres gate are denoted as outputs "P," "Q," and "R" as stated in the Introduction of the article.In this circuit, at first, the input signal "A" is split up into two equal parts with the help of a beam splitter.One part of this signal gives the output "P."Other parts of the input signal "A" and the input signal "B" both are fed into DMUX (D1) via MUX (M1).Channel 1 of D1 supplies the pump beam for PSW (P1) and channel 2 supplies the probe beam for PSW (P1).DMUX routes the optical signals in the specified channel according to the frequency of the input signals.As channel 2 carries the optical signal of frequency ] 2 , PSW (P1) gets the probe beam of frequency ] 2 only when at least any one of the input signals "A" and "B" is of frequency ] 2 .An attenuator is placed on channel 2 of D1.Thus the power of the probe beam of P1 is sufficiently low.As the pump beam for P1 is supplied through channel 1 of D1, when any one of two inputs "A" and "B" is of frequency ] 1 then, P1 gets the pump power.Port 1 output of P1 is amplified twice by an amplifier and then split up equally with the help of a beam splitter.One part is fed as the pump beam of PSW (P2), and another part served as one input of the MUX (M2).Port 2 of P2 is connected to the input of M2.A probe beam of frequency ] 1 is fed into P2.The output of M2 gives the output "Q" of the circuit.On the other hand, port 2 of P1 supplies the pump power for PSW (P4) where input "C" is acting as the probe beam of it.Port 1 of P4 is fed into DMUX (D2) whereas port 2 of P4 is fed into MUX (M3).Channel 1 and channel 2 of D2 supply the pump beams for PSWs P3 and P5, respectively.The two optical beams (with very low   2. Now some cases are discussed below.In all cases, output "P" is same as the input "A."

Frequency of the output beam
Case 1 (both the input signals "A" and "B" are of frequency ] 1 and the input "C" is of frequency ] 1 /] 2 ).Here, both the inputs "A" and "B" are fed into D1 via M1.D1 routes both the signals in channel 1.So in this case no beam is transmitted via channel 2 of D1.Thus, P1 does not get any probe beam.
In the absence of the probe beam, there is no output.Thus, no power is developed at port 1 as well as port 2 of P1.So, P2 does not get any power as pump beam.In the absence of the pump beam, the power is developed at port 2 and this output beam goes to the output of M2.As the frequency of the probe International Journal of Optics 7 beam is ] 1 for P2, the output of M2 is of frequency ] 1 .Thus, the output "Q" will be of frequency ] 1 .
Here, port 2 of P1 is OFF.Thus, P4 does not get any power as the pump power.In the absence of the pump beam, the input signal "C" switches to port 2. If the frequency of the input "C" is ] 1 , then port 2 output is of frequency ] 1 and this beam goes to the output of M3.Thus, the output "R" will be of frequency ] 1 .If the frequency of the input signal "C" is ] 2 then the output "R" will be of frequency ] 2 .In case of P3 and P5, there are no pump beams.Thus, these PSWs contribute nothing to the input of M3.
Case 2 (any one of the inputs "A" and "B" is of frequency ] 1 and another is of frequency ] 2 ; the input "C" is of frequency ] 1 /] 2 ).Here, both the inputs "A" and "B" are fed into D1 via M1.D1 routes the input of frequency ] 1 to channel 1 and this beam serves as the pump beam of P1.Another input of frequency ] 2 is routed via channel 2 and this signal is treated as the probe beam of P1 after passing the attenuator.So here, P1 gets the pump beam and also gets the probe beam of frequency ] 2 .In the presence of the pump beam, the probe beam switches to port 1 of it.Thus, P1 gives the optical beam of frequency ] 2 at port 1.This beam is amplified by the amplifier and split up equally into two parts with the help of the beam splitter.One part of the beam served as the pump beam of P2 and switches the probe to port 1 which is open.Another part of the output of P1 is fed into M2 and gives the output "Q" at the output of M2.Thus, the output "Q" is of frequency ] 2 for this case.
Here, the pump beam is present for P1, and thus port 2 of P1 does not supply any beam for P4.Similar to the previous case, the output "R" is same as input "C." Case 3 (both the inputs "A" and "B" are of frequency ] 2 ; the input "C" is of frequency ] 1 ).Here, both the input beams "A" and "B" are routed through channel 2 of D1 and serve as the probe of P1.But P1 does not get any power as pump beam.The probe beam of frequency ] 2 switches to port 2. So P2 does not receive any pump beam and thus the power is developed at port 2 of P2.As the probe beam of frequency ] 1 is fed into P2, the output (at port 2) becomes of frequency ] 1 and this beam reaches the output "Q" via MUX (M2).
Here, P4 gets sufficient power as the pump beam from port 2 of P1.This pump beam switches the input signal "C" to port 1 of P4.The output beam from port 1 of P4 is fed into DMUX D2.As the frequency of the input "C" is ] 1 , the output beam of P4 routed through channel 1 of D2 and this signal serves as the pump beam of P3.The probe beam for P3 is of frequency ] 2 .Due to the presence of the pump beam, the output signal goes to port 1 and this output signal is of frequency ] 2 .This output signal reaches the output of M3 and gives the output "R" of the Peres gate.Thus, for this condition, the output "R" is of frequency ] 2 .
Here, P5 does not receive any pump beam and thus contributes nothing to the output "R." Case 4 (all the input signals are of frequency ] 2 ).Similar to Case 3, here also, both the inputs "A" and "B" are of frequency ] 2 and thus the output "Q" is of frequency ] 1 .In this case, also, P4 gets sufficient power as the pump beam from port 2 of P1 and so input signal "C" switches to port 1 of P4.As the frequency of the input signal "C" is ] 2 for this case, this signal is routed through channel 2 of D2 and serves as the pump beam of P5.The probe beam for P5 is of frequency ] 1 .So the beam of frequency ] 1 reaches the output of the M3 via port 1 of P5.The output of M2 gives the output "R" of the Peres gate.On the other hand, P3 does not receive any pump beam and thus contributes nothing to the M2.
The simulated power spectrums of the inputs and outputs of the Peres gate are shown in Figures 8(a), 8(b), 8(c), and 8(d).The authors have represented the inputs by Gaussian pulses of beam width 0.4 nm (full width half maxima, that is, FWHM).Here optical beams of wavelength 1557 nm (corresponding frequency is 1.9255 × 10 14 , i.e., ] 2 ) are encoded as the binary state "1," and the state "0" is encoded by the optical beam of wavelength 1552 nm and frequency 1.9317 × 10 14 Hz (] 1 ).Required power for input signals is calculated in Discussion of the article.
Blue colored and red colored pulses belong to the wavelengths 1552 nm (representing binary state "0") and 1557 nm (representing binary state "1"), respectively.In Figure 8(a), all the inputs of the Peres gate are in binary state "0," and thus these are represented by Gaussian pulses of wavelength 1552 nm.The output signals are also of wavelength 1552 nm for this condition.This simulation result is in accordance with the truth table of the frequency encoded Peres gate.In Figure 8(b), both the input signals "A" and "C" are of wavelength 1552 nm (representing binary state "0") and input signal "B" is of wavelength 1557 nm (representing binary state "1").Simulation results show that the output signals "P" and "R" are of wavelength 1552 nm (representing binary state "0") and the output signal "Q" is of wavelength 1557 nm (representing binary state "1").In Figure 8(c), both the input signals "A" and "B" are of wavelength 1557 nm (representing binary state "1") and input signal "C" is of wavelength 1552 nm (representing binary state "0").Simulation results show that the output signals "P" and "R" are of wavelength 1552 nm (representing binary state "0") and the output signal "Q" is of wavelength 1557 nm (representing binary state "1").In Figure 8(d), all the input signals are of wavelength 1557 nm; that is, all the inputs are at binary state "1."In this case, the output signal "P" is of wavelength 1557 nm and the output signals "Q" and "R" are of wavelength 1552 nm.All the simulation results are in accordance with the truth table of Peres gate (Table 2).

Scheme of Optical Full Adder Circuit Using Peres Gate
The proposed optical full adder is constructed using two Peres gates (PG1 and PG2).For each Peres gate, there are three input terminals ("1," "2," and "3") and three output terminals ("1," "2," and "3") as shown in Figure 9. Authors have denoted the input signals of the full adder circuit by the optical signals "A," "B," and "C."Among the three input signals of the full adder circuit, the inputs "A" and "B" are fed into Peres gate PG1 through the input terminals "1" and "  input signal of frequency ] 1 (i.e., binary state "0") is also fed into PG1 through the input terminal "3."The first output terminal, that is, terminal 1 of PG1, gives the result which is same as input "A."Output terminal 2 of PG-1 is connected to PG2 through input terminal 1 of PG2.Output terminal 3 of PG-1 is connected to PG2 through input terminal 3 of PG2.The input signal "C" is fed into PG2 through input terminal 2.
Output terminal 2 of PG1 gives the signal which is same as A ⊕ B. This is the sum of "A" and "B."This signal is fed into PG2 as the first input, whereas the input "C" of the full adder acts as the second input of PG2.Thus the first output terminal of PG2 gives A ⊕ B and output terminal 2 of PG2 gives the result A ⊕ B ⊕ C. Output terminal 2 of PG2 gives nothing but the sum of "A," "B," and "C." Now third input of the Peres gate PG1 is of frequency ] 1 , that is, in binary state "0."Thus the logic expression of the third output of this Peres gate is A⋅B.This is the carry of "A" and "B."This result is fed into PG2 via input terminal 3.Here output terminal 3 of PG2 gives carry of the inputs "A," "B," and "C" for all possible combinations of inputs.This result is in accordance with the truth table of the full adder, shown in Table 3.It is to be noted that as the output terminal 2 of PG-1 gives the sum of the inputs "A" and "B" and output terminal 3 of PG-1 gives the carry of the inputs "A" and "B," this Peres gate PG-1 is acting as the half adder circuit.
The simulated power spectrums of the inputs and outputs of the full adder using Peres gates are shown in Figures 10(a), 10(b), and 10(c).Similar to the optical Peres gate, here also the authors have represented the inputs and outputs by Gaussian pulses of beam width 0.4 nm (full width half maxima, that is, FWHM).Here also the optical beam of wavelength 1557 nm (corresponding frequency is 1.9255 × 10 14 , that is, ] 2 ) is encoded as binary state "1," and state "0" is encoded by the optical beam of wavelength 1552 nm and frequency 1.9317 × 10 14 Hz (] 1 ).
In Figure 10(a), both the input signals "A" and "C" are in binary state "0" whereas the input "B" is in binary state "1," and these are represented by corresponding Gaussian pulses.In this condition, according to the simulation results, the sum of the input signals is in binary state "1" and thus this is represented by the Gaussian pulse of wavelength 1557 nm  and as the carry is in binary state "0," this is represented by the Gaussian pulse of wavelength 1552 nm.In Figure 10(b), the inputs "A" and "B" are of wavelength 1557 nm (i.e., binary state "1"), the input "C" is of wavelength 1552 nm (i.e., binary state "0"), and thus simulation results show that the sum of the inputs is of wavelength 1552 nm and the carry is of wavelength 1557 nm for this case.In Figure 10(c), all the inputs are of wavelength 1557 nm (i.e., binary state "1") and thus both the sum and the carry are of wavelength 1557 nm.Blue colored and red colored pulses belong to the wavelengths 1552 nm (representing binary state "0") and 1557 nm (representing binary state "1"), respectively.
One can easily retrieve the input information from the output information of the proposed full adder.To retrieve the input information, the authors have designed a data recovery circuit (as shown in Figure 11) which is nothing but the mirror image of the proposed full adder circuit.In Figure 11, all the outputs of the full adder circuit are fed into the data recovery circuit as the inputs of it and at the output of the data recovery circuit the input signals "A," "B," and "C" are recovered.The block diagrams of the reversible full adder and the data recovery circuit are shown in Figures 12 and 13, respectively.

Discussion
Commercially available tensile strained bulk JDS-uniphase SOA can be used to construct PSW for Peres gate and full adder circuit.For this type of SOA, the power of the pump beam should be at least 0.4 mWatt and the power of the probe beam should not be greater than 0.03 mWatt.In case of Peres gate, the input beam "A" is split up into two equal parts.So the power of the input "A" should be at least 0.8 mWatt and the input "B" should be of power 0.4 mWatt, and the power of input beam "C" should not be greater than 0.03 mWatt.For adder circuit, one constant input beam of frequency ] 1 is fed into the Peres gate PG1.This beam acts as the probe International Journal of Optics beam and thus power of this beam should not be greater than 0.03 mWatt.An amplifier should be used to amplify the output signal of output terminal 2 of "PG-1" so that this signal can act as the first input signal of PG-2 and also an attenuator should be used at output terminal 3 of PG-1 so that this signal can act as the third input signal of PG-2.
When the pump beam is present, SOA shows nonlinearity and at the output both cross-gain modulation and crossphase modulation take place.SOA shows some unwanted pattern effect due to the slow gain recovery time.This can be reduced using several techniques [18][19][20][21][22]. Due to spontaneous recombination of electron-hole pairs in the SOA gain medium spontaneous emission arises and this spontaneous emission is also amplified with the input signal.Amplified spontaneous emission (ASE) produces noise at the output of SOA and this is the main source of noise in SOA.This noise cannot be neglected, but, using a proper band pass filter with least bandwidth, this noise can be miniaturized [23,24].
The state of polarization (SOP) of the light can be determined with the help of Muller matrix, Jones Matrix, Poincare's sphere, and so on [25].If one represents the state of polarization (SOP) of the input-output signals by the Jones matrix, then each element of the matrix depends on the phase and amplitude of the signals.Thus, the change in SOP can be determined.Similarly, from the points on the surface of Poincare's sphere, the change in state of polarization can be determined.
It is also possible to measure the rotation of the state of polarization of the probe beam by replacing the PBS of the experimental setup of Figure 2 by an optical analyzer [26].
Initially, the pass axis of the polarizer and analyzer are kept parallel, and linearly polarized probe beam is made incident at an angle of 45 degrees with the active layer of the SOA.Now incident beam will decompose into TE and TM mode with equal amplitudes and propagate with equal velocities in the absence of pump beam, and at the output end of the SOA they will recombine without changing its state of polarization and finally pass through the pass axis of the analyzer with maximum intensity.In the presence of the pump beam, birefringence is developed, and therefore TE mode and TM mode propagate with unequal velocities.Consequently, a phase difference is developed between TE and TM modes depending on the power of pump beam and path length of the SOA.Finally, they recombine at the output end of the SOA with a phase difference ΔΦ.As the two modes are of equal amplitudes, resultant vibration will rotate through an angle "" such that " = ΔΦ/2."Now if one rotates the pass axis of the analyzer through an angle  along the direction of rotation of the state of polarization, the maximum intensity of the resultant beam is got.Thereby it is possible to measure the angle of rotation of the state of polarization of the beam using the relation " = ΔΦ/2."

Conclusion
The proposed optical full adder circuit using reversible logic gates has actually four inputs and four outputs.In addition to three input signals ("A," "B," and "C"), one constant input signal of frequency ] 1 is applied in the circuit.At the output, we get sum and carry of the inputs of the full adder, and the circuit gives another two garbage outputs ("A" and "A ⊕ B").But with the help of these two garbage outputs, one can easily recover the inputs "A" and "B."Thus the utilization of this circuit is that one which can get full information about the inputs from the knowledge of the output information.The switching speed of SOA is very high.One can expect 100 Gb/s speed from this circuit.The frequencies are chosen from the "C band" of the spectrum as SOA shows frequency independent gain in this region.The whole circuit is optical one and the data are frequency encoded; thus this circuit will be an essential component for designing optical ALU and WDM communication networks.

Figure 4 : 2 Γ
Figure 4: Variations of gain of SOA for different modes.

Figure 5 : 2 Figure 6 :
Figure 5: Variation of phase difference between TE mode and TM mode with respect to power of the input pump beam.

Figure 11 :Figure 12 :
Figure 11: Scheme of data recovery circuit of the proposed full adder using Peres gates.

Figure 13 :
Figure 13: Block diagram of data recovery circuit of the proposed full adder.

Table 1 :
Parameters of SOA.

Table 2 :
Truth table of frequency encoded Peres gate.
frequencies ] 2 and ] 1 , respectively, are acting as the probe beam of P3 and P5, respectively.Port 1 outputs of P3 and P5 are fed into MUX (M3).The output of M3 gives the "R" output of the circuit.Port 2 output terminals of P3 and P5 are open.Port 1 of P2 is also open.Frequency encoded truth table of Peres gate is shown in Table

Table 3 :
Truth table of frequency encoded full adder.