Handing Tolerance Problem in Fault Diagnosis of Linear-Analogue Circuits with Accurate Statistics Approach

The tolerance handling in analogue fault diagnosis is a challenging problem. Although lots of methods are effective for fault diagnosis, it is hard to apply them to the case with tolerance influence. In this paper, a robust statistics-based approach is introduced for tolerance-influencing fault diagnosis. The advantage of this proposed method is that it can accurately locate the data fusion among fault states. In addition, the results in analogue benchmark (e.g., linear voltage divider circuit) indicate that it is effective in fault diagnosis in accordance with given fault diagnostic requirements (e.g., fault diagnosis error, fault detection rate).


Introduction
The tolerance is one of the most common problems in the production of analogue circuits [1,2]. It often introduces a variable parameter range around nominal value for the circuit components, which lead to the variation of circuit response from one circuit board to another. It is also a challenging problem in the fault diagnosis so that some widely used fault diagnosis methods (e.g., the traditional ICT technique in [3]) fail. Therefore, there is still an urgent need to find an accurate but simple method handling tolerance.
In the past, some scientists often accept an unauthenticated assumption of nominal distribution to circuit response (voltage, current, and other fault signatures) according to the statement in [4]. However, such statistical distribution assumption has not been proved ever, which weaken the theoretical basis of corresponding methods. Besides, it might lead to inaccurate fault diagnosis according to Figure 1(a). Other scientists got around the mathematical analysis of tolerance influence. Instead, an intellectual algorithm (e.g., Support Vector Machine (SVM) is often used for toleranceinfluencing diagnosis [5][6][7][8]. The weakness of this thinking includes 2 aspects: (1) that how the fault diagnosis should be trusted cannot be evaluated when different training samples introduce different data-fusion estimation (Figure 1(b)); (2) the characteristic vector used for fault classification is often too complex to construct.
To solve these questions as above, this paper presents a robust statistics-based method for the fault diagnosis. The robustness means the statistical fault modelling is established according to the strong support of theories. Thus, the capabilities of fault diagnosis for an analogue circuit can be estimated in a trustable manner. Furthermore, there are at least 2 more advantages: (1) the corresponding fault signature is simple to calculate in the process of circuit diagnosis [9,10]; (2) the fault diagnosis error limit can be found to benefit us in the fault diagnosis with given requirement (e.g., the fault diagnosis error, fault detection rate).
The rest of paper is organized as follows. At first, in the last part of this section, all of critical problems in fault diagnosis, including the fault detection, identification, and diagnosis error control, are integrated in the working flow of circuit diagnosis as shown in Figure 2. Then, Section 2 establishes the bases of statistical analysis in linear analogue-circuit involved in fault diagnosis: (1) the assessment of fault diagnosis abilities for a designed analogue circuit with a given tolerance; (2) the estimation of fault diagnosis error limit; (3) testnodes selection and design reducing the test measurement with specific diagnostic requirements. Section 3 tests the effectiveness of theories of Section 2 in some representative 2 Journal of Applied Mathematics Figure 1: (a) The inaccurate distribution 1 (in the middle position) might lead to the conclusion that the circuit is faulty when the fault signature value of locates in the fault-free range ( 0  Figure 2: A scheme on the fault diagnosis with tolerance handling: in the diagnostic design of an analogue circuit, the fault diagnosis error limit control assures that the fault diagnosis can be successful with specific requirements. Actually the fault detection or identification is accomplished with the measurement on the optimum test-nodes set, in order to reduce the data fusion for a best diagnostics. linear circuits. In Section 4, we draw the corresponding comments and conclusions.

Fundamental Theory to Understand Tolerance Influence.
Without loss of generality, assume that the circuit under test (CUT) in Figure 3 has accessible internal test nodes , and external independent current stimuli and . Then in the tolerance-free condition, its nodal voltage can be given according to Lemma 1. Figure 3 has the accessible internal test nodes (e.g., , ) with two given current stimuli and ; then its nodal voltage can be solved as

Lemma 1. A linear circuit in
where the matrix is a diagonal matrix, in which the th diagonal element is the sum of conductivities in the neighbourhood of node , while matrix is adjacent matrix in which the element is nonzero if there are connections on the corresponding nodepair.
Proof. At first, suppose that there is a vertex ℓ with nodal voltage ℓ , which is measured to a convenient point (e.g., the common ground), then Kirchhoffs' law of current states that the total current flowing into or out of this vertex is zero, which implies that where ℓ, = ℓ − . Equation (2) is expressed in a matrix form = ( − ) −1 , where the matrix is a diagonal matrix, whose ℓth element is sum of conductivities in the neighbourhood of node ℓ, while matrix is adjacent matrix in which the element is nonzero if there are connections on the node pairs. Furthermore, the element of on a test node is established in one of 3 cases: = is an equation solving the nodal voltage V in a tolerance-free circuit.
When the linear-analogue circuits are designed with tolerance, the tolerance influence can be modelled as disturbance on , , and ; then Theorem 2 is established.  (2) It is obvious that the element in matrix Δ can be linearly expressed by the elements of matrix Δ ; then it follows Gaussian Distribution if the element of Δ follows a normal distribution.
In accordance with theTheorem 2, a nodal voltage is a normal random variable with the influence of tolerance, on the condition that a fault-free component in the circuit is considered as normal production [11,12]. Furthermore, in general case, the value of Δ = Δ + Δ is complex, where its real part is Δ while its imaginary part is Δ . Thus, the variable = (Δ , Δ ) conforms to bivariate normal distribution.

Fault Statistic Model for Fault Diagnosis. Given a linear
CUT network composed of an independent voltage source and components, the parameters of all nonfaulty components are their nominal values. However, there are potential faults in this circuit and the fault state set is given as = { 0 , 1 , 2 , . . . , }, in which 0 is the fault-free state while others show that the corresponding th component is faulty.
Furthermore, the test-nodes set (accessible nodes to voltage measurement) is set as = { 1 , 2 , . . . , }. Meanwhile, the normal distribution solution is held for the nodal voltage in any fault state, although the corresponding means and variances should be different.
Based on the substitution theorem in [13], a fault component in Figure 4(a) can be replaced by an independent voltage source as in Figure 4(b).
With the superposition theorem, a nodal voltage is the algebraic sum of the following two components: the first component is caused by while the is assumed to be short; the second component is led by when the is short. Thus, the total voltages are: Here, 10 ( 20 ) is the transmission factor between voltage source and the voltage 1 on test node 1 ( 2 ), and 1 ( 2 ) is the transmission factor between and the voltage 2 on test node 1 ( 2 ).
The FSV was proposed in [14,15] to solve the soft faults problem in linear tolerance-free circuit. The reasons that the fault slope value (FSV) is chosen for fault diagnosis as follows: (1) Considering that the hard fault (open or short circuit) is a special case with very large or small component resistance in analogue circuit, fault slope value (FSV) can be a general fault signature to all fault patterns in accordance with the theoretical derivation; (2) the calculation of FSV is from the simple voltage measurement and it is not time-consuming in practice. In this paper, its statistical feature can be obtained according to Theorem 3, when the value of 1 − 10 and 1 − 10 follows normal distribution according to Theorem 2. (6). Such nominal ratio distribution can be established as ( ) = ( 1, 2; 3) + (− 1, − 2; 3) based on [16], where L(p,q;p) is the standard bivariate normal integral shown as follows:

Theorem 3. Fault slope value (FSV) is a random variable T that follows the nominal ratio distribution (the ratio of two normal random variables) according to Theorem 2 and its definition in
where 1 , 2 , and 3 are shown as follows: 4 Figure 5: (a) Circuit fault ( or ) can de determined if the corresponding variation of nodal voltage is found in the range of 1 , or in the range of 2 . Furthermore, due to the data fusion between 0 and , the fault diagnosis error of is no more than 100(2 )% if and only if 100(1 − )% upper confidence limit of is while 100(1 − )% lower confidence limit of is . (b) The data fusion caused by the worst tolerance in a circuit.

Furthermore,
In practice, there exist lots of numerical algorithms for estimation of the ratio of two normal random variables. For instance, the computation in [17] could reduce a maximum error to 2 × 10 −7 , which guarantees the accurate FSV value estimation. In particular, when > 0, ( )/( ) 2 is small enough, the cumulative distribution function (CDF) for FSV is further simplified to where Φ(•) is the CDF of a standard normal distribution. The derivation ( < 0) can be developed in a similar way; then the estimated FSV can be located in according to its upper and lower tolerance limits of a standard normal distribution: if upper confidence limit 100(1 − )% for ( , ) is set at ( , ), then − ( , ) is the lower confidence limit 100(1 − )% for Φ(− ( , )), so that the value of can be obtained through Φ(− ( , )) = . Here, − ( , ) = and = Φ −1 ( ).

Fault Diagnosis with Fault Diagnosis Error Requirement.
In a circuit under test (CUT), the estimated range of FSV is represented in Table 1  . . . , . . .
The determination of = min{ } and = max{ } is related to the fault diagnosis error determined by normal ratio distribution through Theorem 4. In this theorem, the fault diagnosis error limit is calculated through the data fusion probability among different circuit fault states. Proof. Without loss of generality, in Figure 5(a), on the condition that 100(1 − )% upper confidence limit is for fault state and 100(1 − )% lower confidence limit is for , ̸ = , it is obvious that the integration of CDFs in Figure 5 is less than the CDFs integration between threshold and , meaning that the fault diagnosis error of is <100(2 )%.
Once the required fault diagnosis error is satisfied with a given tolerance, such tolerance is less than the tolerance limit value, which is defined as Tor max (the worst component tolerance) in Definition 5.
Definition 5. Given a fault diagnosis error 100(2 )% requirement, the worst component tolerance surely leads to the data fusion pattern in Figure 5(b), where the 100(1 − )% confidence limit of FSV estimation is set at , for each fault state.
According to Definition 5 and Theorem 4, it is assured that the fault diagnosis error requirement can be satisfied if the actual tolerance is less than the tolerance limit Tor max .
Journal of Applied Mathematics 5 Then based on the corresponding value of FSV in Table 1, the fault diagnosis on a set of parametric fault is categorized into fault detection and isolation: (1) a fault can be detected if there is at least one test-node pair, on which the corresponding value of FSV owns no parametric overlaps with the faultfree state. (2) Meanwhile, a fault can be isolated meaning that this fault state can be distinguished from all other fault states because of no intersection of FSVs.
To be convenient in the following statement, we define where 1 ≤ ≤ , 1 ≤ ≤ , ̸ = . Then the result of fault diagnosis is measured through fault detection rate (FDR), fault isolation rate (FIR) as follows.
(1) Fault detection rate (FDR): the ratio of fault states that can be detected in a given fault states set: where the number of fault states is .
(2) Fault isolation rate (FIR): the ratio of fault states pair can be isolated based on a given fault states pair set: where the maximum number of isolated fault states pair is = ( − 1)/2.

Fault Parameter Identification Based on Normal Ratio
Distribution. The basic idea of statistics approach in fault diagnosis can also help us identify fault parameter. In this paper, the fault parameter identification needs the determination of the diagnostic fault parameter border, which decide how small the alteration of component parameter could be distinguished from fault-free state. As for the diagnostic fault parameter border, Theorems 6 and 7 are proposed. Proof. In the single fault case, the variation in corresponding element of Δ causes a monotonous variation to the mean of random variable in matrix according to the linear expression Δ = −( + −1 Δ ) . Thus, once a parameter or ( > > ) causes the altered distribution in fault state can be separated in a long enough distance from the distribution in the fault-free state 0 . Then, the fault states related to fault parameter ∈ [ , ∞) or (0, ] can all be detected through the measurement of Δ or the corresponding value of SFV on a test-node pair; that is, the diagnostic fault border is ( ). Furthermore, Theorem 8 gives the determination of fault diagnostic resolution, which means that the minimum component parameter variation that can lead to distinguishable response for fault identification.  A simple example of bipartite decision network is shown in its matrix form of (12); there are 4 potential test-nodes pair vertices 1,2 , 1,3 , 1,4 , and 1,5 while 4 fault pair vertices 0,1 , 1,2 , 1,3 , and 2,3 are given in corresponding rows. The first element in the matrix is 1 means the connections exist from ) .

Test-Nodes Set Selection Based on FSV
(16) Once the bipartite decision network is established, the proposed process of test-nodes selection is as follows.
(1) The target test-nodes set is initialized to a null set.
(2) The degree of all test-node pair vertexes are calculated, and then the most likely selected test node corresponding to the test-node vertex with the largest value of is selected.
(3) All the connections from the selected test-node pair vertexes to the fault states pair vertexes should be eliminated. Then, the corresponding fault states pair is set be diagnosed.

Computational Examples
In Since the hard faults (catastrophic ones) can be thought of as a case of soft faults and the single fault in circuit is the most probable occurrence, the discussions in these examples focus on the case of single soft fault.
The first example is shown in Figure 6. This example is used to demonstrate the critical results of proposed method for fault diagnosis based on statistical analysis, and the soft faults are set according to the same fault states of [14]: the parameter of faulty resistance drifts toward 8 K, varying more than 30% of its nominal value. Thus, there exist 10 soft faults Table 2: The FSV range estimated through the proposed normal ratio distribution for the circuit in Figure 6.
Based on Theorem 4, if the expected fault detection (isolation) error is set less than 10%, the interval estimation of FSV is given with a 95% confidence limit requirement in Theorem 3. The corresponding result is shown in Table 2. Then if we use (12)-(13), it is not hard to find the value of det ( ) = 1, = 1, 2, . . . , 10. Thus, the value of FDR in (14) is 100%. However, det ( 1,6 ) = 0. Then, the fault isolation rate (FIR) is 98%. Eventually, the requirement of FIR, FDR is also satisfied.
These fault isolation or detection result can be coded into a bipartite network. To be convenient, it can be expressed as a matrix shown in (17). Then, with the calculation and updating of test-nodes pair vertex degree in Table 3, it is simple to select the test-nodes set { 1 , 5 } to meet the requirement of fault diagnosis: ) ) ) ) ) ) ) ) ) ) . Figure 6: (a) The linear analogue circuit with test nodes 1 − 5 . (b) A circuit under test used to calculate the FSV value for fault diagnosis. In this paper, the simulation of the circuit in Figure 6 also points out that how the method which is dependent on the assumed normal distribution brings deviation of estimated FSV, compared with the proposed method result. In fact, in Table 4, the inaccurate estimation of FSV from assumed normal distribution (NDS) leads to some loss of FSV range in all possible given tolerance when compared with that in NQSbased estimation (proposed method). For instance, when the tolerance is 5%, and the corresponding FSV calculated from voltage measurement (on the test-nodes of 1 , 3 ) is larger than 4.00 (4.00 > 3.98), the corresponding fault states 6 are undiagnosed case in the point of view of NDS. Furthermore, the difference of FSV range can be found in all common tolerance, and it deteriorates with increasing tolerance value.  Table 4.
Up to now, the simulation-based illustrations in the linear circuits of Figure 6(a) have shown the critical result of fault diagnosis in Table 3. After that, we test the effectiveness of solution of Table 3 in an actual measurement. In this test, an investigated fault is set as the fault value of 8 K, while all other fault-free components are randomly selected from a set of actual components set with tolerance of 5%. The corresponding circuit diagnosis result is shown in Table 5.
According to Table 5, these results of the statisticsbased method are preserved in the actual diagnosis: (1) the optimum test-nodes set for fault diagnosis is 1,5 according to both the simulation result in Table 2 and the actual test of circuit diagnosis in Table 5; (2) the required fault detection/isolation rate is satisfied (≥90%) in both the simulation and practical measurements; (3) the fault state 1 is ambiguous to. 6 with the fault signature of FSV according to Table 2, and this solution is observed in the actual circuit test.
The proposed fault diagnosis method is also effective in the analogue circuit composed of linear amplifiers. In this case, the tolerance is 10%. And the nominal components values of are 10 K and 1 = 10 nF, 2 = 20 nF, 3 = 20 nF,    With the proposed statistics-based method, the estimations of FSV value have been shown in Table 6. Clearly, it gives us these solutions for fault diagnosis: (1) the test-nodes set is 1 , 5 or 1 , 6 ; (2) and the fault detection rate (FDR) can be 100%, while the fault isolation rate is (FIR) 100%. All of these solutions will be testified in a tolerance-influenced actual circuit. Here, such circuit is constructed in Figure 7(b), where the external stimulus is a sin-wave with 1 kHz frequency and 1.0 V amplitude value. Therefore, in a practical test, the corresponding FSV values from the measurements on testnodes pair ( 1,5 or 1,6 ) are shown in Table 7, based on the voltage measurement on 1 , 5 , 6 . The corresponding fault diagnosis result tell us the following: (1) the proposed spastics approach can give us the correct and effective testnodes selection for fault diagnosis; (2) it determines what the final fault diagnosis result (fault isolation/detection) is in the tolerance consideration, which benefit us in the fault diagnosis result prediction for an actual circuit test with a required fault detection rate/fault isolation rate.

Conclusion
This paper builds a statistics-based viewpoint in order to solve the tolerance problem in accordance with given fault diagnostic requirements. Based on this point of view, the relationship between tolerance limit and fault diagnosis error limit can be discovered in this paper. And in the process of fault diagnosis, the accurate statistical feature discussion let us know more accurate response varying range, which assure that the measurement reduction (test-nodes selection) and fault parameter identification can avoid incorrectness in fault diagnosis applications. As a matter of fact, all of these advantages have been analysed and tested in the experiment of linear-circuit benchmarks. This is an acute view to handle the tolerance problem in analogue circuit diagnostic design and fault diagnosis. Furthermore, it can be generalized in the following cases.
(1) Although the hard fault is not the main focus in this paper, the proposed method could be generalized to hard fault case. (2) The discussion of accurate analysis on the SFV can be used in the nonlinear circuit cases, as long as the linearwise segments modelling can be established. In this case, because the operating point change is a polyline in the nodal voltage plane, the SFV near the operating point can also be considered the effective feature for the fault diagnosis. All of these discussions should be carried in further research.