This work presents a novel coefficient mapping method to reduce the area cost of the finite impulse response (FIR) filter design, especially for optimizing its coefficients. Being capable of reducing the area cost and improving the filter performance, the proposed mapping method consists of four steps: quantization of coefficients, import of parameters, constitution of prime coefficients with parameters, and constitution of residual coefficients with prime coefficients. Effectiveness of the proposed coefficient mapping method is verified by selecting the 48tap filter of IS95 code division multiple access (CDMA) standard as the benchmark. Experimental results indicate that the proposed design with canonical signed digit (CSD) coefficients can operate at 86 MHz with an area of 241,813 um^{2}, leading to a throughput rate of 1,382 Mbps. Its ratio of throughput/area is 5,715 Kbps/um^{2}, yielding a higher performance than that of previous designs. In summary, the proposed design reduces 5.7% of the total filter area, shortens 25.7% of the critical path delay, and improves 14.8% of the throughput/area by a value over that of the best design reported before.
Digital signal processing applications are common in home entertainment systems, television sets, highfidelity audio equipment, and information systems. The digital filter is an important component in mathematical operations on a sampled, discretetime signal to enhance the certainty of a signal. The digital filter is characterized by its transfer function. Two digital filters are infinite impulse response (IIR) and finite impulse response (FIR) filters. The IIR filter consists of a transfer function with feedback mode, and the FIR filter consists of the function with nonfeedback mode. Commonly found in image processing, audio processing, and wireless communications, FIR filter applications are characterized by a linear phase, arbitrary magnitude, and relatively easy implementation. The filter hardware consists of adders, subtractors, shifters, and registers. Many related works [
The rest of this paper is organized as follows. Section
Digital filters generally vary in coefficients, based on their specifications. The design of coefficients in a filter can be divided into four portions: coefficient selection, coefficient identification, searching algorithm, and coefficient quantization.
The equation of FIR filter can be expressed as (
Parameter
Filter architecture of a direct form.
Coefficients
In addition to using two horizontal methods and one vertical searching method to extract the CSs, the method in [
Following implementation of the above searching methods, the CSs can be extracted and the same CSs can be used for calculation only once. Calculation times of the filter are reduced due to the extractions. These searching methods can also reduce the required number of adders and subtractors. To verify the different searching methods, the 48tap filter of IS95 CDMA is selected as the benchmark.
The mapping method divides the coefficients into two parts: primary coefficients and remaining coefficients. The parameters that are set up in the algorithm are
Normalize the
Separate normalized coefficients
Quantize
Find a multiple value
Quantize
Let
Constitute
Revert the parameters
Let
For example, this work selects 18 coefficients
Before performing the mapping method, this work first sets up two parameters in which
New coefficients after performing the mapping method (
Group  Sign  Coefficient  Error rate (%)  







−  829  832 ( 
0.36 

−  1120  1120 ( 
0.00 

−  1172  1184 ( 
1.01 

−  548  544 ( 
0.74 

+  708  704 ( 
0.57 

+  2128  2144 ( 
0.75 

+  2982  2976 ( 
0.20 

+  2684  2688 ( 
0.15 

+  1215  1216 ( 
0.08 



−  721  832 ( 
13.3 

−  1990  1960 ( 
1.53 

−  1677  1776 ( 
5.57 

+  258  272 ( 
5.15 

+  2765  2816 ( 
1.81 

+  4157  4288 ( 
3.06 

+  3098  2976 ( 
4.10 

−  421  672 ( 
37.4 

−  4560  4560 ( 
3.09 
(a) Frequency responses, poles and zeros distributions of the original filter. (b) Frequency responses, poles and zeros distributions of the modified filter.
For comparison, Table
Performance comparison of various 48tap filter designs for generating 16bit outputs.
Methods  Info.  

Architecture level  Gate level  
Area no. of add., sub., and reg.  Area (um^{2})  Critical path delay (ns)  Throughput (Mbps)  Throughput/area (Kbps/um^{2})  
Binary  (220, 0, 48)  300284  12.61  1268  4225 
CSD  (88, 74, 48)  299622  12.08  1324  4421 
Pa 
(76, 22, 48)  271357  15.08  1061  3910 
Jang and Yang [ 
(72, 70, 48)  295567  15.27  1047  3545 
Vinod et al. [ 
(62, 34, 48)  274025  14.32  1117  4077 
Choo et al. [ 
(67, 24, 48)  259104  14.18  1128  4355 
Takahashi and Yokoyama [ 
(78, 22, 48)  273902  15.28  1047  3823 
Mahesh and Vinod [ 
(88, 0, 48)  255450  15.58  1271  4979 
Kato et al. [ 
(64, 26, 48)  264240  14.46  1106  4187 
Vinod et al. [ 
(62, 34, 48)  260976  14.25  1122  4303 
Our method with binary format  (66, 0, 48)  244547 (4.3%)  11.45 (26.5%)  1397 (9.9%)  5713 (14.7%) 
Our method with CSD format  (23, 33, 48)  241813 (5.3%)  11.58 (25.7%)  1382 (8.7%)  5715 (14.8%) 
Table
This work has developed a novel filter design with coefficient mapping method. The proposed method can reduce the area cost by finding the primary coefficients and using them to construct the remaining coefficients. The proposed method can also use several coefficients and construct all of the filter coefficients. Experimental results demonstrate that the proposed design with binary or CSD coefficients can more significantly reduce the area cost and improve the ratio of throughput/area compared with previous designs. Implementation results further demonstrate that the proposed design has the highest throughput with the lowest area cost.
This work is supported in part by the National Science Council of Taiwan under Grants NSC 992221E327046.