Mathematical Problems in Engineering

Volume 2013 (2013), Article ID 691740, 23 pages

http://dx.doi.org/10.1155/2013/691740

Research Article

Electrical Network Functions of Common-Ground Uniform Passive RLC Ladders and Their Elmore’s Delay and Rise Times

D. B. Kandić,¹ B. D. Reljin,² and I. S. Reljin³

¹Department of Physics & Electrical Engineering, School of Mechanical Engineering, University of Belgrade, Kraljice Marije 16, 11120 Belgrade, Serbia

²Department of General Electrical Engineering, School of Electrical Engineering, University of Belgrade, Bulevar Kralja Aleksandra 73, 11000 Belgrade, Serbia

³Department of Telecommunications, School of Electrical Engineering, University of Belgrade, Bulevar Kralja Aleksandra 73, 11000 Belgrade, Serbia

Received 18 February 2013; Accepted 19 May 2013

Academic Editor: Xinkai Chen

Copyright © 2013 D. B. Kandić et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

Abstract.

In the paper are presented the expressions for all network functions of common-ground, uniform passive ladders having, in general, complex terminations at both their ends. The Elmore's delay and rise times calculated for selected types of RLC ladders have indicated their slight deviation from delay and rise times obtained according to their classical definitions. For common-ground, integrating type RC ladder with voltage-step input, the Elmore's delay- and rise-times are produced in closed-form, both for ladder nodes and points. Furthermore, it is proposed a particular common-ground, uniform RLC ladder being amenable to application as delay line for pulsed and analog input signals. For this ladder, the Elmore's delay and rise times relating to their node voltages are produced in a closed-form, enabling thus with the realization of artificial (a) pulse delay line with arbitrarily and independently specified overall Elmore's delay and rise times and (b) true delay line with arbitrarily specified delay time for frequency bounded analog and/or pulsed input signals. In cases (a) and (b), precise procedures are formulated for calculation of ladder length and of all its RLC parameters. The obtained results are illustrated with several practical examples and are, also, verified through PSPICE simulation.

1. Introduction

Modeling of digital MOS circuits by RC networks has become a well-accepted practice for estimating delays [1–6]. In digital integrated circuits, signal propagation delay through conducting paths with distributed resistance and capacitance is frequently a significant part of the total delay. These conducting paths, or “interconnections,” can be modeled quite accurately by nonuniform, branched RC ladder networks, also known as “RC trees” [3]. Computationally simple bounds for signal delay in linear RC tree networks were found in [3] and have been used in several practical MOS timing analyzers reported in [6], but certain circuits used in MOS logic cannot be modeled as RC trees since they contain one or more closed loops of resistors, and these general RC networks are being referred to as “RC meshes”. In these networks, the time delay defined according to Elmore [7] is proved to be the valid estimate, and this fact has been used in [5] to advantage in an approach to MOS timing analysis of general RC networks containing RC meshes. Simple closed-form bounds for signal propagation delay in linear RC tree models for MOS interconnections derived in [3] are, also, valid for the more general class of linear networks known as RC meshes, which are useful as models for portions of MOS logic circuits that cannot be represented as RC trees [6].

Elmore’s delay is an extremely popular timing-perfomance metric which is used at all levels of electronic circuit design automation, particularly for RC tree analysis. The widespread usage of this metric is mainly attributable to its property of being a simple analytical function of circuit parameters, and its drawbacks are the uncertainty of accuracy and restriction to being the estimate only for the step-response delay. An extension of Elmore’s delay definition has been proposed in [8] to accommodate the effect of nonunit-step (slow) excitations and to handle multiple sources of excitation, in order to show that delay estimation for slow excitations is no harder than for the unit-step input. In [9] it has been shown that this extension of Elmore’s delay time offers a provision to deal with slow varying excitations in timing analysis of MOS pass transistor networks. In addition, in [10] it has been reported that Elmore’s delay is an absolute upper bound on the actual 50% delay of an RC tree response. Also in [10], it has been proved that this bound holds for input signals other than steps and that actual delay asymptotically approaches to Elmore’s delay as the input signal rise-time increases. It has been emphasized in [11] that RC tree step responses always are monotonic, and this is why Elmore’s definitions of both delay and rise time [7] are applicable on complex RC tree networks.

In this paper we will firstly derive the general, closed-form expressions for input and transfer functions of common-ground, uniform, and passive ladders with complex double terminations, making a distinction between the signal transfer to ladder nodes and to its points. Then, simplifications of the obtained results are produced for ladders with seven specific pairs of complex double terminations being interesting from the practical point of view. Thereafter, for a uniform, common-ground RLC ladder with (a) a relation between its parameters resembling to analogous relation between per-unit-length parameters of distortionless transmission line and (b) symmetric, resistive double termination resembling to characteristic impedance of distortionless line [12], it will be shown that its Elmore’s delay and rise times for point voltage transmittances can be efficiently calculated (but not in the closed form) by using of the numerical scheme proposed herein. In this case, we will see that the obtained numerical values for Elmore’s times differ slightly from the delay and rise times obtained according to their classical definitions and by using PSPICE simulation when ladder is excited by a step voltage.

For the integrating type of distributed RC impedance, common-ground ladder as a model of two-wire line, it has been suggested that it might be used as a true pulse delay line [13], provided that, Schmitt triggers are used for reshaping the delayed and edge-distorted transmitted signals. This type of delay line with step-input excitation has already been thoroughly investigated in [14]—where Elmore’s delay time is given in closed form only for ladder nodes, and for Elmore’s rise time is offered a conjecture relating to its lower bound for overall network. Elmore’s rise times for all nodes of integrating, RC open-circuited ladder are given in closed form in [15] and the obtaining of Elmore’s delay and rise times both for nodes and points is discussed to some extent in [16]—for other types of open-circuited ladders. In this paper, we are going to formulate the explicit closed-form expressions for Elmore’s delay and rise times both for the node and point voltages of integrating open circuited, common-ground RC ladder and will conclude that this type of network is not recommendable for pulse delay line in its own right, since Elmore’s rise time of each point voltage is not less than the twice of its delay-time.

And finally, we will propose a type of uniform, common-ground RLC ladder amenable for application as delay line both for pulsed and/or analog input signals. Elmore’s delay and rise times of this ladder relating to the node voltage transmittances are produced in closed form, opening thus with the following possibilities in ladder realization:

(i)for pulsed inputs, the overall Elmore delay and rise times may be specified arbitrarily,(ii)for pulsed inputs, the minimum ladder length (i.e., the minimum necessary number of sections) is calculated straightforwardly by using only the overall Elmore delay and rise times,(iii)the ladder RL parameters are calculated uniquely from the assumed nonminimal ladder length, overall Elmore delay time, and the assumed capacitance values,(iv)for realization of true delay for pulsed and/or analog input signals with arbitrary variation in time, minimum ladder length is calculated from the specified true delay time (which asymptotically tends to Elmore’s delay time when the number of sections tends to infinity) and maximum frequency in the spectrum of the signal being transmitted along the ladder purporting to represent delay line. And again, as in (iii), the ladder RL parameters are determined from the ladder length, overall ladder true delay time (being approximately equal to Elmore’s delay time), and the assumed capacitance values. The previous approach and obtained results are illustrated and verified with realization examples of large true delay time (=5 [ms]) for pulsed, sine, distorted sine, CAM, FM; and chirp frequency and sweep amplitude input signals.

Recall that in network synthesis the ladder topology is a preferable one, since it has very low sensitivity to variations of RLC parameters [16, 17].

2. Network Functions of Common-Ground, Uniform, and Passive RLC Ladders

Consider a uniform, grounded, and passive RLC ladder in Figure 1 with identical sections, whose impedances and are positive real rational functions in complex frequency (). There on are denoted the Laplace transforms of the voltage excitation , and of the point voltages and currents , and and of node voltages and currents . The internal impedances of the voltage excitation (voltage generator) and the load are and , respectively. All the initial conditions associated to the network reactive (LC) elements are assumed to be zero.

Figure 1: The general, common-ground, uniform ladder with sections.

For ladder in Figure 1, the mesh transform equations for its th section () read

The boundary values of voltages and currents in the set of matrix difference equations (1) are and . For , from (1) it immediately follows that

Since the roots (say and ) of the characteristic equation corresponding to matrix appearing in (1),

satisfy the relations and , then by taking for convenience and , we obtain . By using Cayley-Hamilton’s theorem we may put

where the “constants” and are determined from system of equations and , whose solution is and .

By substituting and in (4) and bearing in mind that

we finally obtain from (2) and (4) for that

Since uniform ladder sections are electrically reciprocal, then their characteristic impedance and the quantity can easily be produced in the form

For the ladder depicted in Figure 1, the complete set of the network immittance and voltage/current transmittance functions can be produced, by using the relations (2), (6), and (7):

Since , then the voltages and currents of impedances connecting the middle nodes of ladder sections () to common-node (Figure 1) are given as

Consider now the particular selection of , to investigate the generation of finite length, frequency-selecting ladders with various input and transfer immittances and voltage and current transmittances and specific ladder which can take the role of finite pulse delay line without pulse attenuation and with independently controlled pulse delay and rise times in Elmore’s sense [7], calculable in closed form. We will assume that impedances and are rational positive real functions in , so that they are realizable by passive transformerless RLC networks [17]. All network functions in (8) and (9) are real rational functions in , except , which must be rational, positive real function in , since it is the input immittance of RLC network.

Case A ( -arbitrary [ ]) (open-circuited ladder). From (8) and (9) it follows,

Since we have , then by Property 2 (Appendix A),    (10) can be easily converted into real rational function of or of . Similarly, by Property 3 (Appendix A), (10) can be, also, easily converted into real rational function of or of . When and are one-element-kind impedances, the zeros and poles of both and can be easily determined in the closed form. Since by Property 3   and contain the same factor , then (11) can be, also, easily converted into real rational function, either of or of the complex frequency .

Case B ( []). In this case (10) and (11) simplify to

Case C (-arbitrary   (short-circuited ladder)) From (8) and (9) it is obtained,

According to Properties 2 and 3, respectively, and (14) can be easily converted into real rational functions, either of or of the complex frequency . If and are one-element-kind impedances, the zeros and poles of both and can be determined straightforwardly in closed form. Now, since and/or , it can be seen from (15) that is, also, convertible into real rational function, either of or of the complex frequency , by using of both Properties 2 and 3.

Case D (). From (14) and (15) it readily follows that

By using of Properties 2 and 3 and , it can be seen from (16) and (17) that the network functions , , , , and can be easily converted into real rational functions, either of or of the complex frequency .

Case E (). From (8) and (9), after using the relations , and , it can be easily obtained that

Case F (). From (8) and (9), after using relations , and , it readily follows that

Case G (). From (7) it is easily obtained that , and . And from (8) and (9) it follows that

From (22) and (23) it can be seen that even when emf [with Laplace transform ] is pulsed, the node and point voltages with respect to common-ground (Figure 1) are reproduced faithfully and without delay but with geometrically progressive amplitude attenuation, regardless of the impedance .

It is clear that relations (7)–(9) offer many other possibilities for the selection of , , , and that lead to generation of versatile ladders realizing different types of frequency selective networks. An interesting one seems to be the common-ground RLC ladder realizing (a) pulse delay with independently selected Elmore’s delay and rise times and/or (b) true delay for either pulsed or analog frequency limited input signals. These topics will be considered in the following section.

3. Elmore’s Delay and Rise Times for Selected Types of Common-Ground, Uniform RLC Ladders

Consider the ladder in Figure 1 having , , and . Suppose that it holds the relation , similar to the one associated with per-unit-length parameters of distortionless transmission line [18, 19]. Let us define the auxiliary parameter , and let us recast the network voltage transmittances describing the transfer of emf to the ladder points with voltages   (Figure 1)—in the form suitable for calculating of Elmore’s delay and rise times [7] (Appendix B). Firstly, we should observe that the following holds:

and then by using (8) and the Properties 2 and 3, let us express the point voltage transmittances and in the following form:

As the calculation example of Elmore’s times, let us suppose for this type of ladder that the specified parameters are , [], [mH], [mS], and [F]. We firstly calculate [1/s], and [1/s], and then we recast and (25) in the following form:

where all “” and “” coefficients are positive. To apply Elmore’s definitions of delay and rise times (Appendix B) for all points in the ladder with zero initial conditions (Figure 1) and excited at with the step-voltage with amplitude , we must do the following.

(i)Firstly, check that the point voltages have no overshoots, or eventually if they are present, overshoots must be less than 5% of those voltages steady state values [7]. For example, if we have assumed for ladder with sections that [V], then its voltage step-responses and the node response as well, obtained through PSPICE simulation and depicted in Figures 2 and 3 in the interval , reveal that Elmore’s definitions cannot be applied for responses and , since the occurrence of overshoots, whereas for all other point voltages , those definitions are applicable.(ii)Secondly, calculate the coefficients , , , , , and , so as to determine the parameters , , , and of the normalized transfer functions and obtained from (26) according to the relations

Calculation of coefficients ,, , , , and in (26) might be a tedious task, especially when is large, since these coefficients are produced from (25) as cumbersome expressions which cannot be put in the closed form. So, we must resort to making of a numerical application (say in MATHCAD) for automatic calculation of , , , , , , , , , , and Elmore’s times, for any given set of input parameters , provided that the condition is satisfied.(iii)Calculate Elmore’s delay time () and rise time () of any point step-voltage response having no overshoot, according to definitions in Appendix B and by using (27)

For RLC ladder having , [mH], [mS], [F]—excited at by step emf with amplitude [V], the obtained results are summarized in Table 1.

Table 1: Delay and rise times of the point voltages in the considered common-ground, uniform RLC ladder.

n
0
1
2
3
4
5
6

[ms]
0.813
0.680
0.547
0.415
0.286
0.158
0

[μs]
0.323
0.225
0.145
0.082
0.037
0.010
0

[ms]
0.804
0.804
0.804
0.804
0.804
0.804
0.804

[μs]
0.315
0.315
0.315
0.315
0.315
0.315
0.315

[ms]¹
Not applicable
0.124
0.257
0.388
0.518
0.647
0.804

[ms]¹
Not applicable
0.157
0.200
0.229
0.250
0.286
0.326

[ms]²
Not applicable
0.115
0.257
0.395
0.528
0.658
0.817

[ms]²
Not applicable
0.190
0.252
0.295
0.324
0.349
0.373

[V]³
5.999
2.999
1.498
0.747
0.370
0.178
0.075

The times calculated according to Elmore's definitions.

2The times obtained through PSPICE simulation according to the classical definitions of (“50%” delay time) and (“10%–90%” rise time).

3All data are related to the ladder with zero initial conditions.

Figure 2: A set of voltage responses at the selected points of the considered ladder (and at the node).

Figure 3: Another set of voltage responses at the selected points of the considered ladder.

Another interesting ladder in Figure 1 is the one with , , , and . Again, let it be . By using of (8) and Properties 2 and 3, the point voltage transmittances    and are obtained as follows:

In this case, Elmore’s delay and rise times can be calculated in the similar way as it has been done in (25). The specified set of parameters provided that the voltages of selected ladder points and/or nodes satisfy the condition , Elmore’s times can be calculated by using (26)–(29), but further consideration of this point will be left to the reader.

Also, an interesting ladder is the one with (Figure 1), which resembles to a delay line [13], but it does not truly behave like it and rather may be used for generation of delayed time markers with Elmore’s times expressible in the closed form. To see this, let us produce the point voltage transmittances and the node voltage transmittances , by using (8), (9), and Property 2 or Case A (10):

Observe that if , then also , and from (30) and (31) it follows that    and   . This is in obvious physical agreement with the network behaviour in DC operating regime. The previous conclusions could be, also, formally verified by using Remark 1 (Appendix A) in calculation of and for . If excitation of the network with zero initial conditions is step voltage at with amplitude , then . From (30), (31), and Remark 1 we can, also, easily see that and . In this case it can be shown that (i) the node and the point voltages are strictly monotone in [11], so that Elmore’s definitions can be applied leading to (ii)   closed-form expressions of delay and rise times for node voltages [15]. To illustrate the point (i) let us consider the network in Figure 4 whereon capacitance voltages are denoted with . Let us introduce notation , ,  , (“T”-operation of matrix transposition), and . For the ladder in Figure 4 the following system of state-space equations can be written in -domain:

( column vector),  [V] ( column vector of state initial conditions).

Figure 4: The common-ground, uniform, integrating RC ladder with sections.

Since the real symmetric regular tridiagonal matrix A is hyperdominant [17], then it is also positive definite and both similar and congruent to diagonal matrix [20], where   . So, there exists an orthogonal matrix Q [20], such that . If we introduce the coordinate transformation , then the vector differential equation in (32) takes on the following coordinate decoupled form:

( column vector of the “transformed” state-space initial conditions).

For , the matrices Q and D with entries rounded up to 3 decimal places are being obtained as

Now, if we suppose that the excitation is the step voltage at with amplitude [V], then the unique solution of the vector differential equation (32) is produced in following form:

The point voltages are obtained according to relations , and finally, for , we can produce by using (36) the closed form solutions of point and node voltages (in [V]), as “” and “” functions of normalized (i.e. dimensionless) “time” :

All “” and “” functions of are depicted in Figures 5 and 6 in the “time” interval .

Figure 5: and functions for the specified nodes and points of ladder in Figure 4.

Figure 6: and functions for the specified nodes and points of ladder in Figure 4.

Assume that is normalizing frequency and recast (30) and (31) in the following form by using Remark 1 (Appendix A):

The coefficients , , and (27) necessary for calculation of ) and according to Elmore's definitions (28) are obtained for (38) in the following form (see Corollary 3 in Appendix A):

provided that , and finaly, Elmore’s delay and rise times for point voltages (Figure 4) are calculated in the closed form according to the relations

whereas Elmore’s delay times and rise times for node voltages (Figure 1) are calculated by using (38) and (39):

where

From (43) it follows that and from (44) that , which does not qualify this type of ladder for using as pulse delay line in its own right. If in the ladder on Figure 4, , and [nF] and is periodic pulse train with amplitude 10 [V], duty-cycle 50%, and period 100 , then excitation and node voltages (t), (t), and point voltage —obtained by PSPICE simulation, are depicted on Figure 7 in interval .

Figure 7: Some of the PSPICE simulation results for six segment integrating ladder in Figure 4 with   [nF], and pulse-train excitation with amplitude 10 [V], period , and duty-cycle 50%.

Finally, consider that the ladder in Figure 8 is analogue to the ladder in Figure 1. Assume and

Figure 8: Common-ground, uniform ladder, which may play the role of artificial delay line (ADL) for sufficiently large .

In this case, from (7) we obtain

From (50) it is found that , and from (9) it follows that

Relation (52) could have been produced in a less formal way by observing that the ladder in Figure 8 is a constant resistance network when , since the input impedances (denoted by dashed arrows) seen from the pertinent pairs of nodes are all equal to . If the ladder has no initial conditions and if it is excited by unit-step voltage , then for overall step response it holds that (a) , (b) , and (c) is a monotone increasing function in (i.e., has no overshoots) since we have

From (52) we obtain the “” and “” coefficients necessary for calculation of Elmore’s delay time and rise time for the network in Figure 8:

The procedure for determining the ladder parameters when both Elmore’s times and are specified consists of the following three steps: firstly, we calculate , and then from (54) we calculate the actual rise time ( remains unchanged), assume , and calculate and . When solely Elmore’s delay time is specified and is left unspecified, we arbitrarily select some reasonably great , so as to produce the sufficiently small of the output for the unit-step input and then follow the steps and .

But in the case when is small and we want to realize Elmore’s delay time for pulse train with period and duty cycle , it can be shown that one of the following two conditions must be satisfied, in order to prevent severe distortion of transmitted “pulses”: , when , or , when . For the ladder in Figure 8 with , [mH], and ], excited by the pulse train with amplitude 10 [V], period [ms], and duty-cycle , the obtained results of PSPICE simulation in the time interval [ms] are depicted in Figure 9, whereon are plotted the excitation , voltage of the 10th capacitor, and the voltage of the 20th capacitor. Elmore’s delay and rise times for voltage of the th capacitor (Figure 8) are, respectively, and , according to (54). For example, Elmore’s delay time of is and of is . Both these values are slightly different from those obtained according to the classical definition of delay time and they are denoted in Figure 9 for comparison. In this case, Elmore’s rise time for obtained from (54) is [ms] 560.5 [], whereas the classical rise time obtained from Figure 9 is slightly different, .

Figure 9: Realization of Elmore’s delay time [ms] for pulse-train input with amplitude 10 [V], period [ms], and duty-cycle , by ladder in Figure 8 with , . The output is .

Consider now the same ladder excited by the pulse train with amplitude 10 [V], provided that the condition is violated by supposing that [ms] and . The results of PSPICE simulation in the time interval [ms] are depicted in Figure 10 and obviously exhibit a severe distortion of “pulses” being transmitted to the end of the ladder.

Figure 10: Realization of Elmore’s delay time [ms] for pulse-train input with amplitude 10 [V], period [ms], and duty-cycle , by ladder in Figure 8 with , [mH], and . The output is .

Consider again the same ladder excited by the pulse train with amplitude 10 [V], provided that condition is violated by supposing that [ms] and . The results of PSPICE simulation are depicted in Figure 11 in the time interval [ms] and obviously exhibit a severe distortion of “pulses” being transmitted to the end of the ladder.

Figure 11: Realization of Elmore’s delay time [ms] for pulse-train input with amplitude 10 [V], period [ms], and duty-cycle , by ladder in Figure 8 with , [mH], and  ]. The output is .

And finally, consider the ladder in Figure 8 which should realize Elmore’s delay time [ms] and rise time . Let the excitation be the pulse-train with amplitude 10 [V], period [ms], and duty-cycle . To avoid a severe distortion of output pulses , it is sufficient to follow the previously formulated steps . So, according to the step we firstly calculate . Then, in the step we assume that, say, [F] and finally in the step we calculate [] and ]. The time variations of and obtained by PSPICE simulation are depicted in Figure 12 in the time interval [ms]. Therefrom, we find the classical delay and rise times of the output voltage , 5 [ms] and 575 [], respectively. Both these times are slightly different from the pertinent Elmore’s times (54), whose obvious advantage is that are explicitly calculable as functions of parameters of common-ground, uniform RLC ladder (Figure 8).

Figure 12: Realization of Elmore’s delay time [ms] and rise-time for pulse-train input with amplitude 10 [V], period [ms], and duty-cycle , by ladder in Figure 8 with , , and ]. The output is .

In the previous examples, we have investigated Elmore’s times of voltages at points and/or nodes in several characteristic types of common-ground uniform RLC ladders excited, either by step or by pulse-train emfs. In the most general case, consider the realization of physical delay time for arbitrary excitation (i.e., true delay time), by using the RLC ladder in Figure 8 (true delay line). If we presume for this network that , then from (52) and (54) it readily follows that

so that the overall network response becomes (i.e., is the exact replica of the excitation delayed by the time ). Let us firstly introduce the notation

and then investigate the conditions under which the function becomes close to the number . It is obvious from (55) that these conditions relate to certain restrictions in the span of , , and . Observe that when . After some manipulation, from (56) we easily obtain

where Arg is expressed in radians and should be multiplyed by to be expressed in [deg].

The function is depicted in Figure 13. From the set of its associated numerical data it can be seen that for we have when and when . In other words, for to be close to , it is sufficient in this case to provide that , where is the maximum frequency in the spectrum of the signal being transmitted through the RLC ladder in Figure 8 having almost true time delay equal to Elmore’s delay time , or , where [] is delay time expressed in [ms].

Figure 13: The plot of function in the -region of interest.

The function [deg] is depicted in Figure 14. From the set of its associated numerical data it can be seen that for we have [deg] to be close to 0, say to be , it is sufficient in this case also to provide that .

Figure 14: The plot of function in the z-region of interest.

For properly selected (i.e., ), the ladder parameters are found according to the previously formulated steps : arbitrarily select and calculate and .

As a final example, consider the ladder in Figure 8 with parameters: , [], , , and the Elmore’s delay time [ms]. Since condition is satisfied for [Hz], then this ladder may be used as true delay line for every input signal with maximum spectral frequency up to , with output being almost the replica of with no attenuation and virtually constant delay equal to Elmore’s delay time. The results for this ladder excited by various input signals , produced by using of PSPICE simulation, are depicted in Figures 15, 16, 17, 18 and 19. There on it may be noticed that the overall output voltage of this ladder as of artificial delay-line (ADL) is represented by , with absolute error .

Figure 15: PSPICE verification of delay time [ms] for 10 [V]/20 [Hz] sine-wave input .

Figure 16: PSPICE verification of delay time [ms] for input wave with period [s], linear frequency chirp [Hz], and linearly increasing amplitude [V].

Figure 17: PSPICE results for transfer with delay [ms] of CAM input wave with carrier 10 [V]/100 [Hz], modulation index , and the intelligence frequency 50 [Hz] within ADL in Figure 8.

Figure 18: PSPICE results for transfer with delay [ms] of FM input wave with carrier 10 [V]/50 [Hz], modulation index and intelligence frequency 25 [Hz] within ADL in Figure 8.

Figure 19: PSPICE results for transfer with delay [ms] of input wave with period [s], linear frequency chirp  [Hz], and linearly increasing amplitude [V] within ADL in Figure 8.

In the paper [12] it is proved that by using distortionless transmission line with resistive load equal to the line characteristic impedance   ( and are per-unit-length inductance and capacitance of line, resp.), even a relativelly small signal delay cannot be realistically produced. For example, signal delay [ms] can be realized with lossless line having the constant parameters [pF/m], and load resistance [], at the distance 962.25 [km] from the line sending end, but when distortionless line is lossy and terminated with characteristic impedance , then besides the time delay at distance , the signal attenuation factor ( and are the per-unit-length resistance and conductance of the lossy line, resp.) must be also taken into account [18]. Realization of pulse delay [ms] with lumped RLC network in Figure 8 is verified in Figure 12 and seems to be the more comfortable approach than using lengthy distributed parameter networks. In general, realization of any time delay for signal with maximum spectral frequency can be accomplished by using the uniform ladder in Figure 8 with length selected according to the condition /. The ladder parameters are calculated according to relations and , where may be selected arbitrarily.

Finally, in Figures 20 and 21 the results of PSPICE AC-analysis are depicted with 1 [V] amplitude AC-input in the entire frequency range [Hz] for network in Figure 8 with parameters , , and . In Figure 20 we see that the amplitude-frequency characteristics of the network are almost flat, and in Figure 21 we see that its phase-frequency characteristics are virtually linear with slope [deg/Hz]. Hence we conclude that the network in Figure 8 may satisfactorily realize the time delay for any input signal with spectrum in range [Hz].

Figure 20: The amplitude-frequency characteristics of the considered ladder in the frequency range [Hz].

Figure 21: The phase-frequency characteristics of the considered ladder in the frequency range .

4. Conclusions

In the paper, are derived general, closed-form expressions for network functions of common-ground, uniform, and passive ladders with complex double terminations are derived, making distinction in analysis between the signal transfer to ladder nodes and to its points. The obtained results are then simplified for ladders with seven specific pairs of complex double terminations. Elmore’s delay and rise times calculated for specific, important types of RLC ladders indicated slight deviation from delay and rise times values obtained according to their classical definitions.

For the common-ground, integrating RC ladder with step input, Elmore’s delay and rise times are produced in closed form, both for ladder nodes and ladder points. It has been shown that this type of ladder could not be recommended as pulse delay line in its own right, since its Elmore’s rise-times of point voltages are not less than the twice of their delay times.

And finally, in this paper we have proposed a specific type of common-ground, uniform RLC ladder amenable for application as delay line, both for pulsed and analog input signals. For this type of ladder, Elmore’s delay and rise times relating to the node voltages are produced in the closed form, which offers a possibility for realization of (a) the pulse delay line with arbitrarily specified Elmore’s delay and rise times and (b) the true delay line, both for pulsed and analog input signals, with arbitrarily selected delay time. For both cases (a) and (b), in the paper a procedure for the determination of ladder length and calculation of all its RLC parameters is specified. Recall that the ladder network topology is preferable one in the network synthesis, since it has very low sensitivity with respect to variations of RLC parameters. The obtained results are illustrated with several practical examples and are verified through PSPICE simulation.

Appendices

A.

Property 1. If (-set of complex numbers), then is the th order trigonometric polynomial in and is the product of and the th order trigonometric polynomial in .

Proof. Let , and let us make the following binomial expansion:

From (A.1) it readily follows that

Property 2. If , then the following finite product expansion holds:

Proof. According to Property 1, is the th order polynomial in . Then we have

Now, consider the complex equation with roots . Then it holds the following factorization:

For , from (A.5) we obtain the identity . Then, for , from (A.4) it firstly follows that , or , and then, upon substitution , also in (A.4), the following implication is obtained:

Property 3. If , then the following finite product expansion holds:

Proof. According to Property 1, is the product of and a polynomial in of order . Then we have

Now, consider the complex equation with roots and Then the following factorization holds:

wherefrom, for , we obtain the identity . Then, for , from (A.8) it firstly follows taht or , and then, upon substitution , also in (A.8), the following implication is obtained:

Remark 1. From proofs of Properties 2 and 3, we explicitly emphasize the following two identities having been obtained in passing

Property 4. If   (-set of real numbers), then the following identity holds:

Proof. The roots of the polynomial are , and they can be written in the following form: and . The considered polynomial has the following factorization:

where from for it follows that

It is easy to see that if is the set of natural numbers, then , for . And the opposite, if , then, for , we see that it holds and for it holds . Hence, we have proved that modulus signs can be lifted on both sides of the relation (A.14) and therefrom the relation (A.12) follows

Corollary 2. At its regular points, the function is equal to zero:

Proof. By differentiating (A.12) in we easily obtain that in regular points of it holds that

and by differentiating in the second relation in (A.16), (A.15) immediately follows. Observe that the statement of this corollary also holds if in (A.14) runs from 1 to (instead from 0 to ).

Corollary 3. The following two identities hold:

Proof. If in (A.15) of Corollary 3 we make the substitution , then let runs from 1 to , and finally select , the relation (A.15) is being transformed into the following form:

and thus with the first of relations in (A.17) is proved. Now, suppose that in (A.15) runs from 1 to , and differentiate this relation twice. As a result, after some manipulations, it is obtained that

If in (A.19) we make the substitution , let runs from 1 to , select , and finally use the same arguments as in (A.18), we immediately obtain the second of relations in (A.17).

B.

Let be the voltage transfer function of linear, lumped electrical network with zero initial conditions, and let be its normalized form :

where usually it holds that , since for most lumped physical systems the number of poles in transfer function is larger than the number of zeros. The normalized unit-step response of this network and its normalized impulse response are related through relations and . In the absence of the initial conditions we have . Convenient definitions of delay time () and rise time () of a network (or other physical systems), applicable only when its step response is monotonic (nonovershooting), originate from Elmore [7]:

In many practical situations it has been noticed that, when the unit-step response of network, or system, hasaovershoot less than 5% of its steady-state unity value, (B.2) will still be holding and the obtained results will be in close agreement with those produced by using the conventional definitions of delay and rise times [7]. Since , then from Elmore’s definitions (B.2) it is obtained that

and after the application of the long division on in (B.1) it follows that

Finally, from (B.3) and (B.4) we easily identify Elmore’s times as functions of only the coefficients [19]:

Acknowledgment

This work is supported in part by the Serbian Ministry of Science and Technological Development through Projects TR 32048 and III 41006.

References

C. A. Mead and L. A. Conway, Introduction to VLSI Systems, Addison Wesley, Reading, Mass, USA, 1980.

P. Penfield and J. Rubinstein, “Signal delay in RC tree networks,” in Proceedings of the 2nd Caltech Conference on Very Large Scale Integration, pp. 269–283, 1981.

J. Rubsinstein, P. Penfield Jr., and M. A. Horowitz, “Signal delay in RC tree networks,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 2, no. 3, pp. 202–211, 1983.

M. A. Horowitz, “Timing models for MOS pass networks,” in Proceedings of International Symposium on Circuits and Systems, pp. 198–201, 1983.

T.-M. Lin and C. A. Mead, “Signal delay in general RC networks,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 3, no. 4, pp. 331–349, 1984.

J. L. Wyatt Jr., “Signal delay in RC mesh networks,” IEEE Transactions on Circuits and Systems, vol. 32, no. 5, pp. 507–510, 1985.

W. C. Elmore, “The transient response of damped linear networks with particular regard to wideband amplifiers,” Journal of Applied Physics, vol. 19, no. 1, pp. 55–63, 1948.

P. K. Chan, “An extension of Elmore's delay,” IEEE Transactions on Circuits and Systems, vol. 33, no. 11, pp. 1147–1149, 1986.

P. K. Chan, “An extension of Elmore's delay and its application for timing analysis of MOS pass transistor networks,” IEEE Transactions on Circuits and Systems, vol. 33, no. 11, pp. 1149–1152, 1986.

R. Gupta, B. Tutuianu, and L. T. Pileggi, “The elmore delay as a bound for rc trees with generalized input signals,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 16, no. 1, pp. 95–104, 1997.

P. Penfield Jr. and J. Rubinstein, “Signal delay in RC networks,” in Proceedings of the 18th Design Automation Conference (DAC '81), pp. 613–617, July 1981.

D. B. Kandić, B. D. Reljin, and I. S. Reljin, “On modelling of two-wire transmission lines with uniform passive ladders,” Mathematical Problems in Engineering, vol. 2012, Article ID 351894, 42 pages, 2012.

F. T. Ulaby and M. M. Maharbiz, Circuits, National Technology and Science Press, Allendale, NJ, USA, 2009.

T. Lamdan, “Calculation of 'Elmore' delay for RC ladder networks,” Proceedings of the IEE, vol. 123, no. 5, pp. 411–412, 1976.

S. C. Dutta Roy, “Calculation of Elmore-defined delay and rise times of RC ladder networks,” Proceedings of the IEE, vol. 124, no. 11, pp. 1001–1002, 1977.

D. B. Kandić and B. D. Reljin, “Voltage transfer-functions and rise- and delay-times of homogeneous ladder networks,” in Proceedings of the 10th International Symposium on Theoretical Electrical Engineering, pp. 151–155, Magdeburg, Germany, 1999.

L. Weinberg, Network Analysis and Synthesis, McGraw-Hill, New York, NY, USA, 1961.

Y. H. Ku, Transient Circuit Analysis, D. Van Nostrand, New York, NY, USA, 1961.

M. S. Ghausi and J. J. Kelly, Introduction to Distributed-Parameter Networks with Application to Integrated Circuits, Holt, Reinhart and Winston, New York, NY, USA, 1968.

B. Noble and J. W. Daniel, Applied Linear Algebra, Prentice-Hall, Englewood Cliffs, NJ, USA, 2nd edition, 1977.