Mathematical Problems in Engineering

Volume 2014 (2014), Article ID 203123, 7 pages

http://dx.doi.org/10.1155/2014/203123

Research Article

Synchronization and Lag Synchronization of Hyperchaotic Memristor-Based Chua’s Circuits

Junjian Huang,1,2 Chuandong Li,1,3 Tingwen Huang,⁴ Hui Wang,⁵ and Xin Wang³

¹College of Computer Science, Chongqing University, Chongqing 400030, China

²Department of Computer Science, Chongqing Education College, Chongqing 400067, China

³College of Electronic and Information Science, Southwest University, Chongqing 400715, China

⁴Texas A&M University at Qatar, P.O. BOX 23874, Doha, Qatar

⁵School of Mathematics and Statistics, Chongqing Normal University, Chongqing 400047, China

Received 16 July 2014; Accepted 1 September 2014; Published 30 September 2014

Academic Editor: Ramachandran Raja

Copyright © 2014 Junjian Huang et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

Abstract.

A memristor-based five-dimensional (5D) hyperchaotic Chua’s circuit is proposed. Based on the Lyapunov stability theorem, the controllers are designed to realize the synchronization and lag synchronization between the hyperchaotic memristor-based Chua’s circuits under different initial values, respectively. Numerical simulations are also presented to show the effectiveness and feasibility of the theoretical results.

1. Introduction

The fourth fundamental circuit element included along with the resistor, capacitor, and inductor, called the memristor, was first postulated by Chua in 1971 [1]. Until 2008, the Hewlett-Packard (HP) research team announced that they had realized a prototype of memristor based on nanotechnology [2]. Many researchers focus on the memristor due to its potential applications in programmable logic, signal processing, neural networks, control systems, reconfigurable computing, brain-computer interfaces, and so on [3–9].

Itoh and Muthuswamy presented a fourth-order memristor based on Chua’s oscillator by replacing Chua’s diode with an active two-terminal circuit consisting of a conductance and a flux-controlled memristor and observed rich nonlinear dynamic behavior in such system [10, 11]. Bao et al. investigated the initial state dependent dynamical behaviors of the memristor-based chaotic circuit [12, 13]. In [14], a memristor with cubic nonlinear characteristics is employed in the modified canonical Chua circuit. In their work, a systematic study of hyperchaotic behavior in the circuit is performed. Hyperchaotic systems are being developed for applications in secure communications. It is important that memristive hyperchaotic systems are developed for implementation in coming generations of memristor-based devices. Novel dynamical behaviors of the memristor chaotic oscillator system are heavily dependent on the initial state of the memristor except for the circuit parameters. Namely, it is different from the traditional chaotic systems that the memory of initial state of the memristor is very important in producing complicated transient transition dynamics. The chaotic memristor-based oscillator system will enable the production of more complex and unpredictable time domain signals, which may result in applications for secure communications and encryption.

Many works have been done about the stabilization and synchronization of memristor-based systems [15–19]. Zhang et al. presented theoretical results on the global exponential periodicity and stability of a class of memristor-based recurrent neural networks with multiple delays [15]. Wu et al. formulated and investigated a class of memristor-based recurrent neural networks [18]. In this paper, by replacing Chua’s diode with a flux-controlled memristor circuit, a memristor-based five-dimensional (5D) hyperchaotic circuit is derived from four-dimensional Chua’s oscillator. Based on Lyapunov stability theory, we will study synchronization and lag synchronization of memristor-based hyperchaotic circuits. Hyperchaotic circuits are being developed for applications in secure communications [20, 21]. It is important that memristive hyperchaotic circuits be developed for implementation in coming generations of memristor-based devices. On the other hand, it has been shown that the complete synchronization of chaos is practically impossible for the finite speed of signals. Chaotic lag synchronization appears as a coincidence of shift-in-time states of interactive systems. It is just synchronization lag that makes lag synchronization practically available. So, in many cases, it is more reasonable to require the slave system to synchronize the master system with a time-delay. Thus, it is of great importance to study lag synchronization. This paper will study synchronization and lag synchronization between the hyperchaotic memristor-based Chua circuits.

The rest of the paper is organized as follows. In Section 2, a memristor-based 5D chaotic system is introduced. In Sections 3 and 4, using feedback control method, general convergence criterion for synchronization and lag synchronization of memristor-based chaotic hyperchaotic system is established. Numerical simulation results are given to show the effectiveness of the theoretical results. Conclusions are finally drawn in Section 5.

2. Problem Formulation and Preliminaries

Referring to [13], by replacing Chua’s diode with an active flux-controlled memristor circuit, a memristor-based five-dimensional chaotic circuit is derived from four-order Chua’s oscillator, as shown in Figure 1. The circuit consists of two capacitors, two inductors, and one memristor. The memristor is characterized by its incremental memductance function describing the flux-dependent rate of change of charge:

where ,   are constants.

Figure 1: The hyperchaotic circuit based on memristor [13].

And the equations for the circuit are described by

where .

Letting ,  ,  ,  ,  and , system (2) can be further rewritten as

When ,  ,  ,  ,  ,  , and , system (2) exhibits chaos or hyperchaos as shown in Figure 2.

(a)

(b)

(c)

(d)

Figure 2: The chaotic attractor of the memristor oscillator.

3. Synchronization of Hyperchaotic Systems-Based Memristor

Let system (3) be the drive system. In what follows, the coupled response system with feedback control is given by

where ,  ,  ,  ,   are the control function defined by

Letting , , be the synchronization error between systems (3) and (4) yields the error system

We now state our main results.

Theorem 1. Suppose that there exist positive constants ,  ,  ,  ,  , such that

then the synchronization error system (6) is asymptotically stable, and the systems (3) and (4) are asymptotically synchronized.

Proof. Choose the Lyapunov function as follows:

Then the differentiation of along trajectories of system (6) is

where , and

According to Lyapunov theory, the inequality indicates converges to zero asymptotically; that is, the error system converges to zero globally and asymptotically, and the synchronization between system (3) and system (4) is achieved.

In simulation, we select the parameters of memristor-based Chua’s system as initial values of drive and response systems are , and , respectively. From Theorem 1, the control gain is chosen as ,  . We plot the time response curves of the synchronization error system as shown in Figure 3. From Figure 3, one can see that the synchronization error of the hyperchaotic systems is asymptotically stable; that is, the synchronization between systems (3) and (4) is achieved.

Figure 3: Synchronization error of memristor-based hyperchaotic systems.

4. Lag Synchronization of Hyperchaotic Systems

In this section, we study the lag synchronization of memristor-based Chua’s circuit. The system (3) can be rewritten with two parts as follows:

where ,

As for vector function , assume that for any , we have

The above condition is considered as the uniform Lipschitz condition, and refers to the uniform Lipschitz constant.

We construct the response system as follows:

where is the response state and is the control gain defined by

where is the propagation delay and denotes control strength. Let be the lag synchronization error between the systems (11) and (14); then the error system is

We now state our main results.

Theorem 2. Suppose that there exist positive constants and such that

Then, the synchronization error system (16) is globally exponentially stable, and the systems (11) and (14) are globally exponentially lag-synchronized.

Proof. Choose the Lyapunov function as follows:

Then the differentiation of along trajectories of (16) is

According to Lyapunov theory, the inequality indicates converges to zero exponentially. Furthermore, we can conclude that the lag synchronization error system converges to zero globally and exponentially with exponential convergence rate , and the lag synchronization between system (11) and system (14) can be obtained. This completes the proof.

Let ; one obtains from Theorem 2 the following corollary.

Corollary 3. If there exist positive constants such that

then the synchronization error system (16) is globally exponentially stable, and the systems (11) and (14) are globally exponentially lag-synchronized.

In simulation, we select the parameters of memristor-based Chua’s system as initial values of drive and response systems are

Based on the bound of the hyperchaotic attractor, we can choose . Respectively, from Corollary 3, we select ,   and plot the lag synchronization errors curve, as shown in Figure 4. Figure 5 shows the norm of lag synchronization error of the memristor-based hyperchaotic systems. As the time goes to infinity, the lag synchronization error system is exponentially stable. Hence, the lag synchronization between system (11) and system (14) is achieved.

Figure 4: Lag synchronization error of memristor-based hyperchaotic systems.

Figure 5: The norm of lag synchronization error of memristor-based hyperchaotic systems.

5. Conclusions

This paper has studied the synchronization and lag synchronization of memristor-based 5D hyperchaotic circuits. The feedback controllers have been designed to stabilize the synchronization error system and lag synchronization error system. Simulation results were given to verify the effectiveness and feasibility of method.

Conflict of Interests

The authors declare that there is no conflict of interests regarding the publication of this paper.

Acknowledgments

This publication was made possible by NPRP Grant no. NPRP-4-1162-181 from the Qatar National Research Fund (a member of Qatar Foundation). The statements made herein are solely the responsibility of the authors. This work was also supported by Natural Science Foundation of China (Grant no. 61374078, Grant no. 61403050, and Grant no. 61302180).

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