A Novel Sigma-Delta Modulator with Fractional-Order Digital Loop Integrator

This paper proposes using a fractional-order digital loop integrator to improve the robust stability of Sigma-Delta modulator, thus extending the integer-order Sigma-Delta modulator to a non-integer-order (fractional-order) one in the Sigma-Delta ADC design field. The proposed fractional-order Sigma-Delta modulator has reasonable noise characteristics, dynamic range, and bandwidth; moreover the signal-to-noise ratio (SNR) is improved remarkably. In particular, a 2nd-order digital loop integrator and a digital PIλDμ controller are combined to work as the fractional-order digital loop integrator, which is realized using FPGA; this will reduce the ASIC analog circuit layout design and chip testing difficulties. The parameters of the proposed fractional-order Sigma-Delta modulator are tuned by using swarm intelligent algorithm, which offers opportunity to simplify the process of tuning parameters and further improve the noise performance. Simulation results are given and they demonstrate the efficiency of the proposed fractional-order Sigma-Delta modulator.


Introduction
Sigma-Delta modulator technology has been commonly used in various fields including inertial sensors, such as the MEMS accelerometer and gyroscope [1][2][3].Sigma-Delta modulator not only converts analog signal to digital signal but also can suppress the quantization noise of bandwidth effectively.Most of Sigma-Delta modulators are used in closed-loop architect in terms of linearity, dynamic range, and bandwidth [4].Considerable attention has been given to the issue of the MEMS accelerometer performance comparison between the low-order and high-order closed-loop Sigma-Delta modulators.Many literatures have pointed out that the low-order Sigma-Delta modulator yields better stability with simpler design parameters, but the performance in terms of noise level is unsatisfactory.By contrast, the highorder Sigma-Delta modulator has reasonable noise characteristics, dynamic range, and bandwidth, but its stability is not guaranteed.So, designing a Sigma-Delta modulator with high stability and outstanding performance is much desired to be researched.Recently, high-order Sigma-Delta modulator, which uses additional electronic integrator, has been designed [5].However, the stability of the high-order Sigma-Delta modulator is affected by variations of the MEMS accelerometer parameters [6].Previous work has mainly focused on using integer-order integrator as a loop integrator to form the high-order Sigma-Delta modulator to improve its SNR and noise performance [7].In this paper, a novel Sigma-Delta modulator with the fractional-order digital loop integrator is discussed.The proposed novel Sigma-Delta modulator contains a fractional-order     controller, which is able to provide the stability in the placement of fractional-type poles and zeros.
Fractional-order calculus belongs to the branch of mathematics, which is concerned with differentiations and integrations of non-integer-order [8,9].According to [10], the remarkable advantage of fractional-order integrator over its counterpart, the integer-order one, is that the stability and robustness of the fractional-order integrator are much stronger.At present, modeling real-world phenomena using fractional-order calculus has received great attention.As we all know, Sigma-Delta modulators that have been applied so far were all considered as integer-order modulators, whereas the proposed Sigma-Delta modulator with the fractionalorder digital loop integrator combines some characteristics of systems between the orders  and ( + 1).Therefore, we will have more possibilities for an adjustment of the poles or zeros of the noise-shaping integrator according to special requirements through changing the system order as a real (not only integer) value.In this paper, a novel Sigma-Delta modulator with the fractional-order digital loop integrator is presented, where the fractional-order digital loop integrator is cascaded between the analog-front-end amplifier and the quantizer.In detail, a 2nd-order digital integrator is used to perform noise-shaping of quantization noise from the comparator to improve SNR, and furthermore a digital     controller is immediately in series with the 2nd-order digital integrator to provide the weak or strong fractional-type poles or zeros to improve the robust stability for the proposed fractional-order Sigma-Delta modulator.The parameters of the proposed fractional-order digital loop integrator are tuned by using particle swarm optimization (PSO) algorithm, which is easy to optimize the digital loop integrator parameters.
The rest of this paper is organized as follows: in Section 2, a generalized structure of Sigma-Delta modulator is introduced; in Section 3, the proposed fractional-order Sigma-Delta modulator is discussed; then PSO algorithm for fractional-order Sigma-Delta modulator is presented in Section 4. Simulation results of the proposed Sigma-Delta modulator are demonstrated and analyzed in Section 5. Finally, conclusions are given in Section 6.

Mathematical Model of the Sigma-Delta Modulator System
Before discussing the proposed fractional-order Sigma-Delta modulator, a general system block diagram of Sigma-Delta modulator is shown in Figure 1, which illustrates a typical architect of Sigma-Delta modulator.
In Figure 1, () is the transfer function of the sensing element, which is a 2nd-order electromechanical integrator;  0 is the gain of analog-front-end (AFE) amplifier; () is a 2nd-order digital integrator, which is employed to perform noise-shaping of quantization noise from the 1bit comparator to improve SNR.So, Figure 1 presents a MEMS accelerometer-based 4th-order Sigma-Delta modulator, where the 2nd-order digital integrator () is inserted between AFE and 1-bit comparator;  1 is the quantizer gain;  1 is the quantization noise of 1-bit quantizer, and  2 is the equivalent linear model of 1-bit DAC feedback.A quasi-linear model of the 1-bit quantizer is presented in Figure 1, where the quantizer output is equal to the sum of quantization noise  1 and quantizer input with a quantization gain  1 .
The linearized dynamical equation of the sensing element can be expressed in the Laplace domain as follows: where  is the proof mass,  is the damping coefficient, and and  = 100 N/m; the frequency domain characteristic curve of () is shown in Figure 2.
In Figure 1, () is the continuous frequency response of digital loop integrator (), which can be expressed as where   and   are coefficients of the numerator and denominator.

Fractional-Order Sigma-Delta Modulator System
3.1.Mathematical Model of the Proposed Sigma-Delta Modulator.In this paper, the proposed fractional-order Sigma-Delta modulator is built by using the fractional-order digital loop integrator instead of ().The fractional-order digital loop integrator of the proposed Sigma-Delta modulator is shown in Figure 3.  1 () is the 2nd-order digital loop integrator, which can be written as where  2 ,  1 ,  0 ,  2 ,  1 , and  0 are the coefficients of  1 ().
Digital integrator

2nd-order integrator
Fractional-order controller  2 () is the digital     controller, which can be written as where , , and   ,   , and   are the integral-order, differential-order, and proportional, integral, and differential coefficients of  2 (), respectively.
Here, the architect of the proposed fractional-order Sigma-Delta modulator is presented in Figure 4.
From the system model shown in Figure 4, the signal transfer function (STF) and the noise transfer function (NTF  1 ) of the proposed fractional-order Sigma-Delta modulator can be written as NTF 1 () and  2 () are the continuous frequency responses of the digital loop integrators  1 () and  2 (), respectively.Taking (3) and ( 4) in ( 5) and ( 6), STF, NTF 1 can be rewritten as where To achieve high SNR and stability of the overall system,  2 ,  1 ,  0 ,  2 ,  1 ,  0 ,   ,   , and   in (7) will be optimized by using PSO algorithm in the following section.

Stability Analysis for the Proposed Sigma-Delta Modulator.
In this paper, we use Caputo definition for fractional derivative, which is given as where  is an integer satisfying  − 1 <  <  and Γ(⋅) is Gamma function.Formula ( 9) can be transformed into the transfer function in the Laplace domain (assuming zero initial conditions) as follows: where   ( = 0, . . ., ) and   ( = 0, . . ., ) are constants,  is the fractional commensurate order, and  < 1. Formula (10) can be rewritten as Formula ( 11) is always represented as the integer-order system model when  = 1.As shown in [10], when matrix  is deterministic without uncertainty, the stability condition for formula (11) By observation from (12), the stability region of the fractional-order (0 <  < 1) system is boarder than that of the integrator-order one.In this paper, the fractional commensurate order  is set as 0.5 to broader the stability region of the proposed Sigma-Delta modulator.In order to obtain the fractional commensurate order  = 0.5, here we set  =  = 0.5; therefore (7) can be rewritten as NTF 1 = ( 2  4.5 + ( 2  +  1 )  3.5 + ( 2  +  1  +  0 )  2.5 + ( 1  +  0 )  1.5 +  0.5 ) ( 1  4.5 By observation from (13), we can see that the order of the proposed Sigma-Delta modulator is 4.5th order and it belongs to commensurate fractional-order system.Therefore, the stability region of the proposed 4.5th-order Sigma-Delta modulator becomes |arg (  ()| > /4,  = 1, 2, . . ., , as shown in Figure 5.
It can be seen from Figure 5 that the stability region of the proposed 4.5th-order Sigma-Delta modulator is wider than that of the traditional integer-order one, the stability of which is only in the left-half -plane.

PSO Algorithm for Fractional-Order
Sigma-Delta Modulator 4.1.An Introduction to PSO Algorithm.Particle swarm optimization (PSO) algorithm belongs to the global search method [11].It is inspired by social behavior of bird flocking and swarm theory.In PSO algorithm, the potential solutions are named as particles, and each particle is regarded as a point in a D-dimensional space that adjusts "flying" according to its own flying experience.The th particle is presented as   = ( 1 ,  2 , . . .,   ).The best previous position of the th particle is recorded and represented as   = ( 1 ,  2 , . . .,   ).
The index of the best particle among all the particles in the population is represented by the symbol best.The velocity of the position change for particle is presented as   = (V 1 , V 2 , . . ., V  ).The particles are manipulated according to the following equation: where  is the inertia weight and  1 and  2 are two positive constants.

Parameter Optimization.
Firstly, the Simulink model of the proposed 4.5th-order Sigma-Delta modulator is developed as shown in Figure 6.
In Figure 6,  2 () is the discretization of the fractionalorder     controller.One of the discretization methods of the     controller is to use a Tustin operator to approximate the fractional-order operator [12].The general form of Tustin operator is given as follows: is the sample period; ± is the fractional order.Here, we use Continued Fractional Expansion (CFE) to realize (( −1 )) ± :  The mechanism and steps of this approximation method are presented in [12].For instance, (( −1 )) ±0.5 are approximated as follows: ( ( −1 )) The parameters of the proposed 4.5th-order Sigma-Delta modulator are listed in Table 1.

Steps of Parameter Optimization
(1) Selection of initial value of PSO algorithm: here;

Simulation Results
Discussion.The oversampling ratio (OSR) needs to be specified in the proposed 4.5th-order Sigma-Delta modulator.Here, we choose sample frequency of 128 kHz, and OSR = 64.In each individual procedure, the SNR will be calculated when the Simulink model is running.
In our numerical experiment, The proposed 4.5th-order Sigma-Delta modulator achieved about 92 dB to 118 dB of SNR by yielding the different values for   .The optimal values of   are selected as in Table 2.
The corresponding SNR of the proposed 4.5th-order Sigma-Delta modulator is 117.647dB, which is improved 10x compared to only 4th-order Sigma-Delta modulator.The PSD plot of the 4.5th-order Sigma-Delta modulator is also built with selected coefficients and shown in Figure 7. Compared to the 4th-order Sigma-Delta modulator, the proposed 4.5th-order Sigma-Delta modulator not only performs better SNR but also has wider noise floor (bandwidth: 115 Hz in the 4.5th-order Sigma-Delta modulator and 103 Hz in the 4th-order Sigma-Delta modulator) and sharper slope  (amplitude gain: 75.1 dB/decade in the 4.5th-order Sigma-Delta modulator and 53.6 dB/decade in the 4th-order Sigma-Delta modulator).

Stability and Robustness Analysis.
The fractional-order digital loop integrator of the proposed 4.5th-order Sigma-Delta modulator can be normalized as ().Taking the linearized parameters  0 ,  1 , and  2 and the major transfer function () and  1 () and  2 () into (5), a fractionalorder signal transfer function (STF) of the proposed 4.5thorder Sigma-Delta modulator can be obtained.The root locus models of the proposed 4.5th-order Sigma-Delta modulator and 4th-order Sigma-Delta modulator are built and shown in Figure 8.
Figure 8 shows that the proposed 4.5th-order Sigma-Delta modulator is stable.In Figure 8  Sigma-Delta modulator, as shown in Figure 8(a), are allocated along the negative axis of the -plane and the farthest pole achieves −1.2 × 10 7 .This leads to better stability of the designed 4.5th-order Sigma-Delta modulator.
Similar results are also observed at root locus for parametric yield errors, such as different spring constant  and damping coefficient , induced by manufacturing tolerances of MEMS.For instance, taking the spring constant 1 = 1000 N/m in MEMS transfer function to verify the robust stability of the proposed 4.5th-order Sigma-Delta modulator, Figure 9 shows the root locus of the proposed 4.5th-order Sigma-Delta modulator with 1.
Also, taking 1 = 2.4 × 10 −2 Ns/m in MEMS transfer function, Figure 10 shows the root locus of the proposed 4.5thorder Sigma-Delta modulator with 1 = 2.4 × 10 −2 Ns/m.Simulation results show that the robust stability of the two sensing elements only presents an acceptable slight fluctuation, which indicates that the proposed 4.5th-order Sigma-Delta modulator is robust to the sensitivity of MEMS devices.

Figure 3 :
Figure 3: Digital integrator of the proposed Sigma-Delta modulator.
(b), the root locus of the 4th-order Sigma-Delta modulator passes through the righthalf -plane, whereas the poles and zeros of the 4.5th-order 4th-order Sigma-Delta modulator

Table 1 :
Parameters of the proposed Sigma-Delta modulator.
, and   in (13) are optimized by PSO algorithm; hence, we consider   = ( 2 ,  1 ,  0 ,  2 ,  1 ,  0 ,   ,   ,   ) as the position vector of PSO algorithm for the proposed 4.5th-order Sigma-Delta modulator.The individual numbers are 600 corresponding to dimension 9 for the proposed 4.5thorder Sigma-Delta modulator, and the iteration is set as 25:  = 0.95 and  1 =  2 = 2(2) Objective function: a typical objective for Sigma-Delta is high SNR, which can be maximized and is calculated based on the power spectral density of the output bit stream.Therefore, considering the high SNR as the objective of PSO algorithm is reasonable.For each individual simulation, the SNR is calculated by a function "calcSNR" available through the Delta Sigma Toolbox for Matlab(3) Initializing   = ( 1 ,  2 , . . .,   ) and   = (V 1 , V 2 , . . ., V  ) in the optimal range and calculating the objective function (4) Applying (14) to update   and   and then to update best

Table 2 :
The optimized parameters by PSO algorithm.