Analytical Study on the Influence of Parasitic Elements in a Memristor

We study a memristive circuit with included parasitic elements, such as capacitance and inductance. In the multiple-scale scheme, we analytically show how the parasitic elements affect the voltage and the current. Finally, we provide an analytical expression for the intersection point coordinates, through which we discuss the functional behavior of the pinched hysteresis loop versus the operating frequency and the parasitic elements.


Introduction
In 1971, Chua postulated the existence of a fourth fundamental element circuit, which was termed memristor [1].In 2008, Williams and his team of HP laboratories announced the first successful realization of a memristor [2].Later, many properties and applications have been visualized for memristor, including potential construction of high-density nonvolatile memories [3] and artificial neural networks [4,5].Several researchers proposed models to explain the memristor dynamics [6][7][8][9][10], fingerprints of memristors, and relevant nonlinear properties.In [8,9], some essential features of memristors (fingerprints) are discussed.Both papers highlight three significant fingerprints: pinched hysteresis loop, the area of hysteresis lobe decreases as frequency increases, and pinched hysteresis loop becomes a single-valued function at infinite frequency.The main purpose of this work is to study the dynamics of a memristor considering their parasitic elements.Through the analytical multiple-scale analysis, we show how parasitic elements affect the fingerprints of memristors and we validate the results with those obtained from a numerical analysis.In particular, we show how the coordinates of the intersection point change as a result of a dominating capacitive or inductive behavior according to the adopted parameter values.The paper is organized as follows.In Section 2, we consider the HP's memristor [2] and we write the equation that governs the memristor circuit when parasitic elements are added, that is, capacitance and inductance.In Section 3, we solve the nonlinear equation driving the circuit using the multiple-scale technique.In Section 4, we find the analytical expression for the displacement of the intersection point of the pinched hysteresis loop and we provide a discussion on the basis of numerical simulations and circuital analysis.Finally, we draw some conclusions.

Memristor with Parasitic Elements
In the work in [11], the authors considered a realistic memristive circuit, where parasitic elements are included (Figure 1).That work studied the fingerprints of two memristive systems (thermistors), obtaining results through experimental measurements and numerical simulations.The usual fingerprints for ideal memristive systems are modified by the existence of parasitic elements such as inductance , capacitance , small DC current source   , and DC voltage source   as shown in Figure 1.We consider a simplified version of the previous circuit as shown in Figure 2, where   and   are neglected.Before building the equation for the circuit of Figure 2, we recall that the memristance is defined according to the literature as [1] where () is the memristance by definition.According to Kirchhoff 's current law [12], the following expression must be satisfied: where   represents electric charge in the capacitor.Due to the fact that the capacitor is connected in parallel with the ideal memristor, we are able to establish a relationship between   and   (); that is, Using the previous result, we may rewrite (2) as We are now in a position to write the driving equation of the circuit of Figure 2. Indeed, from Kirchhoff's voltage law [12], we have Inserting ( 4) into (5) and with the help of (1), we obtain the circuit equation where  and  are the parasitic inductance and capacitance, respectively, and () represents the memristance.We may find the circuit equation in terms of the function   integrating (5) with respect to the time.We obtain Using ( 4), ( 7) can be rewritten as follows: We now focus on HP's memristor.The analytical expression of memristance is given by the following expression: Here  depends on the memristor length, whereas  V denotes the ion mobility,  on denotes the resistance for completely doped memristor, and  off denotes the resistance for completely undoped memristor.We can determine an expression for   , given by where  0 =  2 ( V  on ) −1 and the integration constants are set to zero.Next, we consider a periodic voltage source, and define the dimensionless quantities via the parameter  0 =  off  0 : In terms of the dimensionless quantities, ( 9) and ( 10) can be rewritten as We can invert ( 14) and, for , we obtain Imposing the condition that  takes real values, it is necessary that Φ < 1/2.Plugging (15) into (8) and making the time transformation  = /, we obtain the equation for the function Φ: where the parameter  is defined as To determine the sign in ( 16) on which we will focus in the next section, we impose the constraint that the memristor has to be a passive memristor.A memristor is passive when the memristance is positive; that is, () > 0. This condition is satisfied when () <  0 or, equivalently, in dimensionless variable,  < 1 (see (13)).The condition  < 1 implies that we have to choose the negative sign in (15) and consequently the positive sign in (16).This will be the subject of our study in the next section.

Dynamics of a Memristor with Parasitic Elements
In this section, we study (16) considering the positive sign of the coefficient of the first derivative of Φ, corresponding to the negative sign in (15).We consider  as a small parameter due to the fact that parasitic elements have small values of capacitance and inductance (see [11,13] for numerical data).
In other words, we consider the case  0 ≫  or  ≪ 1.For what we said, our starting point is the exact equation We define a suitable time scale  = /√ and a new perturbative parameter  = √.Replacing  by √ and √ by  in (18), we obtain We stress that (19) contains only one parameter  and two time scales  and .We are now in the position to apply the multiple-scale method to (19).Following the procedure given in [14], we postulate a solution of the form where is the fast variable and  =  is the slow variable.The first two derivatives of Φ() at the firstorder approximation are given by (the reader can find these results in great detail in chapter IV of [14]) Using the expansion in (20), we can write To the zeroth-order expansion, we obtain the following differential equation: The solution for Φ 0 ( + , ) is given by where  and  are functions depending on the slow variable .At the order , using (22), we obtain the following differential equation: In order to ensure the passivity of memristance (), we know that  < 1 and consequently Φ 0 < 1/2.We now assume Mathematical Problems in Engineering that Φ 0 is sufficiently far from the value 1/2 in such a way that we may expand square root as With this further approximation, evaluating (26), we end up with −  ()  () . (28) To avoid secular terms, we must vanish the resonant term coefficients, that is, the coefficients of cos  + and sin  + in (28).This procedure leads to the following system of differential equations: The solutions for () and () are given by where  1 and  2 are arbitrary constants depending on initial conditions for Φ 0 .By evaluating the initial conditions, we obtain where Φ 0 ( = 0) = Φ ini and (Φ 0 /)( = 0) = Φini .Finally, the expression for Φ 0 () is given by where  = .In Figure 3, we compare the analytical expression obtained in (32) with a numerical simulation.The figure shows an excellent agreement between numerical and analytical solutions even during the transient period.
Using (15), we plot the electric charge and compare it with the numerical solution.Figures 4 and 5 show a good agreement between numerical and analytical solutions.In Figure 4, we consider a shorter interval of time to appreciate the wavy part that is reproduced by the analytical solution.

Behavior of Pinched Hysteresis Loop
As discussed in [11], parasitic elements modify the pinched hysteresis loop with respect to the loop of an ideal memristor.
In this section, we will find the analytical coordinates of the intersection point.Under steady-state condition, we are allowed to neglect the exponential terms in (32).We consider as memristor the elements described in Figure 2, namely, the ideal memristor and the parasitic elements.Rewriting the electrical current (see ( 4)) and voltage (see (11)) of the memristor in terms of the dimensionless quantities given by ( 12), we have where   / is the electrical current and   () is the voltage of the HP memristor in dimensionless notation.To determine the intersection point located in the -V curve, we need to find the times  1 and  2 such that For the sake of brevity, we will focus on the first quadrant, where both cosines and sinus are positive quantities.From condition (35), we obtain The relationship  1 = 2 +  2 gives the identical solution corresponding to the fact that electrical current and voltage are periodic functions in stationary regime.Substituting the second equality,  1 = 2 −  2 , into the electrical current expression (34), we obtain the following equation: We may further assume that  ≪ 1, and thus we can write √ 1 −  ∼ (1 − /2), so (38) In the range of validity of (38), the intersection point coordinates are Note that, taking the limit ,  → 0,  → ∞ and  → 0 (see (12) and ( 17)) and from (39) and (40) we recover the ideal memristor with the intersection point located at the origin.In Figure 6, we plot several pinched hysteresis loops for different amplitude of the voltage source.The coordinates of the intersection point are well described by ( 38) and (39).
For small  and , we compare our analytical solution with the numerical result as shown in Figure 7. Analogously, we may proceed with the third quadrant.In Figure 7, we can appreciate two lobes; the direction of the arrows represents the change of the variables voltage and current.In the upper lobe, the direction of the arrows (counterclockwise) is similar to the case found in an ohmic-inductive circuit.Conversely, in the lower lobe, the direction of the arrows is clockwise, similar to the case found in an ohmic-capacitive circuit.
For the values used in Figure 7, the capacitive lobe (lower) is greater than the inductive lobe, so the current leads the voltage most of the time in a period for the stationary regime.
To clarify this point, we plot the voltage and electrical current versus time to show this fact.
In Figure 8, we can appreciate how the current alternately leads and lags the voltage during a period.This fact is due to the nonlinear nature of memristor.Indeed the electrical current is not a pure sinusoidal signal and so we can find some time intervals, where the voltage lags the current and in other cases the voltage leads the current.
In Figure 9, we show the numerical results for  = 0.1,  = 0.2, and  = 15.We can see that the intersection point is located in the third quadrant according to a dominating inductive behavior as also shown in Figure 10.

Conclusion
In this paper, we considered a model of a memristor with included parasitic elements.We analyzed a system composed of a parasitic inductance in series with the parallel between an ideal memristance and a parasitic capacitance.Using the multiple-time-scale approach, we studied the dynamics of the flux and electric charge of memristor.The parasitic elements considered in the model modify the pinched hysteresis loop.We discussed the functional behavior of the pinched hysteresis loop versus the operating frequency and the parasitic elements.In particular, we showed that the intersection point moves apart from the origin of the -V plane and we analytically determined its coordinates.Finally, our theoretical analysis is shown to be in excellent agreement with the numerical simulations.

4 Figure 6 :
Figure 6: Plot of the pinched hysteresis loop as function of the source voltage amplitude .