An Integrated 5 GHz Wideband Quadrature Modem for OFDM Gbit/s Transmission in SiGe:C BiCMOS

This paper presents a 5 GHz wideband I/Q modulator/demodulator for 650 MHz OFDM signal bandwidth, which is integrated with a 5 GHz phase locked loop for I/Q generation. The quadrature signals are derived from a 10 GHz CMOS VCO followed by a bipolar frequency divider. The phase noise at 1 MHz offset is −112 dBc/Hz for the modulator as well as for the demodulator. The chips were produced in a 0.25 μm SiGe BiCMOS technology. The signal-to-noise ratio (SNR) of transmitted/received OFDM signal and the corresponding I/Q mismatch versus baseband frequency are given. The modulator achieves an SNR of 22–23 dB, and the demodulator realizes an SNR up to 22 dB. The modulator reaches a data rate of 2.16 Gbit/s using 64 QAM OFDM, and the demodulator realizes 1.92 Gbits/s.


INTRODUCTION
High-performance wireless communication systems based on OFDM require significant implementation effort for the RF front-end.In particular, low-phase noise, high linearity, and accurate quadrature matching are needed.For a direct conversion transceiver, one of the main challenges is to realize accurate I/Q phase and amplitude balance.In case of wideband applications, these challenges are even harder, since the generation of an accurate quadrature local oscillator signal is more difficult.This also applies to modulators and demodulators in the 5 GHz band, and to our 60 GHz transceiver where 5 GHz is used as an intermediate frequency [1].
For RF circuit design, SiGe BiCMOS technology [2] is beneficial for several reasons.First, the CMOS compatibility allows high integration resulting in lower cost compared to compound semiconductor technologies.Second, the noise behavior and power consumption compare favorably with CMOS technologies.Recently, a fully integrated 5 GHz quadrature demodulator [3] and modulator [4] in SiGe technologies have been presented.In these papers, polyphase filters have been used for I/Q generation.In [4], a 5 GHz SiGe quadrature modulator, which contains a circular polyphase filter, for 1 Gbit/s transmission with 64 QAM OFDM with a signal bandwidth of 204 MHz has been published.Because for a single polyphase filter, an accurate I/Q generation is limited to a relatively narrow frequency range, multistage polyphase filter design is used for wideband ap-plications.A 0.75-3.6GHz SiGe quadrature modulator with a 5-stage polyphase filter has been reported [5].
To avoid the difficult and area-consuming polyphase filter design, frequency division by two can also be used for I/Q generation [6][7][8][9].This technique is well suited for wideband and multiband applications, as the accurate I/Q generation is not limited to a relatively narrow frequency band.Moreover, since this approach utilizes a VCO running at twice the local oscillator (LO) frequency, the LO pulling effect in the transceiver is avoided.However, the divide-by-two technique needs a differential VCO signal without significant amplitude and phase errors, respectively, which can only be delivered by an on-chip integrated VCO.
This paper presents an integrated wideband quadrature modem (modulator and demodulator) for wideband OFDM, where, in contrast to [4], the PLL for I/Q generation is fully integrated with the quadrature modulator/demodulator; and frequency division is used to apply an OFDM signal bandwidth of 650 MHz.The mean signal-tonoise ratios (SNR) on the subcarrier level and the corresponding I/Q mismatch, characterized by sideband suppression, are used to evaluate the performance of the 5 GHz modulator and the demodulator.
The 5 GHz quadrature modulator achieves error-free data transmission at 2.16 Gbit/s using 64 QAM OFDM-based transmission scheme similar to the 802.11a standard, but with 650 MHz signal bandwidth.The 5 GHz demodulator allows error-free transmission at a rate of 1.92 Gbit/s using 64 QAM OFDM.

CIRCUIT TOPOLOGY
In our 60 GHz OFDM demonstrator, the signal is converted from 5 GHz to 61 GHz and vice versa using a 56 GHz PLL, as described in [1].As shown in Figure 1, the conversion from baseband to 5 GHz requires a wideband quadrature PLL, a single-sideband mixer, a variable-gain amplifier, and integrated lowpass filters of tunable cutoff frequency.
The 5 GHz demodulator topology requires similar components as the 5 GHz modulator [8], as shown in Figure 2. In order to process two 500 MHz bands from 60.5 GHz to 61.5 GHz, the IF PLL must generate 4.75 GHz and 5.25 GHz [1].
The inputs and outputs of the converters are differential.The wideband PLL is to deliver I/Q signals at 5.25 and 4.75 GHz.This results in a required tuning range of 500 MHz plus some margin for compensation of temperature and process variations.

DESIGN OF SUBCIRCUITS
For I/Q generation, a bipolar divide-by-two circuit (DTC) is used [9].By this mean, the good phase noise performance of a MOS VCO due to the large internal signal swing is combined with the low-power consumption of SiGe dividers.Figure 3 shows the DTC realized as two latches in a negative feedback loop, and the latch, which is composed of a differential pair and a regenerative pair.The DTC draws a current of 2.7 mA from a 2.5 V supply.Further reduction of phase noise and spurs maintaining a large tuning range is achieved by using coarse and fine tuning in conjunction with a dual-loop PLL shown in Figure 5 as described in [10].The PLL has a 5 MHz reference input.The dashed box symbolizes the 10 GHz VCO with coarse and fine tuning input followed by the DTC.
The quadrature mixers in the modulator and demodulator consist of two linearized Gilbert mixers including a buffer amplifier as described in [11].Figure 6 depicts the mixer and the buffer of the 5 GHz modulator.In contrast to [11], the mixer does not use additional transistors for linearization.The 4.75 GHz/ 5.25 GHz signals from the PLL are ac coupled into the LO inputs of the two mixers.
Figure 7 presents the 5 GHz variable gain amplifier (VGA) cell, which consists of a transadmittance stage followed by a transimpedance stage with internal Ac coupling to enable supply voltage of 3.3 V.The first stage includes a variable-gain bipolar quad, which is similar to a Gilbert mixer.The gain is controlled by the voltage difference VC, which is converted from an external control bias VG using an additional internal converter.The output signal of the VGA is connected to an output buffer, which is formed as differential pair with resistive emitter degeneration.In case of the demodulator, the 5 GHz VGA is composed of two cascaded VGA cells with internal Ac coupling.The second VGA (VGA2) of the 5 GHz demodulator is built as variable-gain bipolar quad, buffered by emitter followers.
For the lowpass filter (LPF), a differential log-domain (LD) LPF with a tunable cutoff frequency of 100-500 MHz was applied using a sixth-order Butterworth filter with cascaded biquads [12].Figure 8 illustrates the block diagram of the LD filter with the three cascaded biquads (bq1, bq2, and bq3), the rectifier for class AB operation (AB), the current source bank (CS) for biasing the biquads, the single-ended voltage-to-current converters (V/I) at the input, and the differential current-to-voltage converter (I/V) at the output.

EXPERIMENTAL RESULTS
Figure 9 shows the chip micrograph of the 5 GHz modulator, and Figure 10 shows the chip micrograph of the 5 GHz demodulator.The chips were fabricated in a 0.25 µm highperformance SiGe:C technology with f t /f max = 200/200 GHz [13].
The area of the modulator chip is 1.3 × 3.2 mm 2 , and the area of the demodulator chip is also 1.3 × 3.2 mm 2 .A significant amount of the chip area is due to the PLL and the integrated lowpass filters.Optionally, for chip testing, these lowpass filters can be bypassed.The I/Q PLL consumes 57 mA at 2.5 V supply voltage, and the quadrature mixer draws 13 mA at 3.0 V.The single-sideband output spectrum of the modulator is presented in Figure 11, which was measured with Agilent E4440A spectrum analyzer.The spur levels for the modulator as well as for the demodulator are as low as −73 dBc, despite the large PLL tuning range of 1 GHz.
Figure 12 shows the modulator output spectrum for a sinusoidal I/Q input of 120 MHz.The I/Q baseband signal was generated by Agilent N6030A arbitrary waveform generator.
In this case, a single sideband (SSB) modulation is performed as the 5 GHz modulator corresponds to an SSB mixer, where the LO signal in quadrature is delivered by the quadrature PLL.The main signal is at 5.13 GHz for the LO signal at 5.25 GHz.The sideband is located at 5.37 GHz.The sideband suppression is −36 dBc. Figure 13 shows the complex baseband signal at the output of the demodulator in case of a 5.25 GHz input signal, which is SSB-modulated by an I/Q 10 MHz sinusoidal signal.The input signal was generated by Agilent E8267D vector signal generator modulated by Agilent N6030A arbitrary waveform generator.The SSB modulated input signal is downconverted by the 5 GHz demodulator to the baseband.The baseband signal was measured by Agilent DSO80804B oscilloscope and analyzed by Agilent 89600 vector signal analyzer (VSA) software.The positive signal is at 10 MHz, and the negative signal is at −10 MHz.The corresponding sideband suppression is −33 dBc.
Figure 14 presents the uncalibrated sideband suppression for the modulator and demodulator as a function of the baseband (BB) frequency.
For the modulator, the sideband suppression is in the range from about −40 dBc to −30 dBc, and for the demodulator in the range from −33 dBc to −25 dBc. Figure 15 shows the output power of the modulator as a function of the amplitude of the I/Q baseband signals.The gain is controlled by the external bias signal VG.The output P1dB is −7 dBm for the maximum gain of the modulator.The phase noise at 1 MHz offset is −112 dBc/Hz for the modulator as well as for the demodulator, as measured by Agilent E4440A spectrum analyzer using the phase noise option.

OFDM DATA TRANSMISSION
The OFDM-based transmission scheme of the demonstrator is similar to the 802.The basic physical layer OFDM parameters are summarized in Table 1.The cyclic prefix of 160 ns was chosen as a good compromise between phase noise sensitivity and maximum tolerable channel delay spread [1].The raw data rates of the physical layer without taking the preamble into account are summarized in Table 2 for the highest specified data modes.
For testing the data transmission, we used the Agilent N6030A arbitrary waveform generator, the Agilent vector signal generator, and the Agilent 8 GHz oscilloscope with vector signal analyzer (VSA) software to synthesize and record OFDM frames.Each frame has one kilobyte of data.The generation and evaluation of OFDM signals were performed in software.The modulator and the demodulator were tested alone, and also connected together in a loop.The corresponding setups for these measurements are presented in Figure 16.
The mean signal-to-noise ratio (SNR) on the subcarrier level was taken as a figure of merit.
The 5 GHz modulator achieves an SNR of 22-23 dB independent of the VGA gain, which means of the output power.On the other hand, the 5 GHz demodulator achieves an SNR of up to 22 dB, which depends mainly on the gains of the 5 GHz VGA and the baseband VGA.A lower SNR corresponds to higher gain settings.In the loop configuration, an SNR of 19 dB was measured for optimized gain and suitable attenuators between the modulator output and the demodulator input.In case of the modulator, we were able to establish error-free transmission using 64-QAM with a code rate  of 3/4.This corresponds to a source rate of 2.16 Gbit/s.For the closed loop with 5 GHz modulator and 5 GHz demodulator, we achieved 960 Mbit/s using 16-QAM-1/2 transmission.
Figure 17 presents the output spectrum of the modulator transmitting the OFDM signal, which was obtained by the VSA software after averaging.
The figures 18, 19, 20 show the signal spectrum, the measured SNR, and the obtained constellation diagram for 64-QAM transmission using the 5 GHz modulator only.The figures 21, 22, 23 represent the corresponding measurements for the demodulator.
The SNR decreases as function of the subcarrier index for the modulator and demodulator, as shown in Figures 19 and  22.It should be mentioned that this decrease corresponds to    the observed lower sideband suppression for larger baseband frequency, see Figure 14.
For the used data modes, the Tables 3, 4, and 5 present the performance data for the modulator and the demodulator, respectively.
For the wideband system, it can be observed that the modulator facilitates error-free transmission at 2.16 Gbit/s using 64-QAM modulation with a code rate of 3/4, whereas the demodulator allows error-free transmission at a rate of 1.92 Gbit/s using 64-QAM with a code rate of 2/3.

CONCLUSION
We have presented an integrated 5 GHz wideband tor and demodulator in SiGe BiCMOS technology.The generation of the quadrature LO signal is performed by integrating a 10-12 GHz PLL followed by a 1 : 2 frequency divider into the modulator and demodulator.An OFDM data transmission with 2.16 Gbit/s was achieved for the modulator, 1.92 Gbit/s was obtained for the demodulator, and 960 Mbit/s was realized for the modulator connected to the demodulator through suitable attenuators in a loop.The achievable rate for data transmission is limited by the signal-to-noise ratio, which is for the investigated modulator/demodulator mainly due to the I/Q mismatch.The 5 GHz modulator as well as the 5 GHz demodulator can be used in a wideband extension of 5 GHz WLAN systems, but also in a 60 GHz system, where an IF of about 5 GHz is used.

Figure 1 :
Figure 1: Schematic view of the 5 GHz modulator.

Figure 3 :Figure 4 :
Figure 3: Schematics of divide-by-two circuit and the latch.

Figure 4
Figure4presents the schematic view of the 10 GHz VCO.The MOS oscillator has two digital control inputs for subband selection, which reduces the VCO gain for low-phase noise.Further reduction of phase noise and spurs maintaining a large tuning range is achieved by using coarse and fine tuning in conjunction with a dual-loop PLL shown in Figure5as described in[10].The PLL has a 5 MHz reference input.The dashed box symbolizes the 10 GHz VCO with coarse and fine tuning input followed by the DTC.The quadrature mixers in the modulator and demodulator consist of two linearized Gilbert mixers including a buffer amplifier as described in[11].Figure6depicts the mixer and the buffer of the 5 GHz modulator.In contrast to[11], the mixer does not use additional transistors for linearization.The 4.75 GHz/ 5.25 GHz signals from the PLL are ac coupled into the LO inputs of the two mixers.Figure7presents the 5 GHz variable gain amplifier (VGA) cell, which consists of a transadmittance stage followed by a transimpedance stage with internal Ac coupling to enable supply voltage of 3.3 V.The first stage includes a variable-gain bipolar quad, which is similar to a Gilbert mixer.The gain is controlled by the voltage difference VC, which is converted from an external control bias VG using an additional internal converter.The output signal of the VGA is connected to an output buffer, which is formed as differential pair with resistive emitter degeneration.

Figure 6 :
Figure 6: Schematics of mixer and buffer.

Figure 7 :
Figure 7: Schematic view of 5 GHz variable gain amplifier.

Table 2 :
PHY data rates for narrowband and wideband system.

Table 3 :
Modulator performance for coded and uncoded transmission using wideband OFDM.

Table 4 :
Demodulator performance for coded and uncoded transmission using wideband OFDM.

Table 5 :
Demodulator performance for coded and uncoded transmission using narrowband OFDM.