Strategies for Fabricating Nanogap Single-Crystal Organic Transistors

Nanotechnology is an emerging technology for fabricating nanostructures where at least one dimension is smaller than 100 nm. This paper explains how single-crystal organic transistors of channel length down to just 7 nm can be fabricated without damaging the organic material. Single crystals of C60, rubrene, and pentacene have been chosen in our structures, but the same process can be used for a wide variety of organics. The method combines high-resolution electron-beam lithography and vacuum device assembly with piezo manipulators. As modern devices are typically designed with short semiconducting channel length, this type of fabrication methods allows downscaling of organic electronic devices for research purposes.


Introduction
Conjugated organic semiconductors as electronic materials have been the subject of intense research, because they have some processing and performance advantages over conventional semiconductors for low-cost and large-area device applications.The two most widely studied types of devices employing organic semiconductors are organic field effect transistors (OFET) [1] and organic light emitting diodes (OLED) [2].These devices are currently incorporated into a variety of prototypes for displays and display drivers [3] and, beyond this, have a wide range of other potential applications.In the very recent years, organic materials attracted attention for spin electronics, because of the prospect that the spin relaxation times could be much longer than in inorganic materials [4], primarily as a consequence of the smaller spinorbit coupling and diminished hyperfine interactions.
Due to the intrinsically low mobility of organic compounds, the organic electronic devices cannot readily rival the performance of those based on crystalline inorganic semiconductors; nevertheless, the processing properties and the observed electrical characteristics demonstrated that they can be competitive for applications requiring large-area coverage, structural flexibility, chemical tenability, and low-cost processing.The most widely used organic semiconductors can be broadly classified into two categories: small molecules or oligomers (usually processed in vacuum) and polymers (usually processed by wet chemical techniques).The most representative small molecule compounds employed in this field, having the highest reported mobility, are pentacene and rubrene [5,6].On the other hand, among the most studied polymers are the polyphenylene derivatives, of interest mainly for their luminescence (a property required for light emitting diodes) [7] and the conductive polymers such as polythiophene derivatives [8].Carbon nanostructures also feature prominently in electronics, thanks to their unique transport properties [9]; typically they belong to the fullerene structural family, which, for example, includes carbon nanotubes [10] and the C 60 "buckyball" molecule [11], but interest in graphene structures is increasing [12].
Modern devices are typically designed with short semiconducting channel length; in transistors, for example, this is motivated by the need to achieve fast switching speeds and drive currents that meet the requirements of applications [13].
In this paper the techniques employed to prepare singlecrystal OFETs of pentacene, rubrene, and C 60 nanorods with short channel length down to just 7 nm are presented.Special emphasis is put on the adjustments which are required to deal with these highly resistive organic semiconductors, their solubility in all common solvents used in lithography, and the very small dimensions of the transport structure.

Nanolithography
Figure 1 shows a schematic diagram of a bottom-contact organic transistor.The devices were prepared on a heavily doped Si wafer with a thermally grown SiO 2 layer, whose thickness was 200 nm.A contact to the substrate allows for gate control of the charge density in the organic crystal.By means of UV lithography we deposited a Ti/Au microscale contact platform, which provided large-area contacts to connect the final nanoscale device to the data acquisition system.The SiO 2 surface was chemically modified with a self-assembled monolayer of hexamethyldisilazane (HMDS) to prevent water adsorption on the dielectric surface.Using electron beam lithography and a lift-off technique, source-drain electrodes were patterned on the substrate.
In electron beam lithography (EBL) a pattern is defined by rastering the electron beam over the selected areas of a substrate covered by electron-sensitive resist (PMMA 950 A3).EBL was carried out with scanning electron microscopes (Zeiss Auriga) equipped with a Raith 50 electron lithography tool (which provides control over the beam blanker and the scan coils, to perform selective exposure lithography).The accelerated electrons, when penetrating the resist, first experience small scattering events (forward scattering), which broaden the beam diameter.On reaching the underlying substrate, the electrons undergo large-angle scattering events (backscattering), which typically give rise to the proximity effect.This means that the exposure of the resist at some feature of the pattern is dependent on nearby features because the backscattered electrons spread to the surrounding areas.The main consequence is that the shape of the final pattern may differ substantially from the shape which is directly scanned by the beam.
Areas are exposed by rastering the beam spot with a certain step size across the designed shape.The energy dose deposited at each point is given by the product of the beam current and the dwell time (time spent exposing each spot) and is usually expressed in µC/cm 2 .To correct for the proximity effect, each feature in the pattern is normally assigned an independent dose, which takes into account the amount of backscattered electrons received by the surrounding features.For example, small and isolated features need to be exposed with a larger dose than dense features.When exposing a design with denser features (such as a set of electrodes with spacing of less than 100 nm) the proximity effect becomes the most important limitation and correcting the exposure becomes critical.
The effect of proximity normally reveals itself after developing, when some resist can remain in the gap between the two features, impeding a successful liftoff (there will be physical short circuits between the two elements).Here the simple approach of increasing the developing time normally does not help; the proximity effect translates into loss of fine details and the edges of the pattern are no longer sharp, but blurred.To reduce this effect, one can modify the original design layout to compensate the blur.The design must be deliberately distorted to control the amount of energy deposited on the image.The overexposed regions can be reduced by taking away a part of the pattern and the underexposed regions can be enhanced by adding some extra adjacent features.Consequently, the exposed design can look very different from the patterned structure.
When the pattern geometry is very complex, for example, for a large number of dense features, the pattern must be divided into smaller areas, and the dose factor assigned to each of them after calculating the energy deposited in each area.This is a model-based method that balances the energy received by the image correcting the dose for each pattern.The approach based on manual correction, which relies on a simple set of rules, can be satisfactory, but the accuracy will become poorer as the geometric complexity increases.This manual approach is typically effective for research purposes, where prototypes are produced, and it was employed in this paper.
On the other hand, it is also possible to take advantage of the proximity effect and use it to achieve point contact devices with ultrashort gaps.This is done by gradually increasing the energy dose in a junction consisting of a facing pair of tips; the resist in the gap will get more and more exposed at increasing doses, thus reducing the electrode gap after the development.In this way, we were able to achieve nanogaps of less than 7 nm (Figure 2).

Electrode Deposition
We have adopted two methods in this study for depositing the thin films necessary to define the electrodes.These methods, sputtering and electron beam evaporation, are not equivalent in terms of the results they can provide when dealing with features with lateral size of order nanometers.When deposition is achieved by sputtering from a target material, atoms, molecules, or small clusters from this target are ejected toward the substrate via momentum transfer.The basic principle is simple: the target is bombarded by accelerated ions resulting in ejection (sputtering) of atoms, which are deposited onto a substrate, forming the thin film.The distance between the target and the substrate is, in this deposition technique, limited by the fact that ejection can occur in any direction; hence for good efficiency the substrate must be located close to the target surface.
On the other hand, the deposition techniques based on evaporation of source material are typically simpler but do not offer as good control of topography and alloy composition as sputtering.Here, upon heating the source material, a vapor of atoms is released that, when the shutter is open, travel across the UHV chamber in straight lines and are deposited onto the substrate.The distance between the source crucible and the sample substrate can be maximized as much as needed, provided that the vacuum level is good enough to offer a long mean free path for the evaporated atoms.For the tool used in this work, a Temescal FC-2000, it is about 75 cm.
The difference between the two methods is evident: in sputtering the particles hit the substrate at any angle and, unless a pair of shadow masks is placed in series, to select a specific direction, the deposition cannot occur in a directional way.Shadow-mask collimation has the inconvenience of reducing the deposition rate and cannot easily be fitted in any tool, as it requires very close proximity to the substrate.However, with e-beam/thermal evaporation it is relatively easy to obtain highly directional deposition; therefore upon loading the substrate on a stage which faces the source crucible (the straight line between the crucible and the center of the sample is perpendicular to the substrate), at a distance several times larger than the crucible diameter, perpendicular deposition is readily achieved.The importance of having directional deposition when dealing with a nanostructured pattern is readily understood, considering that nonperpendicular target atoms can deposit on the edge of the resist rather than on the substrate (Figure 3).Since typical resist thickness is of order 150 nm, when the gap among the patterned features becomes of a comparable size, this issue can cause the loss of fine details and the appearance of the so-called "rabbit ears" at the edges of the electrodes (Figure 4).For smaller gaps, liftoff even becomes impossible.
In our process, a bottom Ti layer of 5 nm was employed to promote the adhesion of the conductive metal layer to the underlying SiO 2 surface and followed by typically 20-30 nm of Au.

Preparation of the Device
The main issues encountered to fabricate a device consisting of an organic single-crystal bridging a pair of electrodes are the solubility of the crystal in the solvents used during lithography and the achievement of an intimate contact between the organic material and the metallic electrodes.
Our solution is to use a piezo-controlled nanomanipulator mounted inside the chamber of a double beam scanning electron microscope.The single crystals (pentacene and rubrene in this study, produced by means of physical vapor transport) can be harvested from the crystallization plate and placed onto a prefabricated transistor structure, without any contact with solvents.Further, intimate contact can be achieved thanks to the precise positioning allowed by the piezo controller.The piezo-manipulator mounted inside the vacuum chamber is remotely controlled, to allow the precise manipulation of the micron-size objects on the sample surface while viewing them via scanning electron microscopy (SEM) and focused ion beam (FIB).
In our Zeiss Auriga dual-beam system the ion and electron beam columns were set at 83 degrees to each other, on top of the substrate, which is tilted at about 52 degrees to allow an equivalent exposure.The SEM column uses a focused electron beam, which scans across the areas of the sample to reveal clear nondestructive images of the sample surface.The FIB works similarly to the SEM, except that the gallium ions are accelerated to the surface of a sample at energies of 2-50 kV; hence it can be used both for milling and high-resolution imaging.Although high-quality images can be obtained in this way, it must be kept in mind that prolonged exposure can be destructive for the sample surface, due to the bombardment by accelerated heavy ions, which inherently sputter atoms from the surface.Indeed, the effect is indeed normally exploited to obtain precision pattern milling of a defined structure, simply by scanning the beam over desired regions or lines.
A further option offered in this tool is material deposition induced by ion-or electron-assisted chemical vapor  deposition, which requires the introduction of precursor gases which are being modified by the interaction of accelerated high energy ions or electrons and deposit onto the sample surface, in the area scanned by the beams.The possibility of performing dual imaging, of the side and the top of the crystals, largely facilitates the operation of the nanomanipulator, in terms of locating its tungsten tip near the desired objects.
In our process, a crystal of suitable size was approached with the tip of the manipulator and, once in gentle contact, SiO 2 straps were deposited by decomposing siloxane gas in the electron beam, to solder the tungsten tip to the crystal so that it is possible to precisely move it around.The precursor gas was injected close to the sample surface via needle valves remotely positioned near the top of the sample, where the electron beam is focused.The crystal was then moved toward the patterned sample and placed across the nanoscale gap to electrically bridge the electrodes.Crystals were normally gently pressed with the tip against the substrate, to enhance electrical contact, and held in position by additional SiO 2 straps, deposited on the edges, to secure them across the gap (Figure 5(c)).This aimed at limiting the movement of the crystal when the device was transported to further vacuum cavity, for the electrical characterization.
The tip could finally be removed from the crystal simply by pulling it away from the substrate using the piezo, because the lateral SiO 2 stripes typically provided a much stronger adhesion.Alternatively, the focused ion beam could be used to cut the organic crystal free.With this procedure, any kind of organic crystal could be prepared and placed on top of FET structures.
Figures 5 and 6 provide an illustrative description of the process used to fabricate, respectively, pentacene and rubrene based devices with 16 pairs of interdigitated electrodes, distributed across the crystal area.
Using the same fabrication method, we also fabricated short-channel devices consisting of two metal electrodes separated by a nanoscale gap, bridged by a single crystal of C 60 molecules.A C 60 fullerene molecule is composed entirely of carbon, in the form of a sphere.Over the past several years work has been done mainly with C 60 thin films that have been incorporated into transistors, diodes, and OLEDs [14].We have fabricated high purity single-crystal C 60 rods with uniform submicron dimension following the method of [15].The fabrication of lateral C 60 based structures was achieved by selectively placing the rods on top of a previously patterned pair of electrodes, as for the single crystals of pentacene, with a gap around 50 nm (Figure 7).

Electrical Characterization
The current-voltage characteristics of the devices were acquired using a Quantum Design Physical Properties Measuring System (PPMS); making use of a pair of cryogenic triaxial leads to high impedance measurements, subfemtoampere source meters (Keithley 6430), and low-current preamplifiers.A high-impedance setup was necessary, due to the low mobility and carrier concentration, which is typical   of intrinsic organic semiconductors.Electrical characterization and transistor operation are reported elsewhere [16]; here we aimed at describing in detail the fabrication process used to make our short-channel organic devices.

Discussion
Normally, the source-drain resistance is the sum of channel resistance and the two interface resistances.Discriminating the contribution of one versus the other is extremely important in hybrid organic structures, because the contact effects are known to heavily influence the performance of a device.Investigating the nature of the contact resistance at a metal/organic interface usually requires manufacturing several devices of varying channel lengths, from which the interface resistance is extrapolated, from a plot of the sourcedrain resistance as a function of channel length.The intercept of this line with the y-axis then gives the desired estimate.However, if this procedure is to work, it is necessary that all the resistances involved (both contact and channel) are ohmic.The contact resistances in organic devices are often found to have the behavior characteristic of a diode, due to the fact that an energy barrier rises at the interface.This energy barrier can be due to a simple energy level mismatch, or it may be affected by other mechanisms, such as the lowering of the electronic dipole contribution to the metal work function, due to the absorption of organic molecules [17,18].In the case of nonlinear conductance, scaling is significantly more complicated, the effective resistance is bias dependent, and a value for the interfacial resistance cannot be simply extracted.
The downscaling of organic devices to a few nm leads to devices that are effectively contact dominated.Studying the conductance of such junctions opens the possibility of understanding the real nature of organic/metal interface from the electrical standpoint.In fact, in lateral configurations, pinholes and interface damage are automatically excluded, leaving fewer problems to be resolved.Some of those are surface oxidation of the contacts and low effective contact areas and are relatively easier to control by, for example, handling the samples in inert gas transfer chambers and selecting crystals with atomically flat faces (without exposed growth terraces).
In conclusion, we have shown the technique needed to fabricate downscaled devices, consisting of a pair of metal electrodes bridged by an organic single crystal.The process avoids any contact between the transport media and solvents, by using a piezo nanomanipulator mounted inside a dual beam scanning microscope.The downscaling of the structures allowed us to obtain a long parallel pair of interdigitated electrodes spaced down to about 70 nm and point contact electrodes with gaps of just 7 nm.
The continuing trend is to meet the requirements of electronic applications with ever-reducing device sizes.Our techniques, even though unsuitable for mass production, may prove useful in further studies focusing on the characterization of organic/metal interfaces and the fundamental transport properties of organic media.Most importantly, this method can be applied to most crystals, without introducing any damage to the organic material.

Figure 1 :
Figure 1: Schematic diagram of a bottom-contact single-crystal organic transistor.

Figure 3 :
Figure3: Illustration of the deposition occurring at the edges between the resist and the substrate in the case of nondirectional, sputter deposition (left) and directional e-beam (right).This effect becomes more visible when dealing with nanoscale patterns, in which the gap is comparable or smaller than the resist thickness.

Figure 4 :
Figure 4: SEM pictures of a pair of electrodes resulting by a liftoff of structure deposited by sputtering (left) and e-beam evaporation (right).The appearance of "rabbit ears" at the edges of the electrodes is clearly shown.

Figure 5 :
Figure 5: The steps in the fabrication of a single-crystal pentacene FET are shown.A crystal is placed on the patterned substrate by means of a piezo-manipulator mounted inside the FIB vacuum chamber and remotely controlled; in situ chemical vapor deposition (CVD) is used to secure the micron-sized crystal.

Figure 7 :
Figure 7: Set of SEM images showing the fabrication steps to place and secure a C 60 rod on top of pair of electrodes.From the left, a rod is selected and approached with the tungsten tip of the piezo manipulator; in situ CVD of a stripe of SiO 2 allows the crystallite to be fixed onto the desired set of electrodes; SiO 2 wires are deposited to hold the rod in position on the substrate, before the tip is FIB cut or simply pulled away, breaking the tip of the crystallite.