ISRN Power Engineering

Volume 2014 (2014), Article ID 726529, 15 pages

http://dx.doi.org/10.1155/2014/726529

Review Article

Novel Technologies for Design and Analysis of Switching Mode Power-Supply Circuit Based on Solitary Electromagnetic Wave Theory

Hirokazu Tohya and Noritaka Toya

ICAST, Inc., 1-26-11 Kinugaoka, Hachioji City, Tokyo 192-0912, Japan

Received 25 October 2013; Accepted 10 December 2013; Published 4 March 2014

Academic Editors: H. Jia, Y. Wang, and B. Zhang

Copyright © 2014 Hirokazu Tohya and Noritaka Toya. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

Abstract.

The novel solitary electromagnetic wave (SEMW) theory and the novel design methodologies of the switching mode power supply circuit (SMPC) are presented. The SEMW theory was developed as a basic theory of the design of all kinds of the switching mode circuit including SMPC by fusing the physics of semiconductor, nonlinear undulation, and electromagnetic wave. When the SEMW theory is used, the electromagnetic analysis of SMPC becomes possible by using only the real parameters based on the physics. The technologies of the low impedance lossy line (LILL) which is used to the DC line and the matched impedance lossy line (MILL) which is used to the switching line are also presented. They are effective for suppressing the electromagnetic interference. SMPC can be reconfigured to the quasistationary state closed circuit (QSCC) by applying LILL and MILL in accordance with the SEMW theory. No electromagnetic interference exist in QSCC. The buck converter which is one of the most popular DC-DC converters is presented as an example of the method for being reconfigured to QSCC. The conventional design tools which includes SPICE based on the AC circuit theory will be effective for the design and analysis of the inside circuit of QSCC.

1. Introduction

The SMPC can be considered to be a kind of the oscillators and of the high performance power MOSFET is comparable to that of the MOSFET of LSI. The switching frequency of almost AC-DC converters is lower than 150 kHz because the disturbance at the mains port of ITE is limited at the frequency band of between 150 kHz and 30 MHz by IEC. In addition, SMPS generates the the large radiated disturbance that is lower than a few hundred mega-hertz. For this, the snubber, many kinds of filter, and the partial resonant circuit have been used [1–3], and the technology of the spread spectra clock has been applied [4]; however, the cost and the size will be increased by these measures.

SMPC is a kind of the AC circuit, which is defined by the electromagnetism as the circuit of the EMW. EMW is generated when the electric field or the magnetic field is changed. EMW can travel at quasilight speed through the insulator of the transmission line. According to the Ampère’s circuital law in the electromagnetism, AC current is defined as line integral of the magnetic field around the wire. It has been believed that the switching voltage wave of SMPC consists of many harmonic waves by the idea of the Fourier transform. It is very convincing mathematically. However, this idea should be denied because the switching voltage shape is formed by the charge/discharge action of SEMW generated at the moment on/off of the switching device on the transmission line. When the SEMW theory is used instead of the Laplace transform, the electromagnetic analysis of the transient phenomenon will become easy and accurate.

2. Summary of SEMW Theory

2.1. Generation Mechanism of SEMW [5–8]

The SEMW theory was developed by fusing the semiconductor physics, nonlinear undulation physics, and the EMW physics.

Figure 1 shows the elementary SMC.

Figure 1: Elementary SMC.

In Figure 1, PS is the DC power source of VDD [V], DR is the driver of CMOS circuit on LSI, and is the impedance-matching component which can cut DC on the printed circuit (PCB).

SEMW consists of the solitary electric-field wave (SEM) and the magnetic-field wave, which have the same waveform in accordance with the conventional EMW physics. The magnitude of the magnetic-field wave on the voltage source circuit is decided by the characteristic impedance of the transmission line and the magnitude of EMW which depends on the electric permittivity. Therefore, the magnitude of the magnetic-field wave on the transmission line does not depend on the magnitude of the magnetic permeability. The waveform of SEMW was gotten by the calculation based on the semiconductor physics. The shape of the rise part of the signal voltage was calculated by time integral of the waveform of SEW.

Figure 2 shows the calculated results.

(a) Solitary electric-field wave (SEM)

(b) Rise part of signal voltage

Figure 2: Waveform of SEW and rise part of signal voltage (calculated).

In Figure 2(a), the relative -field strength means the electric-field strength of 1 m distance, and the same shall apply hereafter. In Figure 2(b), the rise part of the signal voltage was gotten by time integral of the negative magnitude of SEW shown in Figure 2(a) and the magnitude of the final voltage was set to 1.1 V. SEMW is formed by one action of the switching transistor. Therefore, unlike the Gaussian wave, the harmonic waves are never included in SEW. The waveform of SEW shown in Figure 2(a) is similar to that of the soliton presented in the nonlinear undulation physics. The wave length of SEMW is defined as , which is gotten from the switching time of the switching device on the transmission line. In Figure 2(a), the waveform of SEW is similar to the half of the sine wave which has the frequency of . The idea about the significant frequency was presented [9]. This idea cannot be directly applied to the SEMW theory because it discussed about the harmonic waves. However, this idea is convenient for the transformation between the time domain and the frequency domain of SEMW. Therefore, the modified significant frequency (MSF) was defined in the SEMW theory. The properties of MSF are as follows.

(a)The similarity between the SEMW and the half of the sine wave which has the frequency of is more than 85%.(b)No spectra exist at the frequency band higher than MSF.

In Figure 2, MSF of 0.98 ps which is the gate delay of 2009 TN shown in ITRS 2008 update is 325 GHz [10].

2.2. Vector Wave Equations of SEMW [7, 8]

The developed vector wave equations of SEMW are

where each and is the electric permittivity and the magnetic permeability, is the travelling distance, is the initial value of time, is the unit vector of the standard transverse direction against the travelling direction, and is the unit vector of the perpendicular direction to the transverse direction.

As shown in (1) and (2), SEMW consists of SEW and the solitary magnetic-field wave and these waves are at right angles to each other and both waveforms are same except its magnitude.

The defined wave length () of the SEMW on the transmission line is

2.3. Behavior of SEMW on Transmission Line [5–8, 11]

Figure 3 shows the image of the waveform of SEW and the rise part of the voltage after DR is turned on. Figure 3(a)(A) shows SEW2 on the power line. Figure 3(a)(B) shows the falling part of the voltage on the power line. Figure 3(b)(A) shows SEW1 on the signal line. Figure 3(b)(B) shows the rising part of the voltage on the signal line.

(a) On power line

(b) On signal line

Figure 3: Image of SEW and rise part of voltage after turn on of DR.

In Figure 3, is the travelling direction of the SEW, and shows the time direction which is the opposite direction of . After DR is turned on, the signal line is charged to /2 V from 0 V by SEW1 at quasilight speed and the power line is discharged to /2 V from  V by SEW2 at quasilight speed. When the power line has the infinite length or the impedance-matching component, the voltage on the signal line and the power line remains the half of VDD. The voltage on the signal line and the power line will reach to  V finally when the length of the power line has the finite length and the terminal impedance of PS is quite small. However, the time from /2 V to  V depends on the round-trip time on the power line.

When DR1 is turned off, SEMW is generated only on the signal line. Therefore, the signal line is charged to 0 V from  V by SEW at quasilight speed and the voltage of the power is not changed. However, when the static current exists on the power line, the spike or bounce will arise at the power terminal of DR on the power line after DR1 is turned off because SEMW is generated on the power line at this timing.

2.4. Electric Current on SMC [7]

The fact that the conduction current or charge current which is defined as drifts at the speed of the order of a millimeter per second became apparent by the presentation of George Gamow in 1947. On the other hand, the engineers and the scientists believe that the electric current of SMC flows at quasilight speed. If it is true, what will the electric current be? How the electric current is produced? Is there no conduction current or charge current on SMC? The SEMW theory provides the complete answer against these questions.

Figure 4 shows the waveform and shapes on the signal line after DR1 is turned on. Figure 4(a) shows the calculated SEW of the driving terminal. Figure 4(b) shows the calculated rise part of the voltage of the driving terminal. Figure 4(c) shows the calculated signal current of the driving terminal.

(a) SEW

(b) Rise part of voltage

(c) Signal current

Figure 4: Waveform and shapes on signal line after DR1 is turned on (calculated).

The calculation condition is as follows: the circuit is shown in Figure 1; PS is the ideal voltage source; VDD is 3 V; the switching time of DR is 100 ps; each length of power line and signal line is 10 mm and 20 mm, respectively.

In Figure 4, the rise part of the signal voltage shown in Figure 4(b) is gotten by time integral of SEW shown in Figure 4(a) and its magnitude is held till DR is turned off. The rising shape of the signal current shown in Figure 4(c) is same as that of the signal voltage. On the other hand, the signal current will disappear after 562 ps which is the traveling time on the signal line. When DR is turned on, SEW having the negative magnitude starts pulling out the electrostatic energy from PS for charging the signal line. The electrostatic flow has no wave energy shown by the Poynting vector, but it exists in the insulator between two conductors. The electric current is caused to the magnetic field when it exists on the transmission line of the voltage source circuit. Therefore, the signal current can be gotten by line integral of the magnetic field around the conductor.

The static current such as the leakage current and the DC current of the terminal resistance is the conductive current or charge current on SMC. Recently, the static current of the digital circuit which consists of CMOS circuit is becoming negligible.

From the above, it has been shown that the following three kinds of the electric current on SMC were clarified by the SEMW theory.

(a)The first electric current can be gotten by a line integral of the magnetic field of SEMW around the conductor of the transmission line in accordance with the Ampère’s circuital law, and it travels at quasilight speed.(b)The second electric current can be gotten by a line integral of the magnetic field of the flow of the electrostatic energy, and it is not the wave but it drifts at quasilight speed by being pulled out of SEMW.(c)The third electric current is the conductive current or charge current. The average drift speed of the charge () is on the order of a millimeter per second.

When SMPC is used for the IT equipment or the multimedia equipment, the almost load current of SMPC which consists of the second current and the third current is included slightly. Therefore, the test condition of SMPC should be recreated to this condition. The second electric current and the third electric current cannot cause electromagnetic disturbance or EMI because they are not the wave. The help of SEMW is necessary whenever the second electric current moves or changes. The third electric current cannot be changed to the EMW or SEMW because its drift speed is quite slower than the traveling speed of EMW or SEMW. And, in addition, it cannot change quickly by itself without the help of SEMW. Therefore, only the first current can cause electromagnetic disturbance or EMI only. The voltage droop, bounce, surge, and electromagnetic noise will be suppressed by simply attenuating the first current or SEMW on SMC.

3. Electromagnetic Analysis of SMPC Based on SEMW Theory

Figure 5 shows the elementary circuit of the buck converter which is one of the most popular DC-DC converters.

Figure 5: Elementary circuit of buck converter.

The major circuit parameters in Figure 5 are shown in Table 1.

Table 1: Major circuit Parameters.

UDCL
500 mm length, 20 mm width
Transmission line formed by double-sided PCB of FR4

SDCL
100 mm length, 20 mm width

RDCL
≧100 mm, few ten millimeters width

Q1
Absolute maximum drain to source voltage: 30 V

Absolute maximum drain current: 30 A

Static on-state resistance of the drain to source: 10 mΩ

Rise/fall time: 3.5 ns (MSF: 91 MHz)

Output capacitance: 350 pF (3.3 Ω at MSF)
Power MOSFET of RJK0305DPB (RENESAS)

VS
12 V

VOUT
5 V

Output current
20 A

Figure 6 shows the calculated SEW and the voltage after Q1 is turned on. The voltage is calculated by time integral of the waves of SEW because SDCL is charged by SEW. Figure 6(a) shows the calculated SEW on SDCL. Figure 6(b) shows the rise part of the voltage at the point A shown in Figure 5.

(a) SEW on SDCL

(b) Rise part of voltage at point A

Figure 6: SEW and voltage after Q1 is turned on (calculated).

In Figure 6(b), the vibration frequency which is caused at each switching period is 60.15 MHz and the continuous time of the vibration is relatively long. Therefore, it will cause the radiated disturbance. Figure 7 shows the calculated waveforms of SEW and the voltage after Q1 is turned off. Figure 7(a) shows the calculated SEW on UDCL. Figure 7(b) shows the voltage of the drain of Q1.

(a) SEW on UDCL

(b) Drain voltage of Q1

Figure 7: SEW and voltage after Q1 is turned off (calculated).

In Figure 7, the rise part of the voltage was calculated by time integral of the waves of SEW. Q1 will be broken by the overvoltage if the snubber is not used. The frequency of the vibration on UDCL is 73.4 MHz. The vibration duration is relatively short, but the magnitude of it is larger than that at the turn on. Therefore, it also will cause the radiated disturbance or EMI. In addition, the conducted disturbance will be caused when the switching frequency is between 150 kHz and 30 MHz, if the high performance line filter is not used.

As above, when the SEMW theory is used, the electromagnetic analysis of SMPC becomes possible by using only parameters according with the physics.

4. LILL Technologies

4.1. On-Board LILL

When the component which is similar to the ideal voltage source is located near the power MOSFET, it is expected that the vibration after Q1 is turned on/off will not arise. The electromagnetic disturbance or EMI will be suppressed by being configured to the transmission line and adding the absorption loss when the characteristic impedance is not zero. Such function cannot be actualized by the capacitor. The development of the low impedance lossy line (LILL) was started for such needs.

Figure 8 shows an example of the typical cross-section of the chip of LILL [5, 7, 8].

Figure 8: Cross-section of LILL chip.

In Figure 8, the cross-section view is common to the two-side faces of the chip. A and L show the silver coating layers, A shows the cathode, L shows the anode, B and K show the carbon graphite layers, C and J show the conductive polymer layers, E shows the etched layer of the aluminum without the conductive polymer, F and H show the etched layer including the conductive polymer, G shows the etched aluminum layer, N shows the boundary line of the available chip, M shows the line for cutting, and D shows the masking layer for keeping the insulation between the aluminum layer and the conductive polymer layer at the cutting surface.

The novel characteristic equations for the simulation of the transmission coefficient () and the terminal impedance () of the LILL were developed based on the electromagnetism and the telecommunication engineering, and they have been improved through our prototyping of many times till now.

Figure 9 shows the examples of the prototype of the LILL for using on PCB.

(a) Prototype

(b) Configuration

(c) Appearance of test

Figure 9: The prototype of LILL16 for using on PCB.

In Figure 9, the numeric letters in LILL16 mean the effective chip length. LILL16 consisted of the chip which has the effective chip width of 1 mm and the effective chip length of 16 mm. The conductive polymer layer was formed in the water solution of the microscopic particles of the conductive polymer. The thickness of the chip was 200 μm approximately. The electrode of LILL was made of the copper. The width of LILL16 was 3 mm and the length of it was 24 mm.

Figure 10 shows the typical value of of LILL14. Figure 10(a) shows the measured and Figure 10(b) shows the calculated [8].

(a) (measured)

(b) (calculated)

Figure 10: of prototyped LILL14.

In Figure 10(b), the calculation condition is shown in Table 2.

Table 2: Calculation condition.

Appearance capacitance of etched aluminum foil
33.9 μF/cm²

Dielectric constant of alumina
8.5

Conductivity of conductive polymer
12,000 S/m

Conductivity of carbon graphite
72,727 S/m

Appearance ratio of capacitance
0.8

Shortening ratio of effective line length
0.45

Effective chip width
1 mm

Effective chip length
14 mm

Thickness of alumina layer on etching surface
22.8 nm

Thickness of conductive polymer layer
1 μm

Thickness of carbon graphite layer
0.92 μm

Effective thickness of void in etching layer
0.8 μm

Electromagnetic coupling between terminals
 F/m

4.2. Design Example of LILL for SMPC

Figure 11 shows the calculated characteristics of LILL applying to SMPC.

(a)

(b)

Figure 11: Characteristics of LILL for applying SMPC (calculated).

The calculation condition is shown in Table 3.

Table 3: Calculation condition.

Effective chip width
2 mm

Thickness of alumina layer on etching surface
34.3 nm

Thickness of high viscosity conductive layer
20 μm

Widh of LILL
4 mm

Length of LILL
(Chip Length) + 6 mm

Rated voltage
24.5 V

Rated current
25 A

Others are same as the calculation condition of of prototyped LILL14.

LILL for using to SMPC will be sealed by the heat hardener.

5. MILL Technologies

The cross-section of the chip and configuration of the on-board MILL for SMPC are similar to those of the on-board LILL shown in Figures 8 and 9.

5.1. Function of MILL [6–8]

SEMW exists on SDCL and L1 in the elementary circuit of the buck converter shown in Figure 5. LILL is not suitable for using on SDCL because the energy for charge/discharge of LLIL is too large. The characteristic impedance of MILL and the connected transmission line is designed to be similar. When the characteristic impedance becomes larger, its attenuation becomes smaller. Therefore, the attenuation of MILL is smaller than that of LILL in the case of the same chip length.

Figure 12 shows the image of SEW traveling on MILL.

Figure 12: Image of SEW traveling on MILL.

In Figure 12, of SEW is not changed but the magnitude is reduced on MILL and the magnitude of the charge voltage is reduced in accordance with the reduction of the magnitude of SEW on MILL. However, the reduction of the charge voltage is fully compensated on MILL by the exponential variation which is shown by the dash line. As a result, the switching voltage shape and the magnitude will be maintained and the electromagnetic disturbance or EMI on SDCL will be suppressed in accordance with the attenuation of SEMW.

The magnitude of SEW on MILL is

where is the thickness, is the length, is the attenuation constant, and is the initial magnitude of SEW.

According to the definition of the electromagnetism, the signal voltage on MILL is

In (5), when is , which is the effective thickness of the insulator of MILL, and is, which is the line length of MILL,

The compensation voltage by the attenuation of SEW which is shown by the dash line in Figure 12 is

From (6) and (7), the total sum of the signal voltage is

From (8), the signal voltage is kept to the constant value on MILL.

This phenomenon can be explained also in a qualitative manner. That is, the DC level does not attenuate on the metal plate, and the wave length is maintained on the transmission lines having the homogeneous medium which are connected to each terminal of MILL when SEMW is considered to be a kind of Soliton.

Above-mentioned function of MILL was confirmed by the experiment [6–8].

5.2. Design Example of MILL for SMPC

Figure 13 shows the characteristics which were calculated based on the prototyped result of LILL and MILL by the developed characteristic equations.

(a)

(b)

Figure 13: Characteristics of MILL for applying SMPC (calculated).

The calculation condition is shown in Table 4.

Table 4: Calculation condition.

Appearance capacitance of etched aluminum foil
0.49 μF/cm²

Appearance ratio of capacitance
0.9

Shortening ratio of effective line length
0.6

Effective chip width
0.2 mm

Thickness of alumina layer on etching surface
1.024 μm

Thickness of high viscosity conductive layer
50 μm

Effective thickness of void in etching layer
0.3 μm

Electromagnetic coupling between terminals
 F/m

Rated voltage
24.5 V

Rated current
25 A

Others are same as the calculation condition of LILL shown in Figure 11, respectively.

MILL for applying SMPC will be sealed by the heat hardener.

6. Application Example of LILL and MILL

6.1. Design of Improved Circuit of Buck Converter

Figure 14 shows the improved circuit of the buck converter.

Figure 14: Improved circuit of buck converter.

In Figure 14, improved circuit is formed by adding each of LL1, LL2, and ML1 and by replacing UDCL, SDCL, and RDCL on the circuit shown in Figure 5 to UDCL1, UDCL2, SDCL1, SDCL2, RDCL1, and RDCL2.

The circuit parameters in Figure 14 are shown in Table 5.

Table 5: Circuit parameters.

UDCL1
Stem trace: 10 mm length, 100 mm width

Branch trace: 48 mm length, 5 mm width
Transmission line formed by outer layers of four-layer PCB of FR4

UDCL2
20 mm length, 60 mm width

SDCL1
10 mm length, 60 mm width

RDCL1
20 mm length, 30 mm width

RDCL2
20 mm length, 30 mm width

SDCL2
20 mm length, 60 mm width
Transmission line formed by abutting outer layer and inner layer of four-layer PCB of FR4

Q1
Maximum DC voltage: 27 V

Maximum output current: 25 A

Footprint size: 5.3 mm × 1.1 mm

Others are estimated to be same as Q1 in Table 1
POL IC of R2J20751NP (RENESAS)

D1
Maximum average forward current: 30 A

Maximum DC reverse voltage: 30 V

Maximum forward voltage drop: 0.5 V

Footprint size: 7.64 mm × 10.28 mm.
30SLJQ030 (IR) of Schottky barrier diode

L1
Inductance: 800 nH

Maximum current: 25.7 A

Footprint size: 12.9-mm square

Terminal impedance: 500 Ω at MSF
CEP125NP-0R8NC-UD (SUMIDA)

C1
100 μF
Bulk capacitor

Switching frequency
≧1 MHz

VS
12 V

VOUT
5 V

Output current
20 A

6.2. Simulation of Characteristics of LILL Used on PCB of Buck Converter

Figure 15 shows the calculated characteristics of LL1 shown in Figure 14.

(a)

(b)

Figure 15: Characteristics of LL1 on PCB (calculated).

LL1 has two power terminals and two ground terminals. The calculation condition is the following: the characteristics of LILL shown in Figure 11 are used except the electromagnetic coupling between the terminals which is  F/m; the power terminal number 1 is connected to the branch trace of UDCL1, the power terminal number 2 is connected to the power trace of UDCL2, the ground terminal number 1 and number 2 are connected to the ground plane, the capacitor of 1 mF/15 nH/60 mΩ is connected to the stem trace of UDCL1 and the ground plane, and the capacitor of 100 nF is connected to the branch trace of UDCL1 and the ground plane, respectively. of LL1 is calculated at the point B shown in Figure 14 and LILL16 is used as LL1.

In Figure 15, when the decoupling capacitor is used with the branch trace of UDCL1, of the decoupling capacitor is improved. However, the terminal impedance of the decoupling capacitor is increased. and terminal impedance of the branch trace with the capacitor at 91 MHz of MSF are −10.1 dB and 8.2 Ω. On the other hand, when a terminal of LILL is connected to the branch trace and the ground plane of UDCL1, both and the terminal impedance of LL1 are improved. and terminal impedance of LILL16 at 91 MHz of MSF are −93.4 dB and 31 mΩ.

Figure 16 shows the calculated characteristics of LL2 shown in Figure 14.

(a)

(b)

Figure 16: Characteristics of LL2 on PCB (calculated).

The calculation condition of LL2 is the following: the power terminal number 1 is connected to the power trace of RDCL1, the power terminal number 2 is connected to the branch trace of RDCL2, and the ground terminal number 1 and number 2 are connected to the ground plane, respectively. The other condition is same as that of the characteristics of LL1 shown in Figure 15. of LL2 is calculated at the point F shown in Figure 14. LILL16 is used as LL2. The expected function of LL2 is the reduction of the output impedance of the improved circuit of the buck converter. LL2 will be unnecessary when LILL is used at the front end of the load such as LSI. In Figure 16, and terminal impedance of the branch trace with the capacitor at 91 MHz of MSF are −3.7 dB and 8.6 Ω and and the terminal impedance of LILL16 at 91 MHz of MSF are −93.4 dB and 31 mΩ.

6.3. Simulation of Characteristics of MILL Used on PCB of Buck Converter

Figure 17 shows the calculated characteristics of ML1 shown in Figure 14.

(a)

(b)

Figure 17: Characteristics of ML1 on PCB (calculated).

ML1 has two power terminals and two ground terminals. The calculation condition is the following: the characteristics of ML1 shown in Figure 14 is used except the electromagnetic coupling between the terminals which is  F/m, the power terminal number 1 is connected to the power trace of SDCL1, the power terminal number 2 is connected to the power trace of SDCL2, and the ground terminal number 1 and number 2 are connected to the ground plane by the via hole, respectively. MILL32 which consists of 32 mm length chip is applied to ML1 of the improved circuit of the buck converter. Each S11 and S21 of MILL32 at MSF of 91 MHz is −23 dB and −54 dB as shown in Figure 17.

6.4. Electromagnetic Analysis of Improved Buck Converter

Figure 18 shows the calculated SEW after Q1 is turned on at the point C on SDCL1 and the point D on SDCL2 shown in Figure 14.

(a) Point C on SDCL1

(b) Point D on SDCL2

Figure 18: SEW on SDCL after Q1 is turned on (calculated).

The waveform of SEW is calculated by (1). The calculation condition is shown in Table 6.

Table 6: Calculation condition.

0.877

0.568

0

−5.25 ns

Relative permeability of transmission line
1

Dielectric constant of transmission line
4.35

ML1
MILL32

Dielectric constant of MILL32
8.5

In Figure 18, the magnitude of SEW on SDCL1 is not negligible, but it is discontinuous, and the magnitude of SEW on SDCL2 is negligible.

Figure 19 shows the calculated rising part of line voltage after Q1 is turned on at the point C on SDCL1 and at the point D on SDCL2 shown in Figure 14.

(a) Point C on SDCL1

(b) Point D on SDCL2

Figure 19: Rising part of line voltage after Q1 is turned on (calculated).

The rising part of line voltage at the point C on SDCL1 is calculated by time integral of SEW on SDCL1. The rising part of line voltage at the point D on SDCL2 is calculated by time integral of SEW on SDCL2 which has the magnitude of SEW on SDCL1 in accordance with the function of MILL shown in Section 5.1. In Figure 19, the bounce does not exist on the line voltage and the rise time is little increased in comparison with the intrinsic rise time of Q1 shown in Figure 14. Therefore, the electromagnetic disturbance or EMI will be suppressed on SDCL2 after Q1 is turned on.

Figure 20 shows the calculated SEW after Q1 is turned off at the point B and A on UDCL2 shown in Figure 14.

(a) SEW at point B on UDCL2

(b) SEW at point A on UCDL1

Figure 20: SEW on UDCL after Q1 is turned off (calculated).

The waveform of SEW is calculated by (1). The calculation condition is shown in Table 7.

Table 7: Calculation condition.

13.17

LL1
LILL16

Dielectric constant of LILL16
8.5

Others are same as the calculation condition of the waveform of SEW shown in Figure 18.

In Figure 20(a), the magnitude of SEW on UDCL2 is not negligible, but only the magnitude is changing. In Figure 20(b), the magnitude of SEW is negligible.

Figure 21 shows the calculated line voltage on UDCL2 and UDCL1 after Q1 is turned off. The line voltage on UDCL2 and UDCL1 is calculated by the time integral of SEW on UDCL2 and UDCL1.

(a) Point B on UDCL2

(b) Point A on UDCL1

Figure 21: Line voltage after Q1 is turned off (calculated).

In Figure 21(b), the spike or bounce at the point A on UDCL1 is negligible. Therefore, the electromagnetic disturbance or EMI will be suppressed on UDCL1 after Q1 is turned off.

Figure 22 shows the calculated SEW on SDCL1 and SDCL2 after Q1 is turned off.

(a) Point C on SDCL1

(b) Point D on SDCL2

Figure 22: SEW on SDCL after Q1 is turned off (calculated).

The waveform of SEW is calculated by (1). The calculation condition of the waveform shown in Figure 22(a) is the following: is 3.56, and the others are same as the calculation condition of Figure 18.

In Figure 22, the magnitude of SEW on SDCL1 is not negligible, but it is discontinuous, and the magnitude of SEW on SDCL2 is negligible.

Figure 23 shows the calculated falling part of line voltage on SDCL1 and SDCL2 after Q1 is turned off. The calculation method is similar to that of the line voltage shown in Figure 21.

(a) Point C on SDCL1

(b) Point D on SDCL2

Figure 23: Falling part of line voltage after Q1 is turned off (calculated).

In Figure 23, there is no spike or bounce on SDCL1 and SDCL2. Therefore, the electromagnetic disturbance or EMI will be suppressed on SDCL2 after Q1 is turned off.

7. Configuration of Buck Converter to QSCC [8]

According to the electromagnetism, the electromagnetic disturbance or EMI does not arise when the electromagnetic field of SMC is in the stationary state or the quasistationary state. According to the SEMW theory, when the traveling time () of SEMW on all transmission line of SMC is smaller than 1/5 of or , SMC is considered to be QSCC. is 0.7 ns because   or of Q1 on the basic/improved circuit of the buck converter is 3.5 ns. Therefore, the permissible length of the trace on PCB of FR-4 () is 100.7 mm. In Figure 5, the line length of UDCL and the sum of the line length of SDCL, LI, and RDCL is much longer than the limit. The electromagnetic boundary line of QSCC on SMPC is formed by these because the attenuation of LL1, LL2, and ML1 is quite large. The sum total of the lengths of UDCL2, Q1, and SDCL1 is 34.6 mm, which is shorter enough than 100.7 mm. As a result, the circuit between LL1 and MILL2 will be configured as QSCC. The active device does not exist on the closed circuit which consists of SDCL2, RDCL, and L1. Therefore, this circuit will be the stationary closed circuit. The state of UDCL1 and RDCL2 will be in the stationary state if the ambient is in stationary state. As a result, the improved circuit of the buck converter shown in Figure 14 meets the condition of QSCC perfectly. The control circuit also will be configured to QSCC by applying LILL and MILL in accordance with the QSCC criteria.

Normally, the electromagnetic effect of the wire can be ignored on QSCC. When the accurate analysis of the transmission delay of the wire is necessary, the easy method using the element of the capacitance and the resistance can be applied like a design method of on-chip interconnection. The conventional AC circuit theory, the circuit simulator such as the SPICE, and the state space averaging method for the analysis of the stability control of SMPS can be used effectively on QSCC. The switching frequency can be increased till the limit of the switching device because the rise time of the switching voltage is kept to intrinsic rise time of the power MOSFET by LILL. The power loss consists of the static loss and the electromagnetic loss. The generation of SEMW, bounce, surge, and vibration cause electromagnetic loss. The electromagnetic loss will also be reduced by being configured to QSCC. The higher the switching frequency, the higher the performance of LILL and MILL. The more the switching frequency, the higher the performance of LILL and MILL. Therefore, the switching time of the device is desired to be faster. The size, weight, the turn-around time from design to delivery, the cost for manufacturing, and the reliability will be improved by configuring SMPC to QSCC.

8. Conclusions

The SEMW theory and the design methodologies of SMPC were presented in this paper. When the SEMW theory is used, the electromagnetic analysis of SMPC becomes possible by using only parameters based on the physics, not by the equivalent circuit which is formed by the arbitrary idea. LILL and MILL technologies were presented also in this paper. LILL is effective for suppressing the electromagnetic noise and the spike on UDCL after the transistor is turned on. In addition, LILL provide the ideal DC source near the switching transistor. The MILL is effective for suppressing the electromagnetic noise and the spike on SDCL on SMPC after the transistor is turned on/off.

Three kinds of the electric current on SMC were presented. The first electric current is gotten by the line integral of the magnetic field of SEMW based on the Ampère’s circuit law, and it travels at quasilight speed. The second electric current is the flow of charge current of the transmission line or others and the value of the line integral of the magnetic field of the electrostatic energy around the conductor in accordance with the Ampère’s circuit law. And the third electric current is the conductive current or charge current. The average drift speed of the charge () is on the order of a millimeter per second. The second electric current cannot cause electromagnetic disturbance or EMI by itself because it cannot move by itself. The third electric current also cannot cause the electromagnetic disturbance or EMI because its drift speed is quite slow and it is not the wave. The assistance by SEMW is necessary whenever the second electric current or the third electric current changes quickly on SMC. Only the first current causes the electromagnetic disturbance or EMI. Therefore, it was clarified that the ripple, voltage droop, bounce, surge, and electromagnetic noise will be suppressed by reducing only the first current or SEMW on SMC.

The methodology for reconfiguring SMPC to QSCC was presented. SMPC can be configured to QSCC by applying LILL and MILL because the electromagnetic boundary line of QSCC is formed by them. The buck converter which is one of the most popular DC-DC converters was configured to QSCC as an example. Normally, the electromagnetic effect of the wire can be ignored on QSCC. When the accurate analysis of the transmission delay of the wire is necessary, the easy method using the element of the capacitance and the resistance can be applied like a design method of on-chip interconnection. The conventional design tools which includes SPICE based on the AC circuit theory will be effective for the design and analysis of the inside circuit of QSCC. The state space averaging method for the analysis of the stability control of SMPS will become more reliable when SMPS is reconfigured to QSCC. The more the switching frequency, the higher the performance of LILL and MILL. Therefore, the switching time of the device is desired to be faster earnestly. The size, weight, the turn-around time from design to delivery, the cost for manufacturing, and the reliability will be improved by configuring SMPC to QSCC. The other application examples cannot be presented because of space limitation. They will be presented in the future by utilizing the suitable opportunity. The challenge for the commercialization of these technologies by getting the investment is the immediate issue for our venture company. Mathcad 15 and Excel were used for all calculations.

Conflict of Interests

The authors declare that there is no conflict of interests regarding the publication of this paper.

Acknowledgments

The LILL was prototyped since 2008 by using the Clevios offered by Heraeus in Germany, the etched aluminum foil offered by Japan Capacitor Industrial Co., Ltd., and some production equipment offered by Kohzan Corporation in Japan.

References

H. de Groot, E. Janssen, R. Pagano, and K. Schetters, “Design of a 1 MHz LLC resonant converter based on a DSP-driven SOI half-bridge power MOS module,” in Proceedings of the 37th IEEE Power Electronics Specialists Conference (PESC '06), pp. 1–14, June 2006.

M. C. Cláudio Duarte and V. M. Fiori, “A new ZVS-PWM active-clamping back-boost converter,” in Proceedings of the IEEE Power Electronics Specialists Conference (PESC '05), pp. 1429–1433, 2005.

Q. Li, F. C. Lee, D. Sterk, and K. Jin, “Soft-switching self-driven buck converter with three-switch cell structure,” in Proceedings of the 2nd IEEE Energy Conversion Congress and Exposition (ECCE '10), pp. 3705–3710, September 2010.

Y.-S. Lai, Y.-T. Chang, and B.-Y. Chen, “Novel random-switching PWM technique with constant sampling frequency and constant inductor average current for digitally controlled converter,” IEEE Transactions on Industrial Electronics, vol. 60, no. 8, pp. 3126–3135, 2013.

H. Tohya and N. Toya, “A novel decoupling component for the power distribution network,” in Proceedings of the 1st International Conference on Green Circuits and Systems (ICGCS '10), pp. 479–484, June 2010.

H. Tohya and N. Toya, “Novel design concept and technologies of the switching mode circuit based on the electromagnetic wave theory and the nonlinear undulation theory,” in Procedings of the IEEE Region 10 Conference (TENCON '10), pp. 1135–1140, November 2010.

H. Tohya and N. Toya, “Solitary electromagnetic waves generated by the switching mode circuit,” in Behaviour of Electromagnetic Waves in Different Media and Structures, pp. 249–274, InTech Open Access Publishing, Vienna, Austria, 2011.

H. Tohya, Switching Mode Circuit Analysis and Design-Innovative Methodology by Novel Solitary Electromagnetic Wave Theory, Bentham Science, 1st edition, 2013.

H. B. Bakoglu, Circuits, Interconnections, and Packaging for VLSI, Addison-Wesley, 1990.

ITRS, “ITRS Reports,” 2011, http://www.itrs.net/reports.html

H. Tohya and N. Toya, “A novel design methodology of the on-chip power distribution network enhancing the performance and suppressing EMI of the SoC,” in Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS '07), pp. 889–892, May 2007.