Analytical Model of Subthreshold Drain Current Characteristics of Ballistic Silicon Nanowire Transistors

A physically based subthreshold current model for silicon nanowire transistors working in the ballistic regime is developed. Based on the electric potential distribution obtained froma 2DPoisson equation and by performing someperturbation approximations for subband energy levels, an analytical model for the subthreshold drain current is obtained.The model is further used for predicting the subthreshold slopes and threshold voltages of the transistors. Our results agree well with TCAD simulation with different geometries and under different biasing conditions.


Introduction
Performance improvement of metal-oxide-semiconductor field-effect transistors (MOSFETs) based on downsizing has now reached the bottleneck because of the severe short channel effects (SCE) and extremely large leakage current in ultrasmall scales.Several alternate structures other than the conventional planar MOSFET have been proposed [1][2][3].It was shown that silicon nanowire transistor (SNT) with a surrounding gate architecture has excellent SCE immunity and is now considered to be one of the most promising candidates for future generations of nanoscale MOS technology.
Due to the superior gate control capability, the channel region of SNT needs not to be heavily doped and the penetration of source and drain electric field into the channel are still minimal.In addition, mobility degradation due to the impurity scattering of carriers in the channel can be greatly reduced also.Ultrashort channel structures further enable ballistic transport [4,5].Transistor working in the ballistic regime is considered to have the best electrical performance.However, subthreshold leakage is still the big concern for these devices.It will be more convenient for process and device engineers to estimate these effects by using a simple compact model as it did in the conventional device structure.The conventional drift-diffusion-based subthreshold current model will no longer be valid for the ultrashort SNTs [6,7] as the ballistic transport has become the dominating mechanism and that makes the analytical modeling extremely difficult [8,9].In [10], a model for subthreshold characteristics of ballistic surrounding gate MOSFET is proposed.However, the boundary electric potential was extracted from numerical simulation without comprehensive analysis.This work aims at the development of an analytical model for the subthreshold drain current of SNT by taking the ballistic effect into account.The boundary potential is analyzed from the electron statistics point of view.
Our model is developed by firstly solving the twodimensional Poisson equation to determine the potential distribution; subband energy levels are then obtained by using the first-order perturbation based on the available electric potentials.Finally drain current is obtained according to the Landauer theory by taking several major subband levels into consideration.The model is validated by comparing the results with TCAD simulation with Nonequilibrium Green Function (NEGF) model [11].NEGF approach has been widely used to characterize quantum confinement and ballistic transport in the ultrascale devices [10][11][12][13][14].The organization of this paper is as follows.The modeling of electric potential in the channel from solving Poisson's equation is presented in Section 2. In Section 3, the electrical characteristics of SNT, such as electric potential distribution, subthreshold current, subthreshold slope, and threshold voltage roll-off, are presented along with the comparison with TCAD simulations.Finally, the major results are summed up in Section 4.

Modeling of Potential Distribution
The structures of the SNT and the coordinate system used in this work are shown in Figure 1.For the sake of simplicity, heavily doped source and drain regions are considered as ideal reservoirs.The channel region is undoped.It was found experimentally that ballisticity occurs in SNT with radius of 4 nm and channel length of about 20 nm [15].This model uses the similar device dimensions.Typical values of device parameters used in the calculation and simulation are listed in Table 1.Considering angular symmetry, polar coordinates  and  were used.With the surrounding gate structure, the electric potential in the channel is predominately governed by the gate bias.While for very short channel, the influence of source and drain on electric potential cannot be neglected.To obtain the channel potential distribution, we solve the 2D Poisson equation in the undoped channel as follows: where (, ) is the electric potential,  is the magnitude of electron charge, and  Si is the silicon permittivity.  is the intrinsic electron concentration of silicon;  is quasi-Fermi potential whose value depends on position in the channel.
It equals zero at source and drain-to-source voltage ( DS ) at the drain side.Since the subthreshold drain current is mainly governed by the electrostatic near the source region, we evaluate the case when  = 0V.Comparison made between numerical simulations also confirms the validity of this assumption in the subthreshold regime.The boundary conditions for electric potential are where  GS is the gate-to-source voltage and  FB is the flatband voltage which equals the difference between the workfunctions of gate material and silicon. ox is the oxide capacitance per unit area.  and   are potentials in source and drain region, respectively.The difference of   and   is drain bias; that is,   =   +  DS .
needs to be specified to obtain the electric potential distribution.In the conventional models of SNT,   is fixed as built-in voltage of source junction  bi .For the device considered in this model,  bi =   /2, where   is the bandgap of silicon.In thin nanowires, electrons are confined to discrete subbands which are well above conduction band edge.In order to maintain the charge neutrality condition in the source region, these subband levels should be further pulled down to be occupied by more electrons.The difference of the subband levels from conduction band edge is approximated by energy levels in a cylindrical quantum well; that is, Advances in Condensed Matter Physics where ℎ is the reduced Plank constant and   is the th root of th-order first-kind Bessel function   (). represents the valley in which subbands reside.   is the radical effective mass for the valley concerned.Electron density is the statistics of each subband from Landauer theory [16].Suppose the doping concentration in the source region is   ; equation of charge neutrality is where all subband levels are assumed to be lowered by the source potential.  and    are the degeneracy and the direction effective mass of the valley, respectively. FS is the source Fermi level;  −1/2 () is the Fermi-Dirac integral.Here we used analytical approximation [17] for the integral to reduce the cost of computation.  can be obtained by solving (5) numerically and the result is a function of nanowire radius.The biasing conditions do not have significant influence on   .Figure 2(a) shows the dependence of   on the nanowire radius.It is observed that, for larger radius,   is smaller due to lower subband energy levels.
Figure 3 shows the central potential distribution along the channel obtained from TCAD simulation.In the source region, the electric potential is very close to the value calculated from (5).However, the electric potential starts to drop at some distances from interface between the source and the channel.This also occurs at the drain end of the channel.This is equivalent to an increase of channel length and is treated as a fitting parameter in the model.The increment of channel length is 1.4 nm and this value is used for other channel-length-dependent results also.Using the proposition method given in [18], (1) can be solved by dividing electric potential into two parts which can be solved separately: where  0 () is the part obtained by gradual channel approximation; that is [19], where   is the electric potential at the center of nanowire. cm is the maximum central potential that can be reached by increasing the gate voltage.In thin SNT with strong confinement, central potential also tends to be saturated when the gate voltage is very high.Because of the quantum confinement, the electron density in the channel is smaller; the maximum central potential is larger than that in the classic model [20].Since  0 () in ( 7) is based on the gradual channel approximation which is independent of both the drain bias and the channel length,  cm is determined by the gate oxide thickness and the nanowire radius.Figure 2(b) shows the dependence of  cm on the radius of the nanowire for different gate oxide thicknesses obtained from simulation.
It is obvious that the influence of gate oxide thickness on  cm is very small; that is,  cm is fairly governed by the radius of the nanowire only.An empirical fitting of the simulation result, as given below, is used to model this dependence: where the values of the fitting parameters are  = 0.484 V,  = 0.092 V ⋅ nm, and  = −0.466nm.
The central potential   can be obtained precisely by considering the boundary condition for  0 ().Here we use an asymptotic approximation, instead, to simplify the equation evaluation [19]: where  ca =  GS −  FB is the central potential when the gate voltage is far below the threshold. is an empirical smoothing parameter and its value is approximated as 0.01(1 + ln(1 +  ox /)). 1 (, ) in ( 6) is obtained by solving the residual 2D Poisson equation as an expansion of Fourier-Bessel series [18]: and the eigenvalue   is the th solution of the equation where  ox is the permittivity of oxide.Coefficients  0 and  1 are obtained by expanding the boundary conditions (3) in the Fourier-Bessel series.Since the gate length  is usually much larger than nanowire radius , the expressions for  0 and  1 can be further simplified as where   is the expansion coefficient of  0 () in the Fourier-Bessel series: The integral in ( 13) can be simplified further.Considering the expression of  0 () in (7), in the subthreshold regime, (  −  cm )/   is small;  0 () can be simplified as Taking these approximations into account, the integral in ( 14) can be analytically derived and the result is Figure 4 compares the central potential distribution along the channel obtained from the model and the simulations for various gate lengths.The results of model agree well with simulation ones, especially in the region near the source dominating the drain current characteristics.It is clearly shown that as gate length shrinks, the influence of the source and drain regions on the electric potential in the channel becomes more prominent; the central potential in the channel increases as a result.In the case of gate length of 10 nm, the central potential is even larger than the gate voltage.It indicates a serious SCE in such short gate length.Larger potential in the channel results in a larger electron concentration and therefore a larger subthreshold leakage current in a shorter SNT.For a device with a larger gate length, the gate controllability on the channel potential is stronger; the variation of potential near the source still remains small as the drain voltage increases.However, for gate length of 10 nm, the control of gate becomes much weaker and the increase of drain voltage would cause a substantial variation on the potential distribution in the whole channel (see Figure 4).

Subthreshold Current Characteristics
Electronic transportation was determined at the subband barrier located at the position with minimum electric potential along the channel.Within each subband, electrons injected from source or drain have to transmit across the barrier.The transmission probability is either one or zero depending on whether the electron energy is larger or smaller than barrier energy or not.Drain current was then calculated with Landauer's theory [16]: where  FD =  FS −  DS is Fermi level of drain region.Note that the subband levels in ( 16) are the most important parameter for determining the drain current.In the flatband condition, the subband levels are characterized by (4).For larger gate bias, it is difficult to get an analytical expression for the subband levels and drain current.Here we revised the subband levels by taking perturbation integrals at the subband barrier: where  , () =   (  /)/  is the corresponding wavefunction of the subband.The wavefunctions of the corresponding subbands in the two valleys are the same.  is a normalization factor, and  min is the position of subband barrier along channel and is determined by ( 1 (, )/)|  min = 0.Only the first term in (10) is considered when deriving  min because the magnitude of other high-order terms is much smaller; hence,  min = (/2 1 )ln( 11 / 01 ).From ( 10) and ( 14), variation of subband levels can be analytically obtained at various bias conditions and drain current can be readily computed by putting subband levels into (16).
Figure 5 shows the transfer characteristics calculated from the model and TCAD simulation.In the subthreshold region, drain current shows an exponential dependence on the gate voltage and that agrees with simulation very well.Results of different gate lengths are compared and deteriorated subthreshold characteristics in shorter channels are observed.Not only does the leakage current increase significantly, but also the drain current changes slower with the gate voltage.It indicates that the switching performance gets worse in short channel devices.Drain current characteristics for different drain biases are also shown.For devices with large channel lengths, the influence of the potential near the subband barrier by the drain bias is small (see Figure 4).Hence, the subband energy levels do not change much at different drain bias.The slight increase on the drain current for a larger drain bias is mainly due to the reduction of drain Fermi level which reduces the electron flux injecting from drain.However, for short channel device, for example,  = 10 nm, a larger drain bias leads to the increase of the potential near subband barrier and then the reduction of subband energy levels.As a consequence, the drain current increases significantly as the drain voltage increases from 0.05 V to 0.5 V (see Figures 5(a Figure 7(a) plots the SS, extracted from  DS - GS curve, as a function of channel length.The newly developed model is in good agreement with the TCAD simulation.As shown in the figure SCE is still obvious in the concerned channel length range.At shorter channel lengths, the SS values are larger as a result of degraded gate control over the channel.Reducing the radius of nanowire can suppress the SS degradation for the same channel length.As the channel length increases, SS reduces closer to its lowest limit of 60 mV/dec.

2 AdvancesFigure 1 :
Figure 1: Schematic of structure of an -type SNT.(a) Cross section view and (b) cut plane along the channel. and  are the radius and the length of nanowire, respectively. ox is the gate oxide thickness.

Figure 2 :
Figure 2: (a) Dependence of source potential on the nanowire radius for the source doping density shown in Table 1.(b) Dependence of maximum central electric potential on the nanowire radius.The results can be fitted empirically with a rational function.

Figure 3 :
Figure 3: Central electric potential at different positions along the channel obtained from TCAD simulation for  = 4 nm and  = 10 nm; source and drain length are both 10 nm;  GS = 0.1 V,  DS = 0.05 V.The horizontal axis is distance from source electrode.Interfaces between channel and source and channel and drain are depicted by dashed lines.

Figure 4 :
Figure 4: Central electric potential along the channel obtained from the model and TCAD simulation for different gate lengths.Nanowire radius is (a) 4 nm; (b) 3 nm.The other device parameters are obtained from Table1.The solid lines and symbols are for drain bias of 0.05 V; the dashed lines and open symbols are for drain bias of 0.5 V.
Figure 6 shows the transfer characteristics calculated from our model together with TCAD simulation results for transistors with different values of nanowire radius and gate oxide thicknesses.The agreement is quite good.It indicates that the present model can accurately predict subthreshold characteristics for different device parameters.Subthreshold slope (SS) is used to describe the steepness of  DS - GS characteristics.It is defined as reduction of gate voltage required to reduce drain current by one decade; that is, SS =  GS  log ( DS ) .

Table 1 :
Typical device parameters used in the simulation and model calculation.