Advances in Materials Science and Engineering
Volume 2019 (2019), Article ID 5254892, 9 pages
https://doi.org/10.1155/2019/5254892

Research Article

Study on Surface Hardness and Microstructure of Pure Copper Chip Strips Prepared by LSEM

Yunyun Pi, Xiaolong Yin, Wenjun Deng, and Wei Xia

College of Mechanical and Automobile Engineering, South China University of Technology, Guangzhou 510640, China

Correspondence should be addressed to Wenjun Deng; dengwj@scut.edu.cn

Received 12 March 2019; Accepted 24 June 2019; Published 8 July 2019

Guest Editor: Antonello Astarita

Copyright © 2019 Yunyun Pi et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

Abstract.

Large strain extrusion machining (LSEM) is one of the severe plastic deformation (SPD) methods that can improve the mechanical properties of materials. The purpose of this experiment is to study the surface hardness and microstructure of the pure copper chip strips. It was found that most of the grains of the chip strips had been refined to the ultrafine grain grade. Finite element analysis (FEA) simulations were conducted to predict the von Mises equivalent strains. Based on the analysis of variance (ANOVA), further study indicated that the surface hardness of the chip strips was decided by several key parameters including the chip thickness compression ratio, rake angle, and uncut chip thickness during LSEM. Through this analysis, a set of parameters which have the greatest impact on the properties of the material can be found. This set of parameters helps us to achieve the strip with the best performance.

1. Introduction

The severe plastic deformation (SPD) methods mainly introduce large strain during the deformation process and change the performance of the metal materials [1]. The traditional SPD methods include equal-channel angular pressing (ECAP) [2], high-pressure torsion (HPT) [3], cyclic extrusion-compression (CEC) [4], accumulative roll bonding (ARB) [5], and repetitive upsetting (RU) [6].

Cutting is also a kind of SPD methods. During the cutting process, the maximum single shear strain can reach 15 [7]. Compared with traditional SPD methods such as ECAP, the strain after single processing is about 1 which is much smaller than that in cutting, and the advantage of cutting is very obvious [8]. However, ultrafine-grained or nanocrystalline materials prepared by free cutting usually have small chip sizes and irregular shapes, and it is difficult to control their geometrical shapes [9], which makes their subsequent processing and application inconvenient. In order to effectively control the chip size and shape, Moscoso et al. combined the cutting and extruding processes and proposed a method called large strain extrusion machining (LSEM) that could be used to produce ultrafine-grained or nanocrystalline strips with uniform shape and microstructure [10]. In recent years, there have been many types of researches on LSEM. Efe et al. found that the application of the LSEM method could use MgAZ31B bulk material to prepare MgAZ31B plate material without preheating, the grain size of the obtained material was refined to the level of ultrafine grains, and the mechanical properties were also greatly improved [11]. Sevier et al. performed finite element simulations on LSEM and studied the effects of equivalent strain and equivalent strain rate on the diversity and interactivity of the microstructure and properties of the material [12]. Sevier et al. also found that when the tool rake angle was constant, the strain was completely controlled by the chip thickness compression ratio [13]. Bai et al. found that the hardness of 6013-T6 chips produced by free cutting and LSEM decreased with the increase of the cutting speed [14]. Klenosky et al. studied the LSEM and found that the hardness in the middle of the strip increased with the increase of the cutting speed. Meanwhile, the cutting became unstable and side curling appeared when the chip thickness compression ratio decreased [15].

Figure 1 shows the working principle of the LSEM. During cutting, the chips are cut and extruded through the channel formed by the main tool and the constraining tool, thereby obtaining chip strips with regular shapes through severe deformation. In the LSEM process, the shear strain generated by the chip can be represented by ε, and its calculation formula is [16, 17]

where is the chip thickness compression ratio; in which is the chip thickness and is the uncut chip thickness; and is the tool rake angle. It can be seen that the magnitude of the shear strain ε depends on the tool rake angle and the chip thickness compression ratio .

Figure 1: Schematic view of LSEM.

According to the existing literature analysis, there are many factors that affect LSEM such as tool rake angle, cutting speed, uncut chip thickness, and chip thickness compression ratio [13, 18–22]. However, few papers have conducted in-depth studies on the extent of these factors in the process of LSEM. Therefore, on the basis of previous studies [23, 24], this paper used pure copper as the workpiece material, and a series of experiments were conducted to study the variation of the surface hardness and microstructure of the chip strips and the degree of influence of various processing parameters. The finite element analysis software Deform2D was used for the simulation to analyze the distribution law of the equivalent strain under different tool rake angles, different chip thickness compression ratios, and different uncut chip thicknesses.

2. Experimental Procedure and Simulation Model

2.1. LSEM Experiment

The purpose of the LSEM experiment was to analyze the effect of the tool rake angle, the chip thickness compression ratio, and the uncut chip thickness on the surface hardness of the chip strips and then analyze the influence of the tool rake angle and the chip thickness compression ratio on the microstructure of the chip strips. The LSEM parameters used in the experiments are shown in Table 1.

Table 1: Experiment and simulation parameters.

Cutting condition
Chip thickness compression ratio λ
Rake angle α (°)
Uncut chip thickness t₀ (mm)

C1
1.5
15
0.6

C2
1.5
20
0.6

C3
1.5
30
0.6

C4
1.5
20
0.6

C5
2
20
0.6

C6
2.5
20
0.6

C7
1.5
20
0.4

C8
1.5
20
0.6

C9
1.5
20
0.8

The LSEM experiment was performed on a CA6140 lathe, as shown in Figure 2. The self-designed combined tool is made of high-speed steel. The workpiece material is a pure copper pipe with an outer diameter of 70 mm and a wall thickness of 5 mm. The workpiece speed is 92 mm/s. In order to maintain the experiment results in accordance with the simulation results, it is necessary to maintain the uncut chip thickness constant at the initial stage of the LSEM instead of increasing with the feed. Therefore, a part of the pure copper tube structure was removed.

Figure 2: A view of the LSEM experiment setup.

The surface hardness of the chip strips was measured by an instrumented indentation method (HVS-1000 digital microhardness tester).

2.2. Simulation Model

The LSEM finite element model was selected as a two-dimensional orthogonal cutting mesh model of plane strain [20]. In this study, the commercial finite element software Deform2D was used to perform the LSEM simulation based on the updated Lagrangian formulation. As shown in Figure 3, the geometry of the workpiece is set to 100 (length) × 30 (width) mm², and the workpiece adopted a four-node isoparametric plane strain element [25]. The initial mesh number was 6481. In order to accurately simulate chip formation and obtain large strain deformation during machining, the mesh in front of the cutting tool tip was set to a local high density. The separation criterion between the chip and the workpiece was realized by adopting continuous remeshing technology.

Figure 3: Two-dimensional orthogonal cutting mesh model of LSEM.

In the simulation, the main tool and the constraining tool were set as rigid types, and the workpiece was set as a plastic type; the movement of the bottom and left boundaries of the workpiece in the X and Y directions was fixed, and the tool moved to the left at a constant speed of c. The main tool and constraining tool speed were 92 mm/s. The clearance angles γ (Figure 1) of the main tool and the constraining tool were set to 5°. The simulation parameters are shown in Table 1. As can be seen from Figure 3, the workpiece and the tool could exchange heat with each other, and the rest of the boundaries exchanged heat with the environment. Pure copper was selected as the workpiece material, and the J-C constitutive model was adopted as follows:

where is the equivalent stress; is the equivalent strain; is the equivalent strain rate; is the temperature; A, B, C, n, and m are the material constants; is the reference strain rate; is the ambient temperature; and is the melting point of the material. The J-C material constants are shown in Table 2 [26].

Table 2: J-C model parameters for pure copper.

A (MPa)
B (MPa)
n
C
m

90
292
0.31
0.025
1.09

The damage model adopted the Deform2D default normalized C&L model. In this simulation, the mechanical and thermal constants of pure copper are shown in Table 3. The friction between the main tool and the chip, and the constraining tool and the main tool was defined as the Coulomb friction. According to the experiment derivation, the friction coefficient was 0.4.

Table 3: Mechanical and thermal constants of pure copper.

Young’s modulus (MPa)
Poisson’s ratio (MPa)
Thermal conductivity (N/sec/mm/C)
Heat capacity (J·Kg⁻¹·K⁻¹)
Emissivity

105000
0.33
122.61
3.16
0.7

2.3. LSEM Orthogonal Experiment with ANOVA

In this section, a LSEM orthogonal experiment was used to obtain the optimal processing parameters, which provided a theoretical basis for obtaining the highest surface hardness chip strips [27, 28]. To carry out the LSEM orthogonal experiment smoothly and to select the tool rake angle and the chip thickness compression ratio as the process parameters, the influence of the chip thickness was also considered. We used the L9 orthogonal array to arrange the test. ANOVA was used to analyze the effect of the selected parameters on the test index. The best combination of processing parameters in this orthogonal experiment was predicted. The level of selected parameters is shown in Table 4. Table 5 shows the header design of an orthogonal array.

Table 4: Factors and levels.

Parameter
Level

1
2
3

D: chip thickness compression ratio λ
2.5
1.5
2

E: tool rake angle α (°)
15
30
20

F: uncut chip thickness t₀ (mm)
0.4
0.6
0.8

Table 5: Designed header of an orthogonal array.

Factor
D
E
F

Column number
1
2
4

3. Results and Discussion

3.1. Surface Hardness of the Strip

According to the Hopkinson formula, the finer the grain size, the higher the hardness. Therefore, it is necessary to study the hardness of the chip strips prepared by LSEM under different processing parameters. The surface hardness of the chip strips was studied under the processing conditions as shown in C1 to C3 in Table 1. Table 6 shows the surface hardness values of the pure copper chip strips processed by different rake angle tools. The corresponding surface hardness values for the 15°, 20°, and 30° rake angle tools were 133.69 HV, 112.18 HV, and 110.89 HV, respectively, which were 57.3%, 32.0%, and 30.5% higher than the hardness value of 85 HV for pure copper raw materials. As α increased, the surface hardness value decreased. When the rake angle increases, the internal deformation of the chip material becomes more gradual, the dislocation density within the material gradually decreases, and the degree of grain refinement weakens, so the surface hardness value decreases.

Table 6: Surface hardness value of the pure copper chip strips under different rake angles, different chip thickness compression ratios, and different uncut chip thicknesses.

Cutting condition
C1
C2
C3
C4
C5
C6
C7
C8
C9

Surface hardness (HV)
133.69
112.18
110.89
112.18
117.70
136.15
130.47
112.18
130.93

The surface hardness of the chip strips was studied under the processing conditions as shown in C4 to C6 in Table 1. Table 6 shows the surface hardness value of the pure copper chip strips at various chip thickness compression ratios. When the chip thickness compression ratio was 1.5, 2, and 2.5, the surface hardness values of the pure copper chip strips were 112.18 HV, 117.70 HV, and 136.15 HV, respectively. It is very clear that the change of the chip thickness compression ratio has a great impact on the surface hardness of pure copper chip strips. When λ was increased to 2.5, the degree of grain refinement increased.

The surface hardness of the chip strips was studied under the processing conditions as shown in C7 to C9 in Table 1. The surface hardness values of the pure copper chip strips at different uncut chip thicknesses are shown in Table 6. When the thicknesses of the uncut chips were 0.4 mm, 0.6 mm, and 0.8 mm, the surface hardness values of the pure copper chip strips were 130.47 HV, 112.18 HV, and 130.93 HV, respectively, which did not show a specific change rule. When t₀ was 0.4 mm and 0.8 mm, the difference in the surface hardness of the pure copper chip strips was only 0.46 HV, while when t₀ was 0.6 mm and 0.8 mm, the difference in the surface hardness of the pure copper chip strips reached 18.75 HV. The results showed that the uncut chip thickness was not a key parameter affecting the surface hardness of the material. Therefore, to obtain a chip strips with the desired surface hardness, it is difficult to meet the requirements by changing t₀.

3.2. Strain Distribution and Strip Microstructures

Strain plays a key role in the formation of ultrafine-grained materials during LSEM [29, 30]. It is very important to understand the effects of strain on microstructure refinement. In order to study the influence of the rake angle on the strain distribution, the chip thickness compression ratio λ was kept constant at 1.5 and the cutting thickness t₀ was 0.6 mm (see C1 to C3 in Table 1 for details). Figure 4 shows the equivalent strain distribution at different rake angles. When the rake angles were 15°, 20°, and 30°, the maximum von Mises equivalent strains were 3.08, 1.71, and 1.52, respectively. It can be seen that the maximum equivalent strain occurred in the secondary deformation zone adjoining the chip-tool interface, wherein the deformation of the chip material was relatively severe. The change of α had little effect on the chip strip geometry, but as α increased, the equivalent strain distribution became more nonuniform and the equivalent strain also became smaller.

(a)

(b)

(c)

Figure 4: Equivalent strain distribution and the inverse pole figures (IPFs) under different rake angles: (a) α = 15°; (b) α = 20°; (c) α = 30°.

Based on the simulation analysis, the tool rake angle had an important influence on the strain distribution of the chip strips. When the rake angle of the tool was 15°, the strain distribution was very uneven compared with the simulation results of the other tool rake angles, and the maximum equivalent strain did not appear in the second deformation region. This is because the rake angle of the tool is too small to extrude the chips, and a regular strip can hardly be produced. Different strains will change the internal microstructure of pure copper materials. Therefore, it is necessary to compare and analyze the microstructures of pure copper materials produced by different rake angles.

The inverse pole figure (IPF) maps from EBSD of the pure copper chip strip microstructure prepared by different tool rake angles are shown in Figure 4. It can be seen that SPD occurs inside the chip, and the grains were elongated and crushed until they were broken into fine grains. Most of the pure copper chip strips obtained at α = 15° have been broken into fine grains, and the proportion of fibrous structure was small. The pure copper chip strips obtained at α = 20° and α = 30° can be seen to have obvious fibrous structure, which accounts for a large proportion.

As can be seen from Figure 5, regardless of α = 15°, 20°, or 30°, the grain-refining effect was very remarkable compared with the original copper [31], and most of them have been refined to the ultrafine grain level. It was found that when α increased from 15° to 30°, the chip strip-refining effect tended to decrease, and the proportion of the fine grain also decreased. This is because the smaller the strain, the smaller the degree of deformation occurring inside the chip strips, and the refining effect is reduced. When α was 20° and 30°, it was observed that the grains were elongated and flattened along the direction where the chips flowed out, and there were very few small grains that were independent. When the rake angle α was reduced to 15°, the elongated grains were broken and separated into individual grains. The grains were finer and more uniform when the rake angle α was 20° and 30°, and the previous analysis showed that the surface hardness was also the largest.

Figure 5: Grain size distribution under different rake angles.

We changed the value of λ to examine its influence on the strain (see C4 to C6 in Table 1). The equivalent strain was distributed in a strip shape, as seen in Figure 6. As λ increased from 1.5 to 2.5, the maximum equivalent strains of the second deformation region also increased from 1.71 to 2.35, but the gradient of the strain along the direction of the chip thickness increased and the impact on the internal structure of the chip became smaller and smaller. It can be seen that the chip compression ratio was different, the chip strip geometry obtained was also different, and the chip strips with smaller λ was more slender.

(a)

(b)

(c)

Figure 6: Equivalent strain distribution and the inverse pole figures (IPFs) under different chip thickness compression ratios: (a) λ = 1.5; (b) λ = 2; (c) λ = 2.5.

The influence of the chip compression ratio on the equivalent strain of the strip shows that the chip compression ratio was different, and the obtained chip morphology would also have some differences. Through the LSEM experiment, the obtained inverse pole figure (IPF) maps from EBSD of the pure copper chip strip microstructure are shown in Figure 6. It can be seen that when λ was 1.5, the fibrous structure of the obtained pure copper chip strips was very obvious, and the grain size was relatively large. In the pure copper chip strips obtained when λ was 2.0, the fibrous structure was also obvious, but the grain size was reduced compared with 1.5. When λ was 2.5, the pure copper chip strips had no obvious fibrous structure, and the grain was already very small, indicating that there was a great deformation inside the pure copper chip strips; the grains were elongated and flattened, and most of them had been broken into fine grains.

As can be seen from Figure 7, when the chip thickness compression ratio λ increased, the grain size of the chip strips decreased gradually, the coarse grains were slowly disappeared, and the proportion of fine grains was greatly increased. Combined with the results of the above simulation analysis, the larger the λ, the larger the maximum equivalent strain value, the stronger the deformation of the pure copper chip strip, the better the grain-refining effect, and the larger the surface hardness value.

Figure 7: Grain size distribution under different chip thickness compression ratios.

Taking α as 20° and λ as 1.5, the uncut chip thicknesses (t₀) were 0.4 mm, 0.6 mm, and 0.8 mm, respectively (see C7 to C9 in Table 1). As can be seen from Figure 8, the distribution characteristics of the equivalent strain were also in the form of bands. When t₀ increased from 0.4 mm to 0.8 mm, the maximum equivalent strains were 1.63, 1.71, and 1.44, respectively, which appeared to increase first and then decrease. The maximum difference in the maximum equivalent strain was only 0.27. Compared with the influence of α and λ, the influence of t₀ on the field variables is not obvious, and there is no certain rule. It can be found that when the uncut chip thicknesses were different, the chip strips had almost the same geometry and were relatively slender.

(a)

(b)

(c)

Figure 8: Equivalent strain distribution under different uncut chip thicknesses.

3.3. Orthogonal Experiment with ANOVA

In this part, the ANOVA method was used to reveal the main effects of the selected parameters on the surface hardness of a LSEM strip. The meaning of D, E, and F is shown in Table 4. The experimental results are not influenced by an empty column in Table 7.

Table 7: Experimental results for surface hardness.

No.
D
E
Empty column
F
Surface hardness (HV)

1
1
1
1
1
134.5

2
1
2
2
2
127.0

3
1
3
3
3
122.2

4
2
1
2
3
114.2

5
2
2
3
1
118.2

6
2
3
1
2
112.2

7
3
1
3
2
114.6

8
3
2
1
3
117.6

9
3
3
2
1
117.3

K1
383.7
363.3
364.3
370.0
T = 1077.8

K2
344.6
362.8
358.5
353.8
 = 129072.5

K3
349.5
351.7
355.0
354.0

K1
127.9
121.1
121.4
123.3

K2
114.9
120.9
119.5
117.9

K3
116.5
117.2
118.3
118.1

R
13.0
3.9
3.1
5.4

SS
302.5
28.7
14.7
57.6

Table 7 shows the actual data of the surface hardness of each processing parameter and the calculated value of the sum of the surface deviation of each factor. In this table, K is the sum of the measured values for each level; k is the surface of the sum of K1, K2, and K3; T is the sum of all the measured values; R is the range difference; is the surface of the sum of squares of the measured values at each level; and SS is the sum of square deviation. It can be seen from the range value R in Table 7 that D had the greatest influence on the surface hardness value of the chip strips, followed by F, and finally E.

The ANOVA results of the surface hardness of the chip strips are shown in Table 8. From the table, the sum of the square deviation of E and F was smaller than that of D. The table also shows the F ratio and value for each factor. Comparing the value with the confidence coefficient of 0.05, it can be seen that D was a significant influential factor for the surface hardness of the chip strips, while E and F had no significant effect. This shows that, in addition to D, E, and F, other factors need to consider the impact of the surface hardness of the chip strips such as lathe spindle speed and the friction coefficient between the tool and the chip.

Table 8: ANOVA analysis for surface hardness.

Source
Sum of square
Degree of freedom
Mean square
F ratio
value
Significance
Optimal level

D
302.5
2
151.248
20.565
0.046

D1

E
28.7
2
14.334
1.949
0.339
—
E1

F
57.6
2
28.804
3.917
0.203
—
F1

Error
14.7
2
7.354
—
—
—
—

Since the index of this experiment was surface hardness, the larger the value, the better the results, and thus, the maximum value of K was selected, so the optimal level of factor D was D1, the optimal level of factor E was E1, and the optimal level of factor F was F1. Considering the influential factors studied in this paper, the best parameter combination for this test was D1E1F1, which means that λ was 2.5, α was 15°, and t₀ was 0.4 mm. The surface hardness value of the chip strips measured under the condition of this optimal combination was 134.5 HV, the largest value in Table 7.

According to the ANOVA results, the surface hardness of the chip strips was mainly determined by the chip thickness compression ratio, and the influence of the rake angle and the chip thickness was small. Therefore, other factors may be considered next for further study.

4. Conclusions

In summary, we achieved the following conclusions:

(i)A series of experiments was undertaken to study the microstructure and surface hardness of the chip strips prepared by LSEM under different parameters (e.g., α, λ, and t₀). The experimental results showed that the surface hardness of the chip strips increased greatly. As α was 20°, λ was 2.5, and t₀ was 0.6 mm, the surface hardness reached the maximum value of 136.13 HV. When α and λ changed, the surface hardness of the chip strips showed a certain change rule. While t₀ increased from 0.4 mm to 0.8 mm, the surface hardness value of the chip strips exhibited an irregular change.(ii)We established a FEM model to predict the strain distribution of LSEM. In order to study the interactive effects of large strain deformation on the microstructure of the pure copper chip strips, the correlation between the strain and machining parameters (e.g., α, λ, and t₀) is necessary to be considered. As α increased from 15° to 30°, the maximum equivalent strain decreased from 3.08 to 1.52, while when λ increased from 1.5 to 2.5, the maximum equivalent strain increased from 1.71 to 2.35. When t₀ increased, there was no specific change rule for equivalent strain and the maximum equivalent strain. This showed that processing parameters had different effects on the equivalent strain.(iii)The experimental results showed that the grains of the pure copper chip strips were greatly refined, and most of them reached ultrafine grain scale. The pure copper chip strips obtained when α was 20° and 30° can be seen to have obvious fibrous structure. However, most of the pure copper chip strips obtained at α = 15° had been broken into fine grains, and the proportion of fibrous structure had greatly been reduced. The grain size of the chip strips increased with the increase of α. The texture direction of the pure copper chip strips obtained at λ = 1.5 and 2.0 was very obvious, and the proportion of fibrous structure was relatively large. However, when λ was 2.5, the pure copper chip strip structure had no obvious texture direction, and the grain was already very small. As λ increased, the grain size of the chip strips became smaller.(iv)The ANOVA results showed that the chip thickness compression ratio had the greatest effect on the surface hardness value of the chip strips, followed by the uncut chip thickness, and the rake angle had the smallest influence. According to the value, the chip thickness compression ratio had a significant effect on the surface hardness value of the chip strips, while the uncut chip thickness and rake angle were absent. Therefore, other factors may be considered next for further study.

Data Availability

The hardness and EBSD data used to support the findings of this study are included within the article.

Conflicts of Interest

The authors declare that they have no conflicts of interest.

Acknowledgments

This research was conducted under the support of the National Nature Science Foundation of China (51375174), the Fundamental Research Funds for Central Universities (2017ZD024), and the Natural Science Foundation of Guangdong Province (S2013050014163 and 2017A030313260).

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