NEW SINGLE-CAPACITOR SIMULATIONS OF FLOATING INDUCTORS

Out of various methods of floating inductance simulation known so far GIC-based methods of floating inductance simulation appear to be more suitable from the point of view of microelectronic application. However, a drawback of such configurations is their noncanonic nature due to the requirement of two GICs and hence two capacitors for simulating a first order impedance. This paper reports new type of FI circuits which require only one GIC and thus employ only one capacitor together with a reduced number of resistors, while retaining the merits of the usual GIC-approach.


INTRODUCTION
2][3][4] Out of various operational amplifier-RC methods of floating inductance (FI) simulation known now5-9'11-19'24'2s'27-40, those which employ two generalised-impedance-converter (GIC) type networks s-a have the following advantageous features from the point of view of microelectronic application: (i) feasibility of employing low-valued capacitors compatible with microelectronic manufacturing techniques (ii) requirement of only one component-matching condition for desired realisation and ease of adjustment for floatation by trimming a single resistance.(Note that since it is impossible to simulate a lossless FI with OA-RC networks without requiting any kind of component-matching, 2 it follows that the best configura.tions from this viewpoint would be those which require no more than one matching-constraint).4 (iii) inductance control through a single resistance and (iv) low sensitivities to component tolerances.
The main drawback of these circuits is that two capacitors are needed to simulate a first order impedance.
Clearly, for microelectronic application 9 those FI circuits would be more suitable which, while retaining all the merits quoted above, use only a single capacitor.The purpose of this paper is to present some new FI configurations having these features.
A CIRCUIT CONFIGURATION FOR LOSSLESS FI SIMULATION Consider the configuration of Figure 1.In analysing the circuit it is assumed that the operational amplifiers (OAs) A2-A4 have ideally infinite input impedance, infinite gain and zero output impedance while the DVCCS 1 A1 has infinite input impedance and trans- conductance equal to G. Deleting the DVCCS A1 and OA A2, the rest of the circuit between terminals and P can be identified as a cascade of a GIC and resistor R4.The transmission matrix of the GIC is given by A1 A3

FIGURE
A circuit configuration for simulating a lossless floating inductance using a single GIC; Hence, the Y-matrix of the cascade of this GIC and R4 is given by when connecting A2 used as a unit gain amplifier (UGA), the resulting circuit would have the Y-matrix [Y2] sCR RaP 0 0 (3) If the DVCCS is connected as shown, it will convert the voltage across its terminals (which is equal to iR) into current GiR and this current will become the port-2 current i2 of the overall 2-port network.The Y-matrix of the circuit shown in Fig. is given by sCRRaR4 The circuit, therefore, simulates a FI with CRRaR, R2 provided GR (6)  In practice, the above conditions may be achieved by adjusting the resistor Rt, such that the voltages at port and 2 are indistinguishable. 11he following may now be noted: (a) Like earlier GIC-based circuits, s-8 in this case also (i) low-valued-capacitor may be employed due to inherent capacitance-multiplication by the factor (R4/R2).
(ii) the circuit may be easily adjusted for floatation by trimming a single resistance R1.
(iv) all sensitivity coefficients Si of the realised FI with respect to Ct, R1, Rz, R3, R and G are within the range o < II Si II < (This may be verified through (4), employing the method of).
(b) In contrast to earlier GIC-based circuits, s-8 the present proposal (i) uses only one capacitor (ii) requires a smaller number of resistors.
COMPARISON WITH EXISTING SINGLE-CAPACITOR FI-SIMULATORS It is useful to compare the lossless FI configuration of It should be pointed out that:- (i) whereas the circuits of 12-9 suffer from the drawback of requiring critical component-matching and consequently have pronounced sensitivity to component tolerances, the proposed circuit requires only one component- matching condition (which is adjustable through a single resistance) and has very low sensitivity.
(ii) the proposed configuration uses a smaller number of resistors (only four) than the circuits of 12-t9 (which require seven to fifteen resistors).

SOME OTHER FI CIRCUITS
Many additional single-capacitance FI configurations can be derived as follows: (i) Some interesting FI configurations, based upon nonideal GICs derived from the circuits of, 1-2 are shown in Fig. 2. Note that these circuits have the novel feature of employing a minimum possible number of passive components (i.e. one capacitor and two resistors) although they simulate lossy FIs with floating immittances given by Z(s) Rs + sL or Y(s) 1/Rp + 1/sL.
(ii) Entirely OA-based versions of the circuits of Fig. and 2 may be obtained by replacing the DVCCS with one OA and five resistors, but these would use more numbers of resistors and would require additional realisation constraints to be fulfilled.Rt + R2, L CRR2 (c) Rp R, L CRR2.In all cases the condition of simulation is GR1 (ii0 Many other variants of the proposed circuits and those outlined in (ii) may be obtained by replacing the OAs by nullator-norator pairs and then recomponsing the circuits by alternative grouping of nullators and nurators to form ideal OAs.

REALISATION OF FLOATING FDNR AND FDNC ELEMENTS
A variety of floating FDNR and FDNC type immitances 26 may be realised by alternative choice (resistive/capacitive) of passive components in the circuits of Fig. and 2 (and those outlined above).However, a particularly promising configuration for this purpose is that of Fig. 1.The circuit would simulate a floating FDNR Z(s)= 1/Ds if resistors Ra and R4 are replaced by capacitors Ca and C4 and the capacitor is replaced by a resistor R; Z(s) R/s2C3C4R2R.Similarly, a floating FDNC Z(s) Ms 2 would be realisable by replacing R2 by a capacitor C2 while keeping all other components as they are; thus giving Z(s) szCCzR1RaR4.
Note that in contrast to previously known GIC-based floating FDNR/FDNC realiza- tions 8 which would employ four OAs five resistors and four capacitors, the suggested circuits (a) employ only two capacitors and hence are canonic (b) use only three resistors.
In both cases, simulated elements are single-resistance-tunable.

CONCLUSIONS
A circuit configuration is presented for lossless FI simulation and it retains the character.istic features of the earlier two-GIC-based approaches to FI simulation but by contrast, requires a single GIC and hence (i) employs only a single capacitor, thus, requiring 50% less total-capacitance compared to earlier circuits s-a for the same value of inductance (ii) requires a smaller number of resistors.Also, a few circuits employing non-ideal GICs are presented which simulate lossy FIs and have the novel feature of requiring a minimum possible number of passive elements.The characteristic advantages of the proposed circuits are retained when they are used to realise FDNR or FDNC type floating immit- tances through alternative choice of circuit impedances.
Fig. with the single-capacitor lossless FIs employing two 19 and three1-80As.

FIGURE 2
FIGURE 2 Some configurations for simulating lossy floating inductors (a) R