ELECTRICAL MODELLING OF MULTILEVEL ON-CHIP INTERCONNECTIONS FOR HIGH-SPEED INTEGRATED CIRCUITS

A method for the electrical parameters analysis and modelling of lossy-coupled multilayer on-chip interconnection lines at high bit rates is presented in detail. It can be used by the VLSI designer to analyze on-chip interconnections with linear, as well as nonlinear/time varying terminators and to simulate the pulse propagation characteristics in high-speed integrated circuits. First the capacitance, inductance, conductance and resistance matrices per unit length for the given multiconductor geometry is computed. A multiple coupled line model consisting of uncoupled lossy transmission lines and linear dependent current and voltage sources if finally calculated according to the capacitance, inductance, conductance and resistance matrix values computed.


I. INTRODUCTION
As the speed of the logic devices increases, the performance limits of the electrical interconnections become an important matter of concern.Maximizing the density of the on-chip interconnect lines can lead to undesirable coupling between adjacent signal paths.Modelling the relationship between the geometry and material prop- erties of the interconnect medium and their electrical characteristics is important so that tradeoffs can be made between technology selection, cost and performance.Most high-performance digital circuits are simulated before construction.The core of these simulation tools is the electrical model which translates the physical struc- tures into their equivalent electrical properties.The use of simulation is essential for high-speed VLSI circuits where isolation and interconnect regions exhibit com- plicated three-dimensional topographies due to the complexity of small geometry structures, because it helps to minimize the development time and cost.
Although considerable amount of work has been done in recent years on the computation on the propagation characteristics of multiple coupled strip lines, a small number [1][2][3][4][5][6][7][8][9][10][11][12] of researchers have dealt with some aspects of the problem of calculation of the self and mutual line constants of on-chip interconnections, and a very limited number 3-16 has tackled the problem of 3-D multilevel metallization structures.

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The purpose of this work is the detailed presentation of a self contained method developed 17 for the electrical modelling of lossy-coupled multilayer on-chip inter- connection lines at high bit rates, which can be used by the VLSI designer in conjunction with existing electrical simulation packages.The method presented here takes as input a given geometry of a lossy coupled 3-D interconnection system and produces as a final result a model consisting of lumped elements which can be included in any SPICE-like analog simulation package.The formulation of lossy coupled multiconductor interconnection lines, which at high bit rates (---GBit/sec) must be considered as transmission lines, is obtained using a free-space Green's function in conjunction with total charge on the conductor-to-dielectric interfaces and polarization charge on the dielectric interfaces.The solution is derived by applying the method of moments 18 and it includes the effects of signal attenuation and signal dispersion encountered in fast transient waveform propagation.

II. MULTILEVEL PARALLEL LINES
For a set of coupled lines, the induced signal on the inactivated lines depends on the coupling coefficients and the slew rate of the propagation signal.In IC tech- nology, the separation between the lines is about a few micrometers and the distance between the conductors and the ground plane is about several hundred microm- eters; therefore, the coupling coefficients are very important.
Let us consider firstly an arbitrary number Nc of parallel metallization paths which are embedded in an arbitrary number Nd of dielectric layers, as shown in Fig. 1.The length of the paths is considered to be large in comparison to their cross-section of dimensions, and the orthogonal cross section is uniform in the z direction.That reduces the problem to a two-dimensional one.The permittivity of the j-th dielectric layer is ei.The uppermost dielectric extends to y .Thelower ground plane extents from x to x .
An interconnect system tends to require complex modelling because the con- ductor material is not lossless and the lines can be coupled both capacitively and inductively.The finite conductivity of the conductor results in a variation of the "tan

FIGURE
Multiconductors in multilayer interconnection system current density distribution in the conductor.Skin effect loss (conductor loss) and dielectric loss as well as different signal phase velocities at high frequency make the interconnect resistance and capacitance frequency dependent.A single interconnection line and its equivalent circuit model per unit length of the structure for frequency-dependence analysis are shown in Fig. 2 (a) and (b) respectively.In Fig. 2 (b), R represents the interconnection line series resistance, L is the interconnect line inductance resulting from the propagating electromagnetic field, G is the substrate shunt conductance, and C is the substrate capacitance.
Voltages and currents for such a system are described by the following set of differential equations Here vectors u] [Ul, u2, Un]T and i] [i, i2, in] T represent voltages and currents on the lines.The superscript T represents the transpose.
and [C] are the series resistance, series inductance, shunt conductance, and shunt capacitance matrices, respectively, whose elements represent the equivalent self- and mutual parameters per unit length of the interconnections.After the calculation of [C], [L], [G], and [R], as it is explained in the following, the system of the former differential equations is solved obtaining the values of depended voltage and current sources as well as the delay and the characteristic admittance of the uncoupled transmission lines for the equivalent 2n-multiport model.It is worth noting that quasi-TEM mode propagation has been assumed through- out the analysis.Since a static analysis would be valid for low frequencies only, a number of frequency dependent effects that occur at high frequencies have been included, like frequency dependencies of both the effective dielectric constant and the losses, as well as the frequency dispersion of the resistance of the metal con- ductors (skin effect).With the common used substrate resistivities in the IC tech- nology, and in the frequency range used (<100 GHz) we avoid the "slow-wave" and the "skin effect" modes as described by Hasegawa2.This approach ensures that the analysis is valid up to the frequency where non-TEM modes can propagate in the interconnection lines, i.e. the cutoff frequency for the surface wave mode.
It has been shown that for a 450/zm thick Si substrate wafer with 1012cm resistivity, the cutoff frequency is 50 GHz2.
H.1.Calculation of the Capacitance Matrix Several simple configurations have been analyzed by analytic techniques such as conformal mapping, but there are theoretical difficulties associated with.thebound- ary conditions imposed upon the electric fields at the dielectric interfaces.Several numerical techniques such as the finite-difference method, finite-element method, variational method, spectral-domain techniques, and the method of moments may be used to solve the two-dimensional (i.e., structure long in one dimension) Laplace equation to extract the capacitance parameters of a given packaging geometries.
Here, the elements of the capacitance matrix are calculated by relating the free charge per unit length of surface on the conductors to the potentials of the con- ductors.The ij-th element of the capacitance matrix is the free charge per unit length of surface on the i-th conductor when the potential of the j-th conductor is one volt and the other conductors are grounded.
At any point r on the i-th conductor-to-dielectric interface, the potential i due to the combination of a and the image of a above the lower ground plane is assumed to be constant (first boundary condition), and it is given by the following equation which is derived from the appropriate Green's function applying the method of images : 2ne aT(r') In Ir r'l j=l where S is the boundary of the j-th interface in the xy plane, dS' is the differential element of length at r' on S i, ' is the image of r' about the lower ground plane, and N is the total number of interfaces (Nc + N 1).
The second boundary condition refers to the y component of the displacement vector D(r) which is assumed to be continuous across each i-th dielectric-to-di- electric interface, thus Uy (/i+l-Nc) OOF) r on S where/i-Nc is the permittivity on the upper side of Si, and -OO(r)/Oy+ is the normal component of the electric field on the upper side of Si.
The electric field E(r) when r approaches the interface S is given by the following equation 20(i-Nc /i 1-Nc) aT(r)+ 2e0 aT(r') [r ;12 -[r ill2 Uy dS' 0, + j=l r on S i= Nc + 1,...,N (5) Equations ( 3) and ( 5) constitute a set of N integral equations for the unknown total charge tr per unit area on the interfaces whose contours are Si.Since (3) and ( 5) are linear, and assuming that the potential (I) is unity and all other potentials are zero, we obtain Nc O'T Z O'()(/)i ( 6) i=l Consequently, the charge Qi per unit length on the i-th conductor is given by Nc Qi--fs 'F(t')dSi-Z Cij(/)i i= 1, 2,..., N (7)   where try is the free charge density on the surface of each conductor and it is given by av(r) e(r) aT(r) The capacitance coefficients C between conductors and are Cij / aCTJ)(r) dSi (9)   If an upper ground plane exists, it is considered as an ordinary conductor j; so that the reduced capacitance matrix [C] is simply found by deleting the j-th row and column.
For the calculation of the Cii the integral equations ( 3) and ( 5) can be solved numerically for av by the method of moments.A solution for ax is sought of the form aT(r) rTnPn(r) (10)   n=l where Pn(r) are unit pulse functions which cover S i.The dielectric layers are now truncated at a finite negative value of x and a finite positive value of x so that only pulse functions of finite domain are needed.At any differential element m, we assume that Pm--1 Pn 0, n 1,2,... ,m-1, m + 1,... ,J It follows from (10) and (11 Let rm be a point on the differential element rn of the domain of Pm(r) for rn 1, 2, J. Substituting (10) for av in (3) at r rm, for rn 1, 2,... N, we obtain n=l where is such that rm is on S, and 1 fA fA lnlrm -rldSndSm rn 1,2,...,N1 Mmn 2ne0 s. S ]rm rl n 1, 2,... N where AS is the domain of Pn(r).(For the evaluation of both this double integral and the one associated with equation 16, see Appendix A.) Substituting (10) for av in (5) and then enforcing (5) at r rm for m N + 1, N + 2,...,J, weobtain E MmnO'Tn 0, rn N1 + 1,..., J (15) n=l where, Mmn is given by Mmn-" ei-Nc + F'i+l-Nc fimn 2neo s.Sm 2e0(e,i-Nc i+l-Nc) In ( 16), is such that rm is on ASm, and r'n on ASh.After Mmn has been calculated for m 1, 2, J and n 1, 2, J, (13) and ( 15) combine to form J simultaneous equations in the J unknowns O'Tn.
The solution is of the form Nc O'Tn E O'Tn(i)i ( 18) i=l where 'Tn"(0 is the solution which would result if (I) were unity and all other 's were zero.

H.2. Calculation of the Inductance Matrix
The ij-th element of the inductance matrix [L] represents the magnetic flux passing between a unit length of the i-th conductor and the lower ground plane when one ampere of net z-directed electric current flows on the j-th conductor and there is no net z-directed electric current on any of the other conductors.It is known that 1 where Co is the capacitance matrix which would result if all dielectric layers were replaced by free space,/z0 and e0 are the permeability and the permittivity of free space, respectively.
H.3. Calculation of the Conductance Matrix The complex permittivity of the i-th loading layer given by e e( jei' e[ (1 tan 8i) where, e( and -e'i' are the real and imaginary parts of e, and tan t ei'/e is the loss tangent, the so-called dissipation factor, which it represents the losses of the dielectric medium, consequently The conductance which is the real part of (20), is calculated as H.4. Calculation of the Resistance Matrix The resistance matrix is calculated by applying the perturbation theory 23 to the loss-free line system which is described by the following eigenvalue equations where the superscripts denote unperturbed, and Up is the phase velocity.It is important to note that the phase velocities Vp are generally different for each transmission mode, since the transmission line has several different dielectrics.
The time-average power transmitted along the line, is Pv Re((IV)*V) and thus, the unperturbed power flow is P IVV.
The power loss per unit length, Pc, of the transmission line can be calculated by the following formula Pc RSfs JdS (24)   where Rs is the surface resistance of the metal, Ji is the current density on the i-th conductor, and the integral is taken over all metal surfaces Si.Equation (24)   is evaluated by using the moment solution.Once Pc is evaluated for a given mode, attenuation due to conductor losses is given by Pc ac 2P (25)   The resistive matrix per unit length [R] can now be evaluated, if G < < coC then In the TEM approximation and at high enough frequencies the behavior is "low- loss" (Hasegawa2), thus, we can take V V to be real, setting fl fl0 and using (22), equation (26) reduces to 2acV [RII (27) from which [R] can be calculated since a, V , and I are known for each mode.
H. 5 Edge Effects The approximation of x by a constant charge density, is particularly poor near the sharp convex corners of the conductors due to the steep slope of the charge density surface caused by the singularity.Elements decreasing in size towards the corners have been used before to obtain more accurate capacitance values (i.e.8).
A typical residual voltage for dielectric substrate of e 1.0 and microstrip width-to-height ratio w/h 1 can be found in7.They have shown that moving further away from the discontinuity, a small amount of negative potential residual appears which eventually reduces down to zero.This is due to the iteration between the two normal microstrip-like distributions and is most noticeable for small er and w/h.They have also shown using numerical experimentals the most significant part of the excess charge is located near the outer edge of the corner region.
In order to take into account these effects, the conductor surfaces are divided into elementary subsections of varying width which must be relatively small in outer corner and the edges.Using the formula by8, we chose the following criterion for the size of AS of each subsection w/2 (28) where coefficient a is determined by fixing the width of the smallest partition Ax at the outer surface corner.The other partition widths are calculated by the re- fl is a coefficient that allows us to have the desired accuracy.For example, with fl 1, the error is less than 1 percent even if the medium is not homogeneous.

III. THE EQUIVALENT MULTIPORT MODEL
Having calculated the self and mutual line constants and taking into account that the uniform system under consideration is linear and time invariant, equations ( 1) and ( 2) can be considered in the frequency domain and consequently V] and I] may be defined as the corresponding voltage and current vectors.For e j't'z vari- ation, and taking the second derivatives of ( 1) and ( 2 , are the series impedance and the shunt admittance per unit length respectively.Equation ( 2) represented the conservation of charge, and links the longitudinal variation of the line current dI between the ends of the section dz with the time derivative of the line voltage.
Equation ( 1) was a statement of Faraday's law of induction, and relates the lon- gitudinal of the line voltage change dV over the length of the section dz, to the time derivative of the line current.
To obtain the modes of the transmission line, we seek solutions of equations ( 33) and (34) of the form I e j't-yz (35) V---/e j't-yz (36 where ,is the propagation factor and it is equal to [ZsYsn] 1/2.Substituting equations ( 35) and ( 36)into ( 1) and ( 2 Let [Mo] be the complex eigenvector matrix associated with the characteristic matrix [Zs][YsH].The voltage and current eigenvectors e] and j], respectively, are the solutions of the decoupled set of equations 24 de] dz diag[Yk/Yk]j] (41 dz where 7k is the propagation constant for the k-th mode and is the square root of the k-th eigenvalue of the [Zs][YsH] matrix and Yk is the characteristic admittance of the k-th mode and is the corresponding element of the diagonal matrix [Yk]   which is given by :5 The previous equations lead to the 2n port circuit model representing n lossy parallel lines as shown in Fig. 3.The important figure of the presented method is the conversion of the coupled transmission lines into a model that consists of lossy uncoupled lines and a modal decoupling network at the input and a complementary coupling network at the output end.Thus the time domain transient behavior of the coupled transmission lines can be analyzed by applying the fundamental Kir- choff' laws.

IV. MULTILEVEL CROSSED LINES
The crossing of two interconnection lines located at the interfaces of (or) embedded in different dielectric layers may be characterized by an equivalent H-type capacitive and N is the total number of interfaces (Nc + Na 1), with the unknowns, now, representing the surface charge in two dimensions; and (i-Nc + /3i+ 1-Nc) 230(:i-Nc i+ 1-Nc) + 2e0 rT(r') Ir-i;I j=l r-r' 1 [r i Uy dS' 0, r on Si i=Nc+ 1,...,N (46) Consequently, using the moment method to solve this system of integral equa- tions a new Mmn matrix is obtained with elements computed from lff [ 1 1 ]dSn m=l'2'''''N1 (47) Mmn-4eo so ]rm PI [ The double integrals given in (47) and (48) are discussed in detail in Appen- dix B.

V. RIGHT-ANGLE BENDS
An interconnection line bend is the most common discontinuity in integrated cir- cuits.A static lumped capacitance representation for this discontinuity is commonly used in the microwave theory.The problem of the calculation of the lumped capacitance of a right-angle bend of an interconnection line in multilayered di- electric media, can be solved using the section IV theory.
It is proposed that for the three-dimensional solutions only one cell along the sharp corners be decreased in width, since the total number of cells per conductor must necessarily be few.Further, for closely spaced conductors, the coupling ca- pacitance depends on the center cell charge as well as the corner distribution, and thus the center of the conductor surfaces cannot be depleted of cells.

VI. EXAMPLES EXAMPLE I: A Single Interconnection Line
To illustrate the numerical analysis developed here, a single interconnection line mounted above a ground plane has been considered, as shown in Fig. 4. Computing the characteristic impedance and the transmission velocity for the frequency of 10 GHz and for various widths (from 4 to 14 pm) gives the curves shown in Figs. 5   and 6. Figure 5 shows the variation of the characteristic impedance of the line in respect to the width of the conductor for three substrate thickness (i.e. 200pm, 300 pm and 400/tm).Figure 6 shows the variation of the transmission velocity into the line with respect to the width of the conductor for three substrate thickness (i.e. 200/zm, 300 pm and 400 pm).The conductor is mounted above a ground plane and three dielectric layers are considered (Silicon, Silicon Oxide and Polyi- mide of thickness 400 pm, 1.2 pm and 0.6 pm respectively).The conductor material is taken to be aluminum with a sheet resistance Rs 0.01062 Ohm/sq.at 1GHz.EXAMPLE H" Dual Interconnection Line System A dual interconnection line system is considered, as shown in Fig. 7.There are three dielectric layers consisting from Silicon, Silicon Oxide and Polyimide with 2.5i ,/,., , , : i : . . .I , , .relative dielectric constants 12.0, 3.9 and 3.6 respectively.The material of the conductors is aluminium with a sheet resistance Rs 0.01062 Ohm/sq.at 1GHz.
The thickness of Silicon, Silicon Oxide and Polyimide are 400/m, 0.6/zm and 1.2 /zm respectively.The width of each conductor is 8/zm, their thickness is 2/zm and the distance between them is 15/zm.Fig. 8 shows the response and the coupling at the end of this system, when we consider a pulse with rise and fall time values lOOps, the width of pulse being 300ps and period lns (a basic frequency of 1GHz).
EXAMPLE 111: Crossing Lines Consider two crossed interconnection lines as shown in Fig. 9.The cross section of the conductors is orthogonal with dimensions 10/zm 10/m.The thickness of the adjacent dielectric layer is 400/zm with a relative dielectric constant of 12.0, while the middle dielectric layer has a relative dielectric constant of 4.0 and a height of 2/m.Calculation of the equivalent lumped capacitance value gives the results shown in Table 1.In Fig. 10, the voltage at the end of the upper conductor and the voltage which is coupled at the second one, is given.

EXAMPLE IV: Right-Angle Bend
Consider a right-angle bend as shown in Fig. 11.The cross section of the conductor is orthogonal with height 2/zm and a width, W, which varies between 1.2/m and 4.0/zm.The thickness of the lower dielectric layer, H3, is varying between 200/m and 600/m and has a relative dielectric constant of 12.0.The other two dielectric layers have relative dielectric constants 3.9 and 3.6 respectively, and heights 0.6 /m and 1.2/m respectively.Calculation of the lumped capacitance values gives the results shown in Table 2.

VII. CONCLUSIONS
A self contained electrical parameters analysis and electrical modelling method for 2-D and 3-D lossy coupled multilayered on-chip interconnection system has been developed.The solution is derived by applying the method of moments and includes the effects of signal attenuation and signal dispersion encountered in fast transient waveform propagation.The important feature of the presented method is the conversion of the coupled transmission lines into a model that consists of lossy uncoupled lines and a modal decoupling network at the input and a complementary coupling network at the output end, which may be included as a subcircuit in a SPICE like analog simulator.Two examples of parallel interconnection lines have been given in order to show the application of the method in studying the pulse propagation characteristics.Two more examples are presented, one for the case of crossing lines in different layers (in order to study the coupling of these), and one for the capacitance computation of a right-angle bend.

APPENDIX B
The integrals given by ( 47) and (48) may be expressed in the following form26: where DX and DY are the dimension of the subarea As n.
Lettering Xm-x' X and Ym-Y' Y one obtains: The previous equation may be integrated in a closed form and the result may be expressed in the following form: Ik gl IXl + Kill-g21n [Xl + X12 1 I gl + Nil] X2 + X21

FIGURE 2
FIGURE 2 Single interconnection line (a) Topology (b) Electrical Equivalent Model per unit length

FIGURE 4
FIGURE 4 Single line example topology

FIGURE 7 LFIGURE 8
FIGURE 7 Dual interconnection line system

FIGURE 9
FIGURE 9 Crossing lines

FIGURE 10
FIGURE 10 Time response of crossing interconnection line example

TABLE
Lumped capacitance values for example III.

TABLE 2
Lumped capacitance values for example IV.