A SIMPLIFIED SPICE MODEL FOR IGBT

A simplified IGBT (Insulated Gate Bipolar Transistor) SPICE macromodel, based on its equivalent circuit, is proposed. This macromodel is provided to simulate various mechanisms governing the behavior of the IGBT, and it takes into account specific phenomena limiting its SOA (Safe Operating Area), such as forward and reverse biased SOA, as well as latch-up. The validity of this model is confirmed by comparison between simulation and experimental results as well as the data sheets. This comparison is tested for two IGBT devices showing two different powers and switching speeds, and a good agreement is recorded for both IGBT devices.


I. INTRODUCTION
The Insulated Gate Bipolar Transistor (IGBT) was added to the family of power devices to overcome the high on-state loss of power MOSFETs.The IGBT is an hybrid device that combines the advantages of a MOSFET (high switching speed and low power drive requirement) and of a bipolar junction transistor (BJT) (low conduction losses) [1].
The combined top perspective and cross-sectional views, not to scale, of one from the thousands of cells the IGBT comprises are shown in Figure 1.Its structure is similar to that of a Vertical Double diffused MOSFET (VDMOSFET) with the exception that a p-type, *Corresponding author.Fax: (+ 33/0) 3 87 75 96 01.

Silicon gate
Insulating oxide N+ Anode FIGURE.Top view and cross section, not to scale, of one from the thousand cells of an n-channel IGBT.heavily doped substrate, replaces the n-type drain contact of the conventional VDMOSFET.
Analytical models exist already [2].Their implementation sets many problems due to the complexity of the equations used for calculating the current and charges of the IGBT.Some authors [3] proposed simplified equations, but the simulation results show inaccurate results near limit or non standard operating conditions.Another solution is to translate the physical equations into electrical circuits with original solutions to replace the derivative functions and other operators [4][5][6][7], but this solution requires a specific SPICE version like IG-SPICE (Interactive Graphics SPICE).
In this work we present another approach which consists in defining the IGBT as a simple macromodel based on its equivalent circuit.The validity of this model is confirmed by comparison between simulation and experimental results as well as the manufacturer's data.Two IGBT devices from International Rectifier, IRGBC20S and IRGBC40F, showing different powers and switching speeds, are modelled and tested.

II. CIRCUIT MODEL
The complete macromodel of IGBT that we suggest is given in Figure 2. The core of this macromodel is the IGBT equivalent circuit marked with bold typeface, i.e., a p-n-p bipolar transistor driven by a n- channel MOSFET in a pseudo-Darlington configuration [8].This core has been completed with some components to help simulate various mechanisms governing the behavior of the IGBT, such as forward and reverse biased SOA, latch-up, switching parameters, etc.

II.1. DC Model of IGBT
The transfer characteristics of an IGBT and a power MOSFET are similar apart from a shift due to the built-in potential of the base- emitter junction of the p-n-p bipolar transistor.Indeed, the IGBT current is equal to the MOSFET one multiplied by the current gain of the p-n-p bipolar transistor.Therefore, several static parameters of the IGBT depend on the SPICE parameters of the MOSFET.
In our study, the SPICE models used for the BJT and the MOSFET are the Gummel Poon and the Shishman Hodges models respectively.The SPICE parameters which provide for adjustment of saturation current, conductivity, and static saturation voltage of the IGBT are: Kp (Transconductance coefficient), W and L (channel width and length respectively), GAMMA (bulk threshold parameter), PHI (surface potential), and LAMBDA (channel-length modulation) for the MOSFET element, and the current gain for the BJT.II.2.Dynamic Model of IGBT After calibration of the static parameters, one can proceed with the dynamic model.Two branches, with components names indicated GD and DG in the sub-circuit, between the gate and drain of the MOSFET, are used to simulate the dynamic parameters [9].Typical dynamic parameters, used to characterize the IGBT, are the switching characteristics times: rise time (tr), fall time (tf), turn-on delay time (tdon), turn-off delay time (tdoer), turn-on time (ton), and turn-off time (tor), with: ton tr +tdon and torf tf-+tdoff.

Fall Time Calibration
The biggest limitation to the turn-off speed of an IGBT is the lifetime of the minority carriers in the nepi.layer, i.e., the base of the p-n-p bipolar transistor.The charges stored in the base produce a characteristic "tail" in the current waveform of an IGBT at turn-off.When the MOSFET's channel turns off, electron current decreases and the IGBT current drops rapidly to the level of the hole recombi- nation current at the inception of the tail.Since the base current of the p-n-p bipolar transistor corresponds to the MOSFET drain current, the current gain of the p-n-p transistor is then, given by [1]: /3(Q1) IMOS This current gain, BF parameter in SPICE, allows to adjust the abrupt fall amplitude and implicitly the fall time value, this can be also adjusted directly by the ideal forward transit time of the parasitic n-pn transistor (parameter TF in SPICE).

Turn-off Delay Time Calibration
Because of the particular structure of the IGBT where the gate metalization covers a big part of the MOSFET's drain (n-layer), the gate-drain capacitance CD is the main cause of the turn-off delay time [10].In addition, CD is the capacitance of a MOS structure, its value is function of the gate voltage.This capacitance is the equivalent capacitance of the oxide capacitance Cox and of the depletion drain capacitance Ci)d.The equivalent sub-circuit used here is a fixed capacitance Comax representing Cox and a diode Dt) used because the diode transit capacitance has the same behavior as Ctd.Two MOSFET transistors, MD and Mt, controlled respectively by gate- drain voltage EI) and EI) can switch alternatively to CGDmax or Coa.The SPICE parameters of MD and Mt are chosen to be that of an ideal MOSFETs in order not to disturb the sub-circuit working.Therefore, the turn-off delay time, taoer, can be adjusted by the value of Comax and the SPICE parameters of the diode Do.

Turn-on Delay Time Calibration
The turn-on delay time fitting can be obtained by adjusting the SPICE parameters of the MOSFET.These parameters are the capacitances CBo (gate-bulk overlap capacitance per channel length) and Cso (gate-source overlap capacitance per channel width).The turn-on delay time t,on increases as these capacitance values increase.

Rise Time Calibration
Parameters of the sub-circuit allowing to adjust the rise time are, mainly, Kp (transconductance coefficient) and IS (bulk p-n saturation current).Since Kp is used to regulate the static characteristics, we use especially IS to regulate tr.11.3.Parameters Limiting the SOA Safe Operating Area (SOA) is very important in power electronics.Its determination allows one to know the limits of the normal device operating condition.In the IGBT case, the most interesting parameters, limiting the SOA, are the forward and reverse biased SOA voltages and latch-up current.
Forward Biased SOA The breakdown voltage is not forecasted by the bipolar transistor model included in standard SPICE library.This is why an appropriate breakdown voltage value is chosen for the DDS diode to model this behavior.This additional diode is connected between the MOSFET's drain and source.When the anode bias voltage is positive (i.e., VAK 0) and the MOSFET's n-channel turns off (when Vorc _< 0), the p-n-p bipolar transistor is not conducting.The anode voltage is, therefore, given as: VAK VEB (Q 1) -{-VDDs, where VEB (Q 1) 0.7 V.
By using the SPICE parameter BV (reverse Breakdown Voltage of the diode DDS), the equation can be rewritten as: BV VBV 0.7 (V).VBV is the forward biased SOA voltage value of the IGBT.So this value is fixed by adjusting the BV parameter.

Reverse Biased SOA
This phenomenon is represented by the DEC and DDS diodes conduction states for some negative values of anode bias voltage VAK, VAK VEB + VBC--VEC.In operating conditions such as: VEB 0.7 V and VBC <_ 0.7 V, the negative current is the current flowing from the cathode through both diodes and the supply voltage VEC to the anode of the IGBT when: VAI <-1.4--VEc(V).The reverse biased SOA voltage of the IGBT is, therefore, adjusted by the supply voltage VEC value.This value will be determinated as function of the IGBT's reverse biased SOA voltage measured or given in the data sheets.

Static Latch-up Modelling
When an IGBT goes into latch-up, the parasitic n-p-n transistor of the device starts to conduct.This behavior can be modelled by introducing a n-p-n bipolar transistor between the MOSFET's drain and source, which is controlled by the series resistance Rp of the p-well.Latch-up occurs when the voltage drop over this resistor is large enough to turn on the parasitic n-p-n transistor, i.e., when: Rp x Ic(Q1) > VEB(Q2).
Where VEB is the built-in potential of the n-p-n transistor Base- Emitter junction.
The value of the resistor Rp can be expressed using the IGBT's current IAKlup (measured or given in the data sheets) causing the latch- up and the current gain of the bipolar transistor (Q 1):

IAklup
x /3(Q1) Although this latch-up model is simple, it allows for modelling the static latch-up in circuit simulation.

III. RESULTS
We have adjusted our model to simulate two IGBT devices from International Rectifier (IR): IRGBC20S and IRGBC40F with various powers and switching speeds.The first one is a standard type 600 V-20 A, and the second one is a fast type 600 V-40 A.
The SPICE parameters of the models corresponding to the two IGBT devices are determined so as to fit the data sheet static and dynamic electrical characteristics.
Figures 3 and 4 show the I-V characteristics, simulated (a) and given in the manufacturer's data book (b), for an IRGBC20S and an IRGBC40F samples respectively.A good agreement is recorded for both IGBT devices.
Concerning the switching parameters, only the switching time values are given in the data sheets.These values are compared in Table I with those obtained by our model.
The data sheets correspond generally to typical value or to average values obtained from several samples.To verify the accuracy of our A. HADDI et al. model, we have compared its results with experimental ones performed on a given IGBT sample.The results of this comparison are shown in Figures 5 and 6, for static and dynamic characteristics, respectively.The simulation fits very well the experimental characteristics.The forward biased SOA voltage value measured for an IRGBC20S sample is 815 V, therefore, the BV parameter value is fixed in the SPICE program as 815.7V. Figure 7 shows the I-V characteristics   simulated and measured showing the forward biased SOA of an IGBT.
For the same sample, the IGBT reverse biased SOA voltage value measured is 22 V, with a fixed supply voltage value VEC as 20.6 V.
The anode current versus anode-cathode voltage characteristics simulated and measured are shown in Figure 7.This is to demonstrate the ability of our model to simulate the reverse biased SOA of an IGBT.
Latch-up occurs when the voltage drop over the Rp resistor is larger than the built-in potential of the Base-Emitter junction of the parasitic n-p-n transistor.To illustrate the ability of our circuit model to simulate latch-up phenomena, arbitrarily values IAclup of the anode current have chosen as /AKlup--19 A and 35 A for IRGBC20S and IRGBC40F respectively.The value of the Rp resistor is then adjusted so as to obtain a current latch-up value greater than or equal to IAIlup. Figure 8 shows the simulated I-V characteristics for the two devices and the beginning of the latch-up.The Rp value is not used in Figures 3   and 4 simulations, these IR devices being latch-proof.

IV. CONCLUSION
In this paper, a simplified IGBT SPICE model has been described.This model is built from consideration of static and dynamic operating conditions.Although this model is simple, it is capable to simulate the operation of the IGBT and its different behaviors.This model presents two main advantages: an easier adaptation to any IGBT type, such as vertical or lateral, high or low power range.The model fitting is done.by adjustment

FIGURE 2
FIGURE 2 Macromodel, based on the equivalent circuit of the IGBT, used for modelization.

FIGURE 3 I
FIGURE 3 I-V characteristics obtained by simulation (a) and given in the data sheets (b) for an IRGBC20S.
FIGURE 4 I-V characteristics obtained by simulation (a) and given in the data sheets (b) for an IRGBC40F.

FIGURE 6
FIGURE 6 Simulated (a) and experimental (b) anode current and anode voltage waveforms for turn-off of the IRGBC20S.

TABLE
Comparison of the switching times simulated and given in the data sheets for FIGURE 7 I-V characteristics simulated and measured showing the forward and reverse biased SOA of the IRGBC20S and IRGBC40F.