A New Translinear-Based Dual-Output Square-Rooting Circuit

A new wide input range square-rooting circuit is presented. The proposed circuit consists of a dual translinear loop, an absolute value circuit, and current mirrors. A current-mode technique is used to provide wide input range with simple circuitry. The output signal of the proposed circuit is the current which is proportional to the square root of input current. The proposed square-rooting circuit was confirmed by using PSpice simulator program. The simulation results demonstrate that the proposed circuit provides the excellent temperature stability with wide input current range.


INTRODUCTION
A square-rooting circuit is widely used in analog instrumentation and measurement systems.For example, it is used to linearize a signal from a differential pressure flow meter, or to calculate the root mean square value of an arbitrary waveform [1].Typically, voltage-mode square-rooting circuits can be realized by using operational amplifiers (opamps) and can be attached to passive and active elements such as an analog multiplier to form squarer and resistors [2], the BJTs to form a log and antilog amplifier [3], and MOS transistor operating in triode region [4].However, op-amp-based square-rooting circuit has the high-frequency limitation due to the finite gain bandwidth product (GBW) of the op-amps, and some of them are not suitable for IC implementation.Second-generation current conveyors (CCIIs) are useful in analog signal proposing circuits.Since the gain bandwidth product of an op-amp is finite, the higher the gain it realizes, the less bandwidth it possesses.In the past, the realization of square-rooting circuit using CCIIs has been proposed in the technical literature [5,6].Lui [5] proposed square-rooting circuit based on the use of the CCIIs connected with nonsaturated MOS transistors, opamps, and resistors.The high-frequency limitation of this circuit is due to the finite GBW of the op-amp and the MOS transistor operated in nonsaturation.Moreover, the use of op-amps and floating resistors makes this circuit not ideal for IC fabrication.Differential difference current conveyors (DDCCs-) based square-rooting circuit is proposed by Chiu et al. [6].However, the disadvantage of this circuit is the same as the proposed square-rooting circuits of Lui [5].The square-rooting circuit is realized by using bipolar junction transistors (BJTs), based on the current-mode technique, which have been reported as being a quite attractive feature of wide bandwidth and suitable for implementing in monolithic form [7]; but only positive input current range can be applied into the circuit.The current-mode square-rooting circuit based on MOS transistors operating in class AB has also been reported [8].
This paper, a new BJT wide input range current-mode square-rooting circuit, is introduced.It consists of a dual translinear loop, an absolute value circuit, and current mirrors.The proposed square-rooting circuit is operated in current mode that has the following advantages.
The square-rooting circuits of Filanovsky and Baltes [4], Liu [5], and Chiu et al. [6] are limited for high frequency due to the finite GBW of op-amps and MOS transistor operated in nonsaturation.While the proposed circuit has no restriction, therefore, the proposed square-rooting circuit operates more high-frequency than that of the previous square-rooting circuits.
(i) The proposed square rooting is suitable for bipolar IC technology.
(ii) The proposed square rooting provides wide input current range.(iii) The proposed square rooting provides excellent temperature stability.
(iv) It possesses high output impedance.

CIRCUIT DESCRIPTION
Figure 1 shows the dual translinear loop of the proposed square-rooting circuit; here I 1 , I 2 , I 3 , and I 4 are the currents taken as the collector currents of Q 1 , Q 2 , Q 3 , and Q 4 , respectively.Neglect the based currents and assume that the four transistors are identical.Summing the based-emitter voltages around the closed-loop containing Substituting for the relationship between collector currents I C and base voltages V BE [10] yields from which Let I 1 be the constant current source that provides the bias current for the circuit.When the input signal current I in is applied to the circuit, then the relationship of the currents I 2 , I 4 , and I in , since I 2 is equal to I 4 , can be expressed as It means that the currents I 2 and I 4 are a square root of the input current I in with the current gain equal to I 1 .
In addition, the temperature effect in terms of the thermal voltage is compensated.It can be noted from Figure 1 that only positive input signal current I in can be applied to the circuit.To achieve wide input current range that can apply both negative and positive signal currents, the absolute-value circuit is required.
Figure 2 shows the absolute-value circuit.The transistors Q 1 -Q 4 and I q function as a current-mode full-wave rectifier [11].The current source I q provides the biasing current for the circuit.The current mirrors, Q 5 -Q 6 and Q 7 -Q 8 , are supplied by the current source I B1 , which ensures that the two current mirrors are continuously on, thereby, improving frequency response and linearity overall system.The current source I B2 is used to eliminate the DC current offset of the output current.The output current I o of circuit can be expressed as Figure 3 shows the proposed square-rooting circuit using a dual translinear loop, an absolute-value circuit, and current mirrors.In this circuit, the input is a current, and the output is also the dual currents which are proportional to the square root of the input current.Using (4) and ( 5), the output current can be expressed as From (6), it means that the output current I out is a squareroot of the input current I in , with the current gain equal to I o .It is also shown in ( 6) that the output current is not sensitive to temperature.It is noted that the proposed squarerooting circuits in Figure 3 provide the output current which is proportional to the square root of the input current at high output impedance.Hence, it can be directly connected as the load.The proposed circuit in Figure 3 can easily be modified to be as voltage-in current-out or voltage-in voltage-out circuits by using the converting resistances.If the square-rooting circuit with voltage-in current-out circuit is desired, the new input voltage can be applied to the node Y of absolute-value circuit and disconnect grounded resistor; while its node X is terminated with grounded resistor.If the square-rooting circuit with voltage-in voltage-out circuit is continually desired, the additional grounded resistor is required to connect at nodes Z for operating as current-tovoltage conversion.
In the practical realization, the device mismatch between NPN and PNP bipolar transistors groups of Q 11 -Q 14 function is the major factor that contributes to the errors from the ideal performance.The output current error can be expressed as where β N and β P are the current gains of NPN and PNP bipolar transistors, respectively, and I o is the bias current of the circuit.If β N = 137.5,β P = 110, I o = 50 μA, and I in = 1 mA, then the resulting output current error is equal to 2%.

SIMULATION RESULTS
The square-rooting circuit in Figure 3 is simulated by using the PSpice simulator program.The proposed square-rooting circuit is simulated based on the model parameters of the AT&T ALA400-CBIC-R [12].The supply voltages are chosen as V CC = 2.5 V and V EE = −2.5 V.The current supplies are I q = 8 μA, I B1 = 100 μA, I B2 = 116 μA, and I o = 50 μA.
Figure 4 shows the simulated DC transfer characteristic for the input current I in of the proposed square-rooting circuit in Figure 3.The simulation of transfer curve is compared with the calculated value.This result demonstrates that the proposed square-rooting circuit yields the operating current range from <− 1 mA to >1 mA of the input current.At I in = 1 mA and −1 mA, it also shows that the difference of the output current between simulation value and calculated value is 10.11 μA (4.52%) and 13.88 μA (6.18%), respectively.The amplitude error of the output current signal more than 2% may be resulting from the error of the absolute-value circuit which is neglected.
Figure 5 shows the operation of proposed square-rooting circuit in Figure 3 while applying the 2 mA P-P triangle wave with 100 kHz frequency at the input.The input and output waveforms are shown in Figures 5(a  corresponds proportionally to the square root for the input.
The simulated output waveforms are also compared with the calculated values.The simulated frequency response of the proposed circuits has been done as shown in Figure 7.
It should be noted that the bandwidth is about 30 MHz.This simulation, the power consumption, is approximated to 15 mW.To demonstrate the performance of the proposed squarerooting circuit, Figure 8 shows the simulated output waveform for the cases of the 1 MHz frequency triangle wave input signal and for 2 mA P-P amplitude.From Figure 8, it is shown that the proposed square-rooting circuit provides the good output waveform at 1 MHz. Figure 9  frequency triangle wave with 2 mA P-P amplitude at the input of the circuit.From the simulation result in Figure 9, it is obviously shown that the proposed square-rooting circuit provides the excellent temperature stability; this result can be confirmed as in (6).

CONCLUSIONS
In this paper, a new current-mode square-rooting circuit is presented.The proposed circuit employs a dual translinear loop, an absolute-value circuit, and current mirrors.Simulation results show that the proposed square-rooting circuit provides the wide input current range with excellent temperature stability.Better performance can be expected by using the bipolar transistors and the parameters of complementary high performance processes which were not available to the authors.The proposed square-rooting circuit is suitable for IC fabrication because of the absence of the external resistor.

Figure 8 :
Figure 8: Operation of circuit for the 1 MHz input triangular signal: (a) input waveform; (b) output waveform.

Figure 9 :
Figure 9: Output waveforms at different temperatures at 100 kHz frequency input signal.