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We present a new technique for defining, analysing, and simplifying digital functions, through hand-calculations, easily demonstrable therefore in the classrooms. It can be extended to represent discrete systems beyond the Boolean logic. The method is graphical in nature and provides complete ‘‘implementation-free” description of the logical functions, similar to binary decision diagrams (BDDs) and Karnaugh-maps (K-maps). Transforming a function into the proposed representations (also the inverse) is a very intuitive process, easy enough that a person can hand-calculate these transformations. The algorithmic nature allows for its computing-based implementations. Because the proposed technique effectively transforms a function into a scatter plot, it is possible to represent multiple functions simultaneously. Usability of the method, therefore, is constrained neither by the number of inputs of the function nor by its outputs in theory. This, being a new paradigm, offers a lot of scope for further research. Here, we put forward a few of the strategies invented so far for using the proposed representation for simplifying the logic functions. Finally, we present extensions of the method: one that extends its applicability to multivalued discrete systems beyond Boolean functions and the other that represents the variants in terms of the coordinate system in use.

Combinational logic optimization is one of the first steps when designing any digital circuit. This practice helps chip designer save on number of transistors, chip area, and helps reduce logic delays and power requirements. It is no surprise therefore that many efforts have been made to develop fully functional, interactive programs for the industry even in the 80s, such as MIS [

A Karnaugh-map (K-map) [

A binary decision diagram (BDD) [

Typed decision graphs (TDGs) [

The Quine–McCluskey algorithm [

Keeping classroom education of Boolean functions at the focus, several methodologies [

In the context of the comparison of the methods noted so far, we propose that the following are the desired characteristics of an ideal logic representation methodology:

It is not constrained by the number of inputs or outputs and can in theory handle an infinite number of inputs and outputs. That is to say, multiple output functions can be represented simultaneously.

The optimization process should be intuitive; ideally visual inspection should be enough to establish input-output relationship. Or it should be based on a paradigm that is intuitive enough for a human to simply hand-calculate. Graphical methods like K-maps do offer that advantage.

If it is graphical, an equivalent numerical method should exist, which can effectively be used as a data structure to optimally represent combinational logic through conventional programming.

Translating a Boolean equation into the graphical representation (or vice versa) is a simple process.

Ordering of variables should play no role in the complexity of the representation.

The proposed technique satisfies all of the desired characteristics listed, except the very last one. Ordering of variables contributes to the ease with which a human can optimize a function without using any computing resources.

The logical operators/symbols “

The symbols “

SOP = sum of products.

POS = product of sums.

Every Boolean equation is represented by a scatter plot in two dimensions. In effect, in its simplest version, corresponding to four quadrants, four Boolean expressions can simultaneously be represented and optimized on a single plane. By using different markers, one for each function, multiple logic functions may be represented in a single plane and subsequently reduced.

Every integer coordinate “

Pandit-Plot (for

Throughout the discussion henceforth, we only consider the template in the first quadrant. The templates in four quadrants are symmetric to each other, with

Representation of the combinational function “

To represent a function in SOP form, every constituent product term is separated into two products, one containing exclusively the direct inputs and the other only the negated inputs. The overall product is represented by a point

As an example, let us consider the following sum of products:

For the first product “

Similarly, for the product “

Pandit-Plot for

Points

Similarly, for a POS-based representation, we look for

Every Boolean function can therefore be represented by only two parameters alone in this way, namely, the coordinates of the representative points, irrespective of the number of inputs. This is a huge data compression in itself, where instead of storing the entire truth table, or even all of the combinations for which the output is either T or F (whichever count is less), we can simply represent a function with a few data-points. The system can further be optimized to remove extraneous information as will be explained in Sections

It can easily be observed that there exist points on the plot with integer coordinates that correspond to a Boolean product or a Boolean sum that can never occur in a reduced SOP or a reduced POS expression, respectively.

As an example, point

To translate any logic function to this plot, the first step is to build the necessary template or the canvas with all the input redundancies indicated (Figure

For example, we note the following for a system with

The

The points on the line

All of the upper diagonal elements are redundant points.

Redundant points because of the

Alternatively, the template may be generated using cellular automata rules on a brick-wall-like automata template as devised in Figure

Template generation from 2 different kinds of rules, signifying its relation to the Sierpinski triangle/fractals and the cellular automata.

The logic optimization process is visual, intuitive, and simple—just as for Karnaugh-maps. It may alternatively be easily implemented using a computer program by understanding the strategies in place numerically. The basic idea of optimization is to get rid of excess of information by inspecting the scatter plot and bring the data-points as close to the axes as possible. There exist patterns that need to be utilised to effectively carry out this “reduction.” These patterns need to be formulated into a compilation of “logic laws.” A few examples of a logic law or an optimization strategy follow.

If two of the data-points are vertices of an upright right angled isosceles triangle with its equal sides having length =

Let data-points be

Because none of the three points,

Similarly, it follows that

Therefore, the point

Therefore, in SOP form,

Thus, as per (

As an illustration, if the plot in Figure

Diagonal optimization for SOP.

Per the law proposed, points

We find here that the hypothesis is true, since

If the scatter plot in Figure

In either case, points

Two “valid” points symmetric about the “

Two points symmetric about the “

Because points

Therefore, for SOP,

Similarly, for POS,

For a system with just two inputs, the “

“NAND-only” implementation of the newly defined logical operations “

While there is much scope for further research in this area for effective algorithm development in terms of logic optimization, including the ones targeted to novel topologies such as the ones involving IMPLY

Steps involved in this example algorithm are as follows:

“Generate” the template and plot the function.

“Expand” the expression to include every possible product in SOP form (every possible sum for a POS form).

“Reduce” the expression using logic laws.

“Repeat” the above two steps in iteration until no further reduction is possible, as illustrated in Figure

Process of optimization; the steps in order are illustrated.

“Generate” step illustrated for

“Expand” step illustrated for the product “

‘‘Reduction” using the “

The final optimized expression;

As an example, let

Generate: plot the product terms (Figure

Expand: plot points relevant to each of the current data-points (Figure

Reduce: reduce the expression using logic laws. If a new data-point, replacing one or some of the original data-points, is obtained through this process and if this data point cannot be further reduced, then it is noted and kept for the next iteration. (We note an example of such data-point with a label “NEW” in Figure

Repeat: repeat steps

Similar to the Karnaugh-maps, the “do not care” input combinations could be exploited for logic reduction [

Because the individual Boolean terms are represented by only two coordinates (irrespective of the number of inputs), any combinational logic may be represented by two parameters alone. This can be viewed as a conversion of a graphical scheme to an equivalent nongraphical numerical scheme, to be handled by computing systems efficiently. The two coordinates may be stored in the memory as a single unit.

Because one can represent any logic expression through a set of coordinates alone, we now investigate the number of bits required to store each of the numbered coordinates. While a proposed template for

However, in comparison to K-maps (

Beyond SOP/POS paradigms: more patterns and the resulting optimization strategies need to be investigated in different logic gate methodologies, for example, SOP (“AND-OR”, which is “NAND-only”), POS (“OR-AND”, which is “NOR-only”), and “IMPLY-only” realisations.

Multilevel logic: the concept could be extended to three dimensions to represent a ternary logic system, where both inputs and outputs can have three possible logic levels

Alternate coordinate systems: every data-point symbolises a huge degree of information, but with only two or three parameters (coordinates). Because this information need not necessarily come about using a Cartesian coordinate system alone, one can choose to alternatively employ some other coordinate system and look for patterns and laws for optimization within such schemes. For example, a 2D polar system may be used, where the

Ternary logic representation (

Cartesian

One can use the template to establish three algebraic equalities, as will be discussed in detail in this section. The method, in general, is useful for alternative representation and processing of data whenever there is representation of information (i.e., encoding or decoding) in the form of distinct or discrete states. The basic representation strategy can therefore be extended to represent and optimize operations on qubits [

As a consequence,

For Theorem

For

For

For Theorem

In the context of the template for the method proposed, the two theorems can be proven graphically by simply counting the number of valid and redundant points, via different formulations. If

(

(

To establish equality presented in the Theorem

Total number of “redundant points”/the points in the darkened region, by counting the number of points in constituent triangles separately.

Alternately, Theorem

Total number of “redundant points”/the points in the darkened region, by deriving a recursive formula for

This method can be used in classrooms to quickly hand-calculate an optimized form of the logic function using a ruler and a compass alone (Figure

A compass and a ruler (marked with

A novel graphical technique for digital logic representation and optimization has been proposed, which makes optimization algorithm much more instinctive and easy. Multiple equations can be optimized simultaneously using the template presented. One can, theoretically, therefore optimize simultaneously multiple combinational logic circuits with any number of inputs or outputs. We propose a data structure transformation that can compress a truth table into a few parameters. The approach and the fundamentals involved are likely to generate many novel solutions applicable to other disciplines. A new paradigm is being proposed, which opens up new avenues for research in terms of new methodologies and pattern identification towards better logic reduction tailored to different implementation topologies such as SOP (“AND-OR”/“NAND-only”), POS (“OR-AND”/“NOR-only”), and “IMPLY-only” realisations or the newer methodologies such as “reconfigurable asynchronous logic automata (RALA)” [

Our proposed technique currently establishes a one-to-one mapping between all of the possible variable combinations and the corresponding output states—representing the absence and presence of every variable (in its original and the negated form) for each of the variable combinations. One possible future research direction is to investigate the relationship between the proposed technique herein and other representation techniques—such as QMDDs which, too, rely on quadrants and one-to-one mappings and which rather extend way beyond the proposed technique to represent transformation matrices featuring complex entries useful for logic involving qubits. Further research may also be targeted towards multilevel discrete systems beyond Boolean algebra and reversible [

The authors declare that there are no conflicts of interest regarding the publication of this paper.