Complexity
Volume 2020 (2020), Article ID 5212601, 17 pages
https://doi.org/10.1155/2020/5212601

Research Article

CCII and FPGA Realization: A Multistable Modified Fourth-Order Autonomous Chua’s Chaotic System with Coexisting Multiple Attractors

Fei Yu,¹ Hui Shen,¹ Li Liu,¹ Zinan Zhang,¹ Yuanyuan Huang,¹ Binyong He,¹ Shuo Cai,¹ Yun Song,¹ Bo Yin,¹ Sichun Du,² and Quan Xu³

¹School of Computer and Communication Engineering, Changsha University of Science and Technology, Changsha 410114, China
²College of Computer Science and Electronic Engineering, Hunan University, Changsha 410082, China
³School of Information Science and Engineering, Changzhou University, Changzhou 213164, China

Correspondence should be addressed to Fei Yu; yufeiyfyf@csust.edu.cn and Yuanyuan Huang; snailhyy@126.com

Received 25 December 2019; Accepted 12 February 2020; Published 21 March 2020

Guest Editor: Viet-Thanh Pham

Copyright © 2020 Fei Yu et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

Abstract.

In this paper, a multistable modified fourth-order autonomous Chua’s chaotic system is investigated. In addition to the dynamic characteristics of the third-order Chua’s chaotic system itself, what interests us is that this modified fourth-order autonomous Chua’s chaotic system has five different types of coexisting attractors: double-scroll, single band chaotic attractor, period-4 limit cycle, period-2 limit cycle, and period-1 limit cycle. Then, an inductorless modified fourth-order autonomous Chua’s chaotic circuit is proposed. The active elements as well as the synthetic inductor employed in this circuit are designed using second-generation current conveyors (CCIIs). The reason for using CCIIs is that they have high conversion rate and operation speed, which enable the circuit to work at a higher frequency range. The Multisim simulations confirm the theoretical estimates of the performance of the proposed circuit. Finally, using RK-4 numerical algorithm of VHDL 32-bit IQ-Math floating-point number format, the inductorless modified fourth-order autonomous Chua’s chaotic system is implemented on FPGA for the development of embedded engineering applications based on chaos. The system is simulated and synthesized on Virtex-6 FPGA chip. The maximum operating frequency of modified Chua’s chaotic oscillator based on FPGA is 180.180 MHz. This study demonstrates that the hardware-based multistable modified fourth-order autonomous Chua’s chaotic system is a very good source of entropy and can be applied to various embedded systems based on chaos, including secure communication, cryptography, and random number generator.

1. Introduction

Nonlinear phenomena widely exist in natural science, engineering technology, and social science. Since 1960, the research and application of nonlinear systems have been more and more extensive. Many problems in complex networks [1–7], memristor [8–11], electronic circuits [12–15], image processing [16–21], economics [22], and other fields can be attributed to the study of nonlinear systems. Chaos is a special state of motion in a nonlinear system, which is a random-like behavior generated by a deterministic system and is extremely sensitive to initial values and highly dependent on them [23–28]. Entropy is usually used to describe the complexity of chaotic systems. Therefore, it is of great significance to study the entropy of nonlinear systems [29–31].

With the rapid development of computer technology, the accompanying information security issues have attracted more and more attention and become a hot issue [32–42]. Chaos is widely used in cryptosystems, random numbers, and secure communications [43–49], and it has become a hot topic in nonlinear circuits and systems. In the realization of chaotic circuits, researchers have proposed many new methods to design different types of chaotic circuits [50–55]. Among them, Chua’s chaotic circuit [56–58] has attracted wide attention because of its simple structure, bifurcation, and chaotic complex dynamic characteristics. There are many research contents and achievements on this circuit, such as Chua’s dual circuit [59], transformed Chua’s circuit [60], multiscroll Chua’s circuit [61], and hyperchaotic Chua’s circuit [62, 63].

Multistability is a critical property of nonlinear dynamical systems, where a variety of behaviors such as coexisting attractors can appear for the same parameters, but different initial conditions. The flexibility in the system’s performance can be archived without changing parameters [64, 65]. This has become a very popular research topic and some important research results have been achieved recently [11, 66–69]. In [66], a 4D memristor-based Colpitts system was proposed by employing an ideal memristor to substitute the exponential nonlinear term of original 3D Colpitts oscillator model, from which the initials-dependent extreme multistability was exhibited by phase portraits and local basins of attraction. In [67], an ideal voltage-controlled memristor emulator-based canonical Chua’s circuit was investigated. With the voltage-current model, the initial condition-dependent extreme multistability was explored through analyzing the stability distribution of line equilibrium point and then the coexisting infinitely many attractors were numerically uncovered in such a memristive circuit by the attraction basin and phase portraits. In [69], a 5D multistable four-wing memristive hyperchaotic system (FWMHS) with linear equilibrium points was proposed by introducing a flux-controlled memristor model with absolute value function. A secure communication scheme based on the proposed 5D multistable FWMHS with disturbance inputs was also designed. To our best knowledge, fourth-order autonomous Chua’s chaotic systems with multistability are rare in literature. Therefore, it is of great significance to study a fourth-order Chua’s chaotic system with multistability.

In recent years, there exist several studies related to fourth-order autonomous Chua’s chaotic circuits [70–73]. The design of a new fourth-order autonomous nonlinear electric circuit using two active elements, one linear negative conductance, and one nonlinear resistor has been proposed by Koliopanos et al. to show rich dynamic behavior of Chua’s circuit [71]. In the performed study by Liu et al., the design of fourth-order Chua’s circuit has been proposed with a piecewise-linear nonlinearity and with a smooth cubic nonlinearity which could produce different kinds of attractors [72]. Wang et al. designed a fourth-order Chua’s circuit using a capacitor, a resistance, and a controlled-source constituted by stair functions in the third-order Chua’s circuit which could generate multidirectional multiscroll (MDMS) chaotic attractors [73]. However, the passive inductors are used in the circuits proposed in [70–73]. In fact, the parameters of passive inductor are not only difficult to control accurately in the actual Chua’s circuit, but also very easy to be affected by frequency, environment, and other factors. Generally speaking, the internal resistance of the inductor will affect the oscillating circuit, and the larger the value of the inductor, the greater the internal resistance of the inductor, and the greater the impact on the circuit. In order to minimize the influence of the internal resistance of the inductor on the circuit, the actual inductor can be replaced by the active inductor in the experiment. The active inductor can be equivalent to the ideal inductor without internal resistance consumption [74, 75].

Meanwhile, these modified Chua’s circuits generally use ordinary voltage-mode operational amplifiers as active devices. Because the gain-bandwidth product of voltage-mode operational amplifiers is limited (usually several megahertz), it is necessary to balance the gain and bandwidth in the design of circuits. That is to say, in order to get a large circuit gain, the operating frequency of the circuit can only be reduced [76–79]. And the current-mode devices have good frequency gain characteristics. The bandwidth of these kind of devices is almost independent of gain, so there is no need to weigh the gain and bandwidth in the designed circuit, which can improve the working frequency of the circuit [80]. In recent years, the current-mode devices to realize Chua’s circuit have gradually become a new research direction. In [81], active simulated inductor and piecewise nonlinear resistor in the circuit were all realized by second-generation current conveyors (CCIIs), so that the circuit was more stable and can work in higher frequency than does the usual Chua’s circuit. The circuit also had the advantages in that the current waves and the corresponding phase diagrams could be tested easily. Jothimurugan et al. [82] reported an improved implementation of an inductorless third-order autonomous canonical Chua’s circuit. The active elements as well as the synthetic inductor employed in this circuit were designed using current feedback operational amplifiers (CFOAs). The implementation of inductorless makes the experimental construction of Chua’s circuit simple and compact.

Many analog implementations of chaotic systems in electronic circuits have been reported in recent decades, such as the well-known breadboard with discrete components [10, 13, 27, 28] and CMOS technology for integrated circuit (IC) design [12, 23, 24]. However, breadboard is not easy to carry, maintain, and store data, and IC design has a long cycle and high cost [83–87]. Meanwhile, in some chaotic information systems, digital implementation may be necessary, for example, in embedded chaos-based application areas and many other chaotic digital information systems. Digital chaotic generators have been implemented by varied structures such as Digital Signal Processor (DSP) [88, 89] and Field Programmable Gate Array (FPGA) [90–94]. In order to calculate complex mathematical operations, the DSP chips are optimized operations sequentially. Constant-time autonomous chaotic systems are characterized by at least three differential equations and at least three outputs. Therefore, it takes a long time for systems based on DSP to calculate the output signal values in turn. On the other hand, the FPGA chip can run in parallel and has a relatively flexible architecture. Therefore, the design and test cycle cost of the FPGA chip is extremely low. Moreover, because of its reprogrammability, high speed, and large capacity, the implementation of FPGA is of great significance in the fields of information security, encryption, cryptography, communication, and other applications [95, 96].

In recent years, the design of chaotic system based on FPGA has been extensively studied. In [90], by the help of fourth-order of RK4 method, Sundarapandian-Pehlivan chaotic system was proposed in VHDL 32-bit IEEE 754-1985 floating-point number standard on Virtex-6 FPGA chip. In [91], autonomous Lu-Chen chaotic system was implemented on Virtex-6 FPGA chip using Heun numerical algorithm in VHDL 32-bit IQ-Math fixed-point number format. In [92], with the method of Artificial Neural Networks, the design of Pehlivan-Uyaroglu chaotic system was implemented in VHDL IEEE 754 single precision floating-point number format on Virtex-6 FPGA chip. A 3D nonequilibrium chaotic system using RK4 numerical algorithm with IEEE 754-1985 floating-point number standard on Virtex-6 FPGA chip was designed in [93]. In [94], the implementation of multibutterfly chaotic system in FPGA by applying the Xilinx (Vivado) system generator was proposed.

The objective of this study is twofold. First, based on a multistable modified fourth-order autonomous Chua’s chaotic circuit introduced in [70], an improved implementation of an inductorless modified fourth-order autonomous Chua’s chaotic circuit is proposed. The active elements as well as the synthetic inductor employed in this circuit are designed using CCIIs. The reason for employing CCIIs is that, compared with circuits designed with voltage operational amplifiers, CCIIs have better characteristics such as high conversion rate and high working speed, so that the circuit can work in higher frequency ranges. Second, the RK-4 method in a hardware description language (VHDL) is used to model the modified fourth-order autonomous Chua’s chaotic system, and the model is tested comprehensively on Xilinx Virtex-6 FPGA chip. The phase portraits of the output result of the system based on FPGA are given. The design results of the modified Chua’s chaotic oscillator based on FPGA are compared with those of computer, which verifies the correctness of the design based on digital circuit.

The structure of this paper is as follows: a multistable modified fourth-order autonomous Chua’s chaotic system is investigated and the dynamic characteristics are discussed in Section 2. An inductorless modified fourth-order autonomous Chua’s chaotic circuit is constructed by using CCII in Section 3. The Multisim simulation results of the inductorless modified Chua’s chaotic circuit are also given. In Section 4, the FPGA-based model of the modified fourth-order autonomous Chua’s chaotic system is introduced and simulation results of FPGA-based model are presented. Finally, conclusions are outlined in Section 5.

2. Multistable Modified Fourth-Order Autonomous Chua’s Chaotic System

2.1. Modified Fourth-Order Autonomous Chua’s Chaotic Circuit

By adding a linear resistor and a linear capacitor to the classical Chua’s chaotic circuit, a modified fourth-order autonomous Chua’s chaotic circuit is introduced in [70], as shown in Figure 1. According to Kirchhoff’s law, the dynamics of this circuit is governed by the following equations:

where , and are state variables which denote the voltage across , the voltage across , the voltage across , and current through L, respectively. According to the principle of Chua’s diode in classical Chua’s chaotic circuit, the characteristic curve of Chua’s diode in (1) can be graphically represented as in Figure 2 and is given by

where and are the slopes of the outer and inner regions, respectively, and denote the breakpoints.

Figure 1: Modified fourth-order autonomous Chua’s chaotic circuit.

Figure 2: Five-segment piecewise linear characteristic of the nonlinear resistor.

2.2. Multistable Modified Fourth-Order Autonomous Chua’s Chaotic System

2.2.1. System Generation and Dynamics Analysis

When , equation (1) can be expressed as follows:

When the parameters are selected as and , we can get , , , and . A double-scroll chaotic attractor is generated by MATLAB simulation under the initial condition , as shown in Figure 3. As can be seen from Figure 3, when the parameters of the system satisfy certain conditions, a self-excited oscillation attractor called double-scroll, like Chua’s circuit, will also be generated. Chaotic orbits are currents circling around strange attractors [59]. The nonperiodicity of chaotic oscillation can be clearly seen from the time-domain waveforms, as shown in Figure 4.

(a)

(b)

(c)

(d)

Figure 3: MATLAB simulation results of the modified Chua’s chaotic circuit: (a) in plane, (b) in plane, (c) in plane, and (d) in plane.

(a)

(b)

(c)

(d)

Figure 4: Time-domain waveforms of chaotic system (3).

The dynamic system described by differential equation (3) is symmetric with respect to origin and corresponds to the characteristics of Chua’s diode . If the characteristics of Chua’s diode are divided into three sections; that is,

The three subspaces in the state space of (4) are

There are unique equilibrium points in three subspaces of the state space. The three unique equilibrium points are

Linearization is carried out at the equilibrium point , and the linearization matrix is obtained as follows:

Four eigenvalues of the above matrix can be calculated: , and , linearized at equilibrium points and , and the linearized matrix can be obtained as follows:

Four eigenvalues of the above matrix are calculated: . Therefore, all equilibrium points , and are saddle points. In the macroscopic view of chaotic attractors, holes are formed near and , respectively, which are like two whirlpools twisted together, showing a double-scroll chaotic strange attractor (Figure 3). This is the result of the combination of global stability and local instability. Chaotic orbits are the flow whirling around the strange attractor. The adjacent trajectories show a tendency of mutual exclusion and separation at an exponential rate [70].

There are many interesting chaotic phenomena when the system parameters are changed continuously. However, in order to debug the experimental circuit conveniently in the future, only the resistance R is changed to observe the plane at the ends of and . In the simulation process, the plane at the ends of and also shows that period-1 limit cycle, period-2 limit cycle, period-4 limit cycle, and single-band chaotic attractor are shown in Figure 5 and Table 1. It can be seen that the modified Chua’s chaotic circuit exhibits abundant dynamic behavior of period doubling bifurcation sequence.

(a)

(b)

(c)

(d)

Figure 5: The period doubling scenario in the modified Chua’s chaotic circuit shown in Figure 1: (a) single band chaotic attractor , (b) period-4 limit cycle , (c) period-2 limit cycle , and (d) period-1 limit cycle .

Table 1: Chaotic phenomena of the modified Chua’s chaotic system by increasing resistance R values.

Chaotic phenomena
Range of R
R
α
β

Figure

Single band chaotic attractor

10
17.05
28.9
0.05
Figure 5(a)

Period-4 limit cycle

10
17.76
29.5
0.05
Figure 5(b)

Period-2 limit cycle

10
17.86
29.58
0.05
Figure 5(c)

Period-1 limit cycle

10
18.39
30.02
0.05
Figure 5(d)

2.2.2. Multistability Analysis

Multistability allows flexibility of system performance without changing parameters, and appropriate control strategies can be used to induce switching behavior between different coexisting states. In order to study the complex dynamic characteristics of the system better, it is necessary to give some disturbance to the initial conditions, that is, to change the initial conditions of the system under the condition of keeping the system parameters unchanged. Figure 6 shows the coexistence phenomenon of the system under two different initial conditions. The initial condition of the blue trace is and the initial condition of the red trace is . It can be seen from Figure 6 that, under these two initial conditions, the attractors exhibited by the system are exactly the same, but the directions of the trajectories are different, which all depend on the symmetry of the system. Figure 6 shows the coexistence attractors for different parameter values β and . Figure 6(a) shows that the system has coexisting double-scroll chaotic attractors. Figure 6(b) shows that the system has coexisting single band chaotic attractors. Figure 6(c) shows that the system shows coexisting period-4 limit cycle. It is very interesting that Figure 6(d) shows that the system has a period-2 limit cycle coexistence phenomenon. Figure 6(e) shows that the system has a period-1 limit cycle coexistence phenomenon. Figure 6(f) is a time-domain waveform diagram of state x, and its parameter values are the same as period-1 limit cycle.

(a)

(b)

(c)

(d)

(e)

(f)

Figure 6: Coexisting attractors for the different parameter values β and and the initial conditions are and which are shown in blue and red, respectively: (a) coexisting double-scroll chaotic attractors, (b) coexisting single band chaotic attractors, (c) coexisting period-4 limit cycle, (d) coexisting period-2 limit cycle, (e) coexisting period-1 limit cycle, and (f) coexisting time-domain waveform diagram of state x.

3. Inductorless Modified Fourth-Order Autonomous Chua’s Chaotic Circuit Based on CCII

3.1. Inductorless Modified Chua’s Chaotic Circuit Realized by CCII

Current conveyor is a kind of electronic device with good high frequency performance, strong versatility, and flexibility, which has attracted wide attention of scholars [76–81]. In this part, a modified Chua’s chaotic circuit realized by current conveyor is proposed. The key is to realize piecewise linear resistance and inductance L in Chua’s chaotic circuit by using CCII commercial chip AD844 (current feedback operational amplifier) as the basic active device.

3.1.1. CCII

CCII is one of the most commonly used active devices in current-mode circuits. The symbolic representation of CCII is shown in Figure 7. Port relationship of CCII is

where and are the voltage and current of X-terminal, and are the voltage and current of Y-terminal, and and are the voltage and current of Z-terminal, respectively. K is the transmission coefficient of the current conveyor. When , it is the in-phase current conveyor, and when , it is the reverse-phase current conveyor. The in-phase current conveyor can be implemented with one AD844, while the reverse-phase current conveyor needs two AD844. The implementation circuits are shown in Figures 8(a) and 8(b), respectively.

Figure 7: Symbolic representation of CCII.

(a)

(b)

Figure 8: Implementation of the in-phase current conveyor (a) and the reverse-phase current conveyor (b).

3.1.2. Five-Segment Piecewise Nonlinear Resistance

Generally, when we use CCII to construct a nonlinear functional circuit, the five-segment piecewise nonlinear resistance is employed. As shown in Figure 2, the input voltage is given to make it work in the middle of three BCDE segments. A five-piece nonlinear resistance [81] can be formed by parallel connection of two CCIIs, as shown in Figure 9(a). In Figure 2, the five-segment piecewise nonlinear resistance characteristic curve ABCDEF is generated by the circuit structure, the BCDE section has the characteristics of nonlinear negative resistance, and Chua’s chaotic circuit mainly works in this curve section. The turning voltage and slope of the two circuits are , and , respectively. Therefore, the characteristic curve of the five-segment piecewise nonlinear resistance can be obtained as follows:

(a)

(b)

Figure 9: Five-segment piecewise nonlinear resistance implemented by two CCIIs: (a) circuit structure and (b) characteristic simulated by Multisim.

According to the structure characteristics of the circuit shown in Figure 2, the slope expressions of each section are as follows:

The turning voltages of the circuit are

where is the power supply voltage of the amplifier. Figure 9(b) shows the five-segment piecewise nonlinear resistance characteristic curve of Figure 9(a)’s circuit which is simulated by Multisim. It can be seen that the curve is completely consistent with the performance of Figure 2.

3.1.3. Lossless Grounded Active Inductor

Although inductor is an important passive device in IC design, it is not easy to integrate because it cannot integrate itself. Therefore, spiral inductors are widely used in integrated circuits. Even so, there are some disadvantages, such as low adjustability, weight, large area, and high cost [82]. Therefore, in order to overcome these difficulties, inductance simulators are used as substitutes for spiral inductors in many circuit applications [97]. In this study, a lossless grounded active inductor based on CCII developed by Yang is used [81]. This is because CCII has proven to be very useful in either current or voltage-mode signal processing circuits. The principle circuit of the lossless grounded active inductor realized by CCII is shown in Figure 10.

Figure 10: Lossless grounded active inductor circuit implemented by CCII.

In Figure 10, CCII-, , and form a voltage amplifier. CCII+, , and form a current amplifier. The input voltage is added to the Y-terminal of CCII- and amplified by the voltage amplifier composed of CCII-, , and . According to the voltage-current relationship of CCII, if , the equivalent input impedance of the circuit shown in Figure 9(a) is

It can be seen that the circuit shown in Figure 10 is an impedance converter, which can realize impedance conversion. By changing the properties of impedance , and , different equivalent impedance can be obtained. If , and , the circuit can realize a lossless grounded active inductor, and the equivalent inductance value of the lossless grounded active inductor is

3.1.4. Inductorless Modified Fourth-Order Autonomous Chua’s Chaotic Circuit

Figure 11 shows the modified Chua’s chaotic circuit designed using CCII. The upper part inside the dash box of the circuit simulates a grounded inductor , the right part inside the dash box is piecewise five-segment linear designed using CCII, and the left part inside the dash box of the circuit is a linear network. The inspection of the present circuit configuration reveals that all the four state variables , and , as stated in (1), are available from the circuit. The simulated inductance is composed of one CCII+, two CCIIs-, and one capacitor . network is composed of , and R. , and constitute resonant circuit. and piecewise linear resistance circuit are connected in parallel. Resistor R connects linear circuit and nonlinear circuit to form chaotic circuit. The values of components are taken in Table 2. This circuit is biased with supply. A double-scroll attractor is observed for as shown in Figure 12. Through the simulation of the circuit, we have also observed a variety of dynamic behaviors, such as single band chain attractor, period-4 limit cycle, period-2 limit cycle, period-1 limit cycle, steady state, and limit cycle, as shown in Figure 13. It can be seen that the Multisim simulation results are in good agreement with the theoretical analysis, which verifies the feasibility of the modified Chua’s circuit.

Figure 11: Inductorless modified Chua’s chaotic circuit realized by CCII.

Table 2: Values of components used in the modified Chua’s chaotic circuit.

Passive component
Value

R
Variable

(a)

(b)

(c)

(d)

Figure 12: Multisim simulation of double-scroll phase portraits of the inductorless modified Chua’s chaotic circuit: (a) in plane, (b) in plane, (c) in plane, and (d) in plane.

(a)

(b)

(c)

(d)

(e)

(f)

Figure 13: Multisim simulation of (a) single band chaotic attractor , (b) period-4 limit cycle , (c) period-2 limit cycle , (d) period-1 limit cycle , (e) steady state , and (f) limit cycle in plane.

4. FPGA Implementation of the Multistable Modified Fourth-Order Autonomous Chua’s Chaotic System

The multistable modified fourth-order autonomous Chua’s chaotic system presented in this study is modeled on LabVIEW FPGA using Runge-Kutta (RK-4) algorithm, which is one of the most popular numerical differential equation decryption methods in the literature. According to the 32-bit IEEE 754-1985 floating-point number standard, the design is coded on VHDL (Very-High-Speed High Speed Integrated Circuit Hardware Description Language) [98]. IP core generator developed by Vivado 2018.3 Design Tools system is used to design chaotic oscillator based on FPGA, such as multiplier, subtractor, and adder, which conform to IEEE 754-1985 standard.

4.1. RK-4 Algorithm

Runge-Kutta (RK) algorithm is a high precision one-step algorithm widely used in engineering. The theoretical basis of the algorithm is derived from Taylor’s formula and the slope approximation to express the differential. It predicts the slope of several points several times in the integral interval, then carries out weighted averaging, which is used as the basis for the next point, and thus constructs a numerical integration calculation method with higher accuracy [90]. If the slopes of four points are calculated beforehand, it is the fourth-order Runge-Kutta (RK-4) algorithm. For differential equation , the theoretical formula of RK-4 is as follows:

where denote the first-order reciprocal of the output variable, that is, the differential at a point, expressed as the slope. The iteration step is . Figure 14 shows the block diagram of Chua’s oscillator using RK-4 algorithm. , and signals are the initial conditions for the system to start running. In the design, they are defined as 32-bit symbolic floating-point numbers, which are determined internally by the user. The purpose of the multiplexer unit is to select the external initial conditions at the start or the internal values provided by the RK4-based oscillator unit in the successive steps. In the continuous steps after the start of operation, the , and signals generated by the oscillator unit are used as feedback inputs of the multiplexing unit, that is, the input signals of the next step, such as , and . The oscillator unit consists of six modules: , and filter, where modules are used to calculate the values of and module is used to calculate the value of . When does not produce the final required calculation results, the filter unit will prevent the intermediate value to reach the output.

Figure 14: The block diagram of the FPGA-based multistable modified Chua’s chaotic oscillator unit.

4.2. FPGA Implementation

The top level block diagram of the modified fourth-order Chua’s oscillator based on FPGA designed by RK-4 algorithm is shown in Figure 15. As can be seen from Figure 15, the design system has three inputs and five outputs. The input signal consists of a 1-bit clock signal , a 1-bit , and a 32-bit . and are used to ensure synchronization between the system and other modules. 32-bit represents the step size, which is used to determine the sensitivity of the algorithm. The output signal consists of four 32-bit output signals and 1-bit flag signal . When the calculation generates , the flag signal is output.

Figure 15: The top level block diagram of the FPGA-based multistable modified Chua’s chaotic system.

The second level block diagram is composed of modified Chua’s chaotic oscillator, floating-point to fixed-point unit, and digital-to-analog converter, as shown in Figure 16. The oscillator unit has three input signals, 1-bit , 1-bit , and 32-bit , respectively. The 1-bit data signal provides the clock signal for the unit. At the output of chaotic oscillator based on Rk-4, there are four floating-point standard 32-bit output signals . These signals are equivalent to the , and variables of the continuous-time chaotic system (3). The input of the floating-point to fixed-point unit is four 32-bit output signals of the oscillator unit, which converts the output of the former unit into 14-bit unsigned fixed-point. The module converts the digital signal generated by the chaotic system into analog signal and outputs it to the oscilloscope. In the actual experiment, we choose , and to output the dual-channel module and then the oscilloscope.

Figure 16: The second level block diagram of the FPGA-based multistable modified Chua’s chaotic system.

4.3. FPGA Test Results

The modified multistable fourth-order Chua’s chaotic system based on RK-4 is synthesized on Xilinx ZYNQ-XC7Z020 chip. The use of the chip source and the clock speed of the system are calculated. Using Vivado 2018.3 design tool, the data processing duration of the modified fourth-order Chua’s chaotic system designed in this paper is determined. The , and signals are equivalent to the , and signals in the system. Although the 32-bit floating-point standard is adopted in the system design, which makes it easier to detect the time series values of these signals, the Vivado simulation results are displayed in hexadecimal digital format. The results of the Xilinx ISim simulator for the modified fourth-order Chua’s chaotic system are shown in Figure 17 when . The system runs in pipeline mode and produces , and signals after every 320 clock cycles. Figure 18 shows the power utilized by the system. Table 3 shows the resources utilized by the chaotic oscillator implemented on FPGA including the clock frequency. The minimum working period of the modified fourth-order Chua’s chaotic system signal generator based on FPGA is 5.55 ns. Finally, the , and signals obtained from the RK4-based FPGA design of the system are recorded in a file in the form of 32-bit floating-point hexadecimal number during the test step, which is given in Table 4. The phase portraits of the output signals are obtained using the data set generated in decimal format by the modified fourth-order Chua’s chaotic system based on FPGA given in Table 4. Two pictures of the double-scroll chaotic attractors and single band chaotic attractor and period limit cycles obtained from the hardware implementation of the RK4-based modified fourth-order Chua’s chaotic system on FPGA are shown in Figures 19 and 20, respectively. The results show that the phase portraits obtained by the model based on MATLAB and FPGA have good consistency. Although the implementation of FPGA has a reputation of being difficult to design, with the help of system methodology, the system can require less work than the traditional software-based implementation [99, 100].

Figure 17: Xilinx ISim simulation results of the modified multistable fourth-order Chua’s chaotic system based on FPGA.

Figure 18: Power utilized by the system based on FPGA.

Table 3: The Xilinx ZYNQ-XC7Z020 chip statistics of FPGA-based multistable modified fourth-order Chua’s chaotic system.

FPGA chip
Slice register number
LUTs number
Bonded IOBs number
Max. clock frequency (MHz)

ZYNQ-XC7Z020
21,711
16,430
34
180.180

Utilization (%)
20.01
30.88
27.20
—

Table 4: The conversion result from 32-bit floating-point number output by FPGA to decimal number.

FPGA output signals in 32-bit floating-point number with hexadecimal format
Decimal number values

3ea6c5fa
3d8e688e
beb09da2
0.325729181065535
0.0695353589404750
−0.344952653576506

3eb5e9f5
3d8b58d6
beba7076
0.355300589372080
0.0680405320103716
−0.364139270662248

3ea6c5fa
3d8e688e
beb09da2
0.325729181065535
0.0695353589404750
−0.344952653576506

3f80921f
3db1af46
bf22ec49
1.00445926841886
0.0867600901838271
−0.636417953148042

3f818177
3db2d8e2
bf239408
1.01176345370630
0.0873277341857656
−0.638977523652504

400097f8
3e6cb53e
bfc2f4b9
2.00927537971617
0.231160129151098
−1.52309338070114

4002b408
3e70defb
bfca54f4
2.04223825024841
0.235225603385658
−1.58071756451930

4004bed6
3e748682
bfd1cf6d
2.07414771146939
0.238794362382855
−1.63914268012843

404d076a
3efe07f0
c0686855
3.20357746761604
0.496154299792244
−3.63136802769324

404de8cc
3ef5d30f
c06fb384
3.21733377662411
0.480125878954796
−3.74533166924290

404e9294
3eecea3c
c076ae83
3.22769634415875
0.462724565296702
−3.85440145110143

bf806354
bd80f4ae
400d650e
−1.00303124071647
−0.0629666870295447
2.20929280483211

Figure 19: Implementation platform and exemplification of the double-scroll chaotic attractors generated by the FPGA implementation of the multistable modified fourth-order Chua’s chaotic system.

Figure 20: Implementation platform and exemplification of the single band chaotic attractor and period limit cycles generated by the FPGA implementation of the multistable modified fourth-order Chua’s chaotic system.

5. Conclusion

A multistable modified fourth-order autonomous Chua’s chaotic system is first investigated. Then the modified implementation of fourth-order autonomous Chua’s chaotic circuit with CCII based active elements and synthetic inductor is reported. Synthetic inductor instead of the inductor coil makes the circuit more suitable for the fabrication of integrated circuits, which can be used for the study of coupled dynamics and spatiotemporal chaos. The modified Chua’s circuit exhibits abundant dynamic behavior of period doubling bifurcation sequence. Finally, the design of multistable modified fourth-order autonomous Chua’s chaotic system based on discrete-time FPGA is implemented on Xilinx Virtex-6 (ZYNQ-XC7Z020) chip using RK-4 algorithm. The maximum operating frequency of the designed chaotic system reaches 180.180 MHz. As can be observed from the results, the chaotic signal generator based on FPGA proposed in this paper can be used as a good entropy source in the applications of secure communication, cryptosystem, and random number generator.

Data Availability

All data used to support the findings of this study are available from the corresponding authors upon request.

Conflicts of Interest

The authors declare that they have no conflicts of interest.

Acknowledgments

This work was partly supported by the National Natural Science Foundation of China under Grants 61504013, 61702052, 61772087, 61674054, and 61801054, the Natural Science Foundation of Hunan Province under Grants 2019JJ50648, 2016jj2005, 2017JJ2049, and 2017JJ3254, the Scientific Research Foundation of Hunan Provincial Education Department under Grants 18A137, 16B212, and 17C0048, and the National Key Research and Development Project under Grant 2018YFE0111200.

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