Spiking Neural P Systems with Polarizations and Rules on Synapses

. Spiking neural P systems are a class of computation models inspired by the biological neural systems, where spikes and spiking rules are in neurons. In this work, we propose a variant of spiking neural P systems, called spiking neural P systems with polarizations and rules on synapses (PSNRS P systems), where spiking rules are placed on synapses and neurons are associated with polarizations used to control the application of such spiking rules. The computation power of PSNRS P systems is investigated. It is proven that PSNRS P systems are Turing universal, both as number generating and accepting devices. Furthermore, a universal PSNRS P system with 151 neurons for computing any Turing computable functions is given. Compared with the case of SN P systems with polarizations but without spiking rules in neurons, less number of neurons are used to construct a universal PSNRS P system.


Introduction
Membrane computing is a burgeoning branch of natural computing that develops new computation models based on the structure and functioning of living cells [1,2]. Membrane systems (also called P systems) are distributed parallel computation models in membrane computing. ere are three main classes of P systems, based on the structure of membranes inside living cells: cell-like P systems [3], tissue-like P systems [4], and neural-like P systems [5]. In the field of mathematical and theoretical computer science, P systems are used to investigate numerous types of problems, such as the Turing universality of the system [6,7], complexity classes [8], numerical problems [9,10], NP-complete problems [11][12][13], and P systems simulation [14,15]. e reader can consult [16] for more comprehensive information about membrane computing. Up-to-date research results and open problems can be found on the membrane computing website http://ppage.psystems.eu.
Spiking neural P systems (SN P systems) are a class of neural-like P systems, inspired by the biological phenomenon of neurons conveying information by communicating with each other via identical electric impulses (spikes) [17]. In this type of systems, only one type of spike exists, and the information is encoded by the timing and number of spikes. SN P systems are a class of computation models that use spiking/ forgetting rules, which is applied by matching the number of spikes with the regular expression. Many variants of SN P systems have been proposed based on various biological characteristics, such as scheduled synapses [18], structural plasticity [19,20], thresholds [21,22], and multiple channels [23]. Meanwhile, there are also extensive studies in the view of the mechanism of information communication between neurons, such as white hole neurons [24], request rules [25], inhibitory rules [26], and communication on request [27]. Most of these systems have been proven to have the equivalent computation power with Turing machine.
In addition, SN P systems have been widely investigated in the field of computer science, which can be used to produce binary and string languages [28][29][30][31] and simulate the registration machine [32,33]. With the development of the research, the SN P systems as small universal computing devices are studied [34,35]. Moreover, SN P systems and their variants have been successfully implemented in real-life applications, for instance, logic gate design [36], image processing [37], fault diagnosis of electric power systems [38][39][40], optimization algorithm design for combinatorial optimization problems [41,42], and robot control [43][44][45][46].
Recently, a variant of SN P systems called SN P systems with polarizations (PSN P systems) was proposed in [47], where the rules are controlled by three electrical charges (− , 0, +) associated with each neuron, not by the regular expression; it is closer to biological reality. In PSN P systems, the use of rules is more limited compared with SN P systems, because only three electrical charges can be selected, but PSN P systems as number devices proved to be Turing universal. As universal computing devices, the computing process of PSN P systems is complicated, and a total of 164 neurons (computational resources) are consumed. It is an open problem whether to find such systems that consume less computational resources, such as using extended spiking rules and delay functions and so on. Herein, we are inspired by the functioning of reflex arcs; the brain sends different signals to different cells to elicit precise actions by the body when a stimulus enters the brain. is biological phenomenon was introduced into SN P systems in [48]; the rules are placed on the synapses, that is, the rules on synapses. However, the rules on the synapse are still triggered using the regular expression. If the use conditions of rules on synapses are weakened, what about the computation power of SN P systems with rules on synapses? Hence, it is also interesting to construct a variant of SN P systems with rules on synapses, where the rules are not controlled by the regular expression.
In this work, inspired by the open problems raised in [47], we put the rules on synapses, proposing SN P systems with polarizations and rules on synapses (PSNRS P systems, for short). In PSNRS P systems, the rules associated with each neuron are placed on synapses, and when the polarity of a neuron meets some rules of its synapses, the rules are activated, and the neuron sends different number of spikes and the same electrical charge to its neighboring neurons. Compared with neurons in PSN P systems that can only send the same number of spikes at some point to its neighboring neurons, the rules on synapses in PSNRS P systems will be more flexible. We investigate the computation power of PSNRS P systems working in the maximally parallel mode. e main contributions of the present work are summarized as follows: (i) Rules on synapses and polarizations are considered in SN P systems; we construct a variant of SN P systems, called SN P systems with polarizations and rules on synapses (PSNRS P systems). In PSNRS P systems, polarization is used to control the application of spiking/forgetting rules associated with each synapse of the neurons.
(ii) e computation power of PSNRS P systems is investigated. Specifically, we prove that PSNRS P systems as accepting devices and generating devices achieve universality. Furthermore, a universal PSNRS P system with 151 neurons for computable functions is presented. Compared to the PSN P system, 13 neurons were reduced in computational resources. e rest of this paper is organized as follows. e formal definition of PSNRS P systems is introduced in the next section.
e computation power of PSNRS P systems as number generators and acceptors is investigated in Section 3. In Section 4, a small universal PSNRS P system for computable functions is given. Finally, conclusions and suggestions for further work are presented in Section 5.

Spiking Neural P Systems with Polarizations and Rules on Synapses
In this section, we first review some prerequisites. For details on the basic elements of membrane computing and automata theory, the reader can refer to [16,49]. V * is the set of all words over the alphabet, including the empty string λ. V * − λ { } corresponds to the set of nonempty words over V and is denoted by V + . e family of sets of natural numbers computed by Turing machines is denoted by NRE.
In the following definition, the notions of polarity and rules on synapses will be used. Only a brief introduction is provided here; please refer to [47,48,50] for details. A PSNRS P system of degree m ≥ 1 is a construction as follows: where (i) O � a { } is an alphabet and a denotes the spike (ii) σ 1 , σ 2 , σ 3 , . . . , σ m are neurons of the form syn is the sets of synapses; each element is a pair of the form ((i, j), R (i,j) ), where (i, j) indicates that there is a synapse connecting neurons σ i and σ j , with i, j ∈ 1, 2, . . . , m { }, i ≠ j, and R (i,j) is a finite set of rules of the following two forms: indicates the input and output neurons, respectively e spiking rules are applied as follows. If neuron σ i contains k spikes and has α charge (a k ∈ L(E), k ≥ c), then the spiking rule α/a c ⟶ a; β is enabled. Meanwhile, c spikes from neuron σ i are consumed, and a spike and β charge are sent to neuron σ j via a synapse (i, j). Note that each synapse can have rules, and they do not affect each other, indicating that neuron σ i sends a difference charge to adjacent neurons.
A forgetting rule α/a c ⟶ λ; β is used when neuron σ i maintains α charge and at least c spikes, so that all c spikes are removed from neuron σ i and the β charge is sent to neuron σ j by synapse (i, j).
At some point, if a rule from R (i,j) can be used by a synapse (i, j), the rule must be used. If several rules from R (i,j) can be used by a synapse, these rules are chosen nondeterministically. For example, there are two firing rules, α 1 /a c ⟶ a/λ; β 1 and α 1 /a c ⟶ a/λ; β 2 , in a synapse, with e synapse nondeterministically applies one of the rules. Meanwhile, when some rules associated with several synapses originating from the same neuron can be applied, all rules that are applied consume the same number of spikes from the same neuron. In each unit of time, only one rule on each synapse is used. At the system level, rules are used in parallel at different synapses.
In PSNRS P systems, the use of rules is determined by the polarity of neurons and the number of pulses located in neurons and no longer matches the regular expression by checking the number of pulses. More broadly, to use a rule, the total number of spikes inside the neuron should not be less than the number of spikes consumed by the rule. Moreover, the neurons send out not only spikes but also charges, even when using forgetting rules.
Specifically, when a neuron receives a charge from neighboring neurons, the changes in the electrical charges connected to the neuron proceed as follows: In this work, system Π is considered as a number generator. Usually, the time interval between the first two spikes output by the output neuron is used as the result of a computation. e number t 2 − t 1 is said to be computed by systems Π, denoted by N 2 (Π).
In addition, system Π can work in an accepting mode, where the output neuron is removed. A number n is introduced in the system, by introducing a sequence 10 n− 1 1 in neuron σ in .
is number n is said to be accepted by system Π if the computation eventually halts. e set of numbers accepted by Π is denoted by N acc (Π).
We denote the family of all sets of numbers generated or accepted by PSNRS P systems by N syn α PSNP n m , where the symbol α ∈ 2, acc { } indicates the generating or accepting mode, syn represents rules on synapses, there are up to m neurons, and each neuron has up to n rules on its synapses. As usual, the indices m and n are replaced with * when no bound is imposed on the corresponding parameter.

Computation Power of PSNRS P Systems
In this section, we mainly investigate the computation power of PSNRS P systems and prove that PSNRS P systems can generate all recursively enumerable sets of numbers.
We first briefly review the definition of register machines. e construction of a register machine is M � (m, H, l 0 , l h , I), where m indicates the number of registers, H indicates the set of instruction labels, l 0 is the start label, l h is the halt label (assigned to instruction HALT), and I indicates the set of instructions (each of which is precisely labeled by an individual label from H). Each instruction is one of the following forms: ADD instruction l i : (ADD(r), l j , l k ) indicates that the register r is added 1, and then the present instruction labeled with l i passes to the next instruction l j or l k (being chosen nondeterministically); SUB instruction l i : (SUB(r), l j , l k ) shows that the register r is subtracted 1 (if the register r is nonzero), and the present instruction labeled with l i passes to the instruction l j , or else (if the register r is zero) the present instruction labeled with l i passes to the instruction l k .
It is known that register machines with three registers can precisely generate a family of sets of recursively enumerable natural numbers; in other words, it can characterize NRE [34].
Proof. We prove only the inclusion NRE ⊆ N syn 2 PSNP 2 * ; the reverse inclusion can be invoked from the Church-Turing thesis. For this, a specific PSNRS P system Π is constructed to simulate a register machine M, and the register machine M � m, H, l 0 , l h , I is considered. Each register of M is associated with a neuron of Π; we represent the number n contained in register r by 2n spikes located in σ r , and the instruction l of H corresponds to a neuron σ l . Initially, all neurons are empty; when neuron σ l is active, the instruction labeled with l starts. When two spikes are received by neuron σ l i , system Π starts to simulate instruction l i : (OP(r), l j , l k ) (OP denotes one of the operations ADD and SUB), and either neuron σ l j or σ l k receives two spikes and a neutral charge, one of which is activated. en, the system starts to simulate the corresponding instruction. During the simulation of M, when neuron σ l h , which is associated with the halting label l h of M, is activated, the computation halts. Without any loss of generality, all registers other than register 1 are empty in the halting configuration, and register 1 is never decremented during the computation. e time interval between the first two spikes output by the output neuron σ out is used as the computation result. e PSNRS P system Π consists of the following three components: ADD, SUB, and FIN modules, shown in Figures 1-3, respectively.

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In the following sections, we explain how these modules work.
ADD module: simulating an ADD instruction l i : (ADD (r), l j , l k ).

Complexity 3
As shown in Figure 1, suppose that an ADD instruction l i : (ADD(r), l j , l k ) is simulated in step t, and neuron σ l i has a neutral charge and receives two spikes.
At step t, neuron σ l i receives two spikes, rule 0/a 2 ⟶ a; 0 on synapses (l i , C 1 ) and (l i , C 2 ) is applied, and then neuron σ l i sends one spike and a neutral charge to auxiliary neurons σ c 1 and σ c 2 , respectively. At step t + 1, auxiliary neurons σ c 1 and σ c 2 both receive one spike and a neutral charge, the polarity of which remain the same. Rule 0/a ⟶ a; 0 is used on synapses (C 1 , r) and (C 2 , r), and each of the neurons sends a spike to neuron σ r . When the two spikes are received, the number of spikes in neuron σ r is increased by two, simulating an increase in the number stored in register r by one. At the same time, neuron σ c 3 receives a spike from each of neurons σ c 1 and σ c 2 . Rule 0/a ⟶ a; 0 is applied on synapse (C 2 , C 3 ), and neuron σ c 2 sends a spike and a neutral charge to neuron σ c 3 . en, one of the rules 0/a ⟶ a; + and 0/a ⟶ a; − on synapse (C 1 , C 3 ) is nondeterministically chosen and applied, and neuron σ c 1 sends a spike to neuron σ c 3 . ere are two possible cases depending on the polarity received by neuron σ c 3 .
Case I. At step t + 1, if rule 0/a ⟶ a; + is used on synapse (C 1 , C 3 ), then neuron σ c 3 receives a spike and positive charge from neuron σ c 1 , and the polarization of the neuron is changed from a neutral charge to a positive charge. At step t + 2, neuron σ c 3 sends a spike to neuron σ c 4 via rule +/a 2 ⟶ a; 0 on synapse (C 3 , C 4 ), and a spike is maintained in neuron σ c 4 . At the same step, rule +/a 2 ⟶ a; + is applied on synapse (C 3 , C 6 ), and neuron σ c 6 receives a spike and a positive charge. In this way, neuron σ c 6 accumulates a spike and changes to a neutral charge. At step t + 3, neuron σ l j receives two spikes from neurons σ c 4 and σ c 6 , which both have a neutral charge. Meanwhile, by means of rule − /a ⟶ λ; − , neuron σ c 4 sends a negative charge to neurons σ c 3 and σ c 6 , so the polarizations of neurons σ c 3 and σ c 6 are changed back to their original state. At the same step, rule is used via synapse (C 4 , l j ), and neuron σ c 4 sends a spike to neuron σ l j . In this way, two spikes are present in neuron σ l j , and system Π starts to simulate instruction l j of M.

Complexity
Case II. At step t + 1, if rule 0/a ⟶ a; − can be enabled on synapse (C 1 , C 3 ), a spike and a negative charge are sent to neuron σ c 3 . At step t + 2, neuron σ c 5 receives a spike via synapse (C 3 , C 5 ) via rule − /a 2 ⟶ a; 0. At the same step, neuron σ c 3 sends a spike and negative charge to neuron σ c 7 along synapse (C 3 , C 7 ) by rule − /a 2 ⟶ a; − ; afterwards, neuron σ c 7 has a neutral charge. At step t + 3, rule +/a ⟶ λ; + is applied on synapse (C 5 , C 3 ), and neuron σ c 3 receives a positive charge and returns the original state. Similarly, neuron σ c 5 executes the same rule for neuron σ c 7 via synapse (C 5 , C 7 ). Otherwise, neuron σ l k receives two spikes from neurons σ c 5 and σ c 7 by rules 0/a ⟶ a; 0 and +/a ⟶ a; 0 via synapses (C 5 , l k ) and (C 7 , l k ). In this way, the system Π starts to simulate instruction l k of M. erefore, the ADD module can correctly simulate ADD instructions: in neuron σ r , the number of spikes is increased by two; meanwhile, one of two neurons σ l j and σ l k nondeterministically receives two spikes.
SUB module: simulating a SUB instruction l i : (SUB(r), l j , l k ).
In this section, we will describe the SUB module, as shown in Figure 2. Suppose that a SUB instruction l i : (SUB(r), l j , l k ) is simulated and neuron σ l i receives two spikes at step t. Initially, neuron σ l i fires, sending spikes to neuron σ c 2 and neuron σ r using rule 0/a 2 ⟶ a; + on synapses (l i , C 2 ) and (l i , r). However, neuron σ c 2 maintains a positive charge, and neuron σ r is changed to a positive charge. At the same step, rule 0/a 2 ⟶ a; − is applied on synapse (l i , C 1 ), and neuron σ c 1 receives a spike from neuron σ l i . According to the number of spikes in neuron σ r , the following two cases are considered.
Case I. At step t + 1, neuron σ r has 2n + 1(n ≥ 0) spikes (corresponding to the number stored in register r, being n). In this way, neuron σ r has a positive charge, rule +/a 3 ⟶ λ; + is applied on synapse (r, C 3 ), and neuron σ c 2 , which has a positive charge, sends a spike and a negative charge to neuron σ c 3 . Note that neuron σ c 3 maintains a neutral charge when a positive charge meets a negative charge, resulting in a spike in neuron σ c 3 . Simultaneously, neuron σ r fires, sending a spike to neuron σ c 4 via rule +/a 3 ⟶ a; + on synapse (r, C 4 ). At the same step, neuron σ c 1 sends a negative charge to neuron σ r , and the initial state of neuron σ r is recovered to avoid inaccurate operation. At step t + 2, neuron σ c 4 is activated by rule +/a ⟶ a; 0 on synapse (C 4 , l j ), sending a spike to neuron σ l j ; meanwhile, neuron σ c 3 sends a spike to neuron σ l j via rule 0/a ⟶ a; 0 on synapse (C 3 , l j ). Neuron σ l j receives two spikes, which indicates that system Π simulates the instruction l j of M.
Case II. At step t + 1, neuron σ r has a spike (corresponding to the number stored in register r being 0). en, a negative charge is sent to neuron σ r via rule − /a ⟶ λ; − on synapse (C 1 , r), and neuron σ r returns to the initial state when a positive charge meets a negative charge. At the same step, neuron σ c 2 is activated by rule +/a ⟶ a, − on synapse (C 2 , C 3 ), sending a spike and a negative charge to neuron σ c 3 . At step t + 2, rule − /a ⟶ a; − is enabled on synapse (C 3 , C 5 ), and neuron σ c 3 sends a spike and a negative charge to neuron σ c 5 . At step t + 3, neuron σ c 5 fires, sending a spike to neurons σ r and σ c 6 by rules − /a ⟶ a; − and − /a ⟶ a; + on synapses (C 5 , r) and (C 5 , C 6 ). en, there are two spikes in neuron σ r with a neutral charge and a spike in neuron σ c 6 . At step t + 4, rule − /a 2 ⟶ a; − is applied via synapse (r, C 7 ), and a spike is sent to neuron σ c 7 from neuron σ r . Simultaneously, neuron σ c 8 receives a spike from neuron σ c 6 by rule +/a ⟶ a; 0 on synapse (C 6 , C 8 ). Meanwhile, neuron σ c 6 sends a positive charge to neurons σ r and σ c 3 , restoring their initial states. At step t + 5, neuron σ l k receives two spikes from neurons σ c 7 and σ c 8 via rule − /a ⟶ a; 0 on synapses (C 7 , l k ) and (C 8 , l k ). In this way, system Π simulates the instruction l k . e simulation of the SUB instruction l i : (SUB(r), l j , l k ) is correct: system Π starts with neuron σ l i having two spikes inside and ends with sending two spikes and a neutral charge to neuron σ l j (if the number located in register r is greater than 0, the register r is decreased by one) or sending two spikes and a neutral charge to neuron σ l k (if the number located in register r is 0).
Obviously, there is no interference between the ADD and SUB modules, but interferences exist between two SUB modules. If there are two SUB instructions l s acting on register r, neurons σ c 4 and σ c 7 associated with register r send synapses to neurons σ s 3 and σ s 4 , respectively. In the SUB module associated with l s (l s ≠ l i ), when we simulate a SUB instruction l i : (SUB(r), l j , l k ), all neurons except neurons σ s 3 and σ s 4 receive no spikes and charges.
It is important to note that the synapses and their rules associated with neurons σ s 3 and σ s 4 are not shown in Figure 2; for example, neurons σ s 3 and σ s 4 exist between any two subtraction modules, and the rule +/a ⟶ λ; 0 is present on the synapse of such two neurons, respectively. Neurons σ s 3 and σ s 4 only consume spikes and restore neutral charge, not affecting other neurons' states. Moreover, the synapses of neurons σ s 3 and σ s 4 may be connected to any neuron in the environment or neurons related to SUB instruction l s ; that is to say, the synaptic connections between neuron σ s 3 (or σ s 4 ) and other neurons cannot be described in Figure 2.
When n > 0 spikes are present in neuron r, neuron σ c 4 sends a spike and a neutral charge to neuron σ s 3 ; therefore, neuron σ s 3 fires, rule +/a ⟶ λ; 0 (not shown in Figure 2) is enabled, then one spike a is forgotten, and neuron σ s 3 returns to the initial state. If no spike exists in neuron r, neuron σ s 4 receives a spike and a neutral charge from neuron σ c 7 , rule +/a ⟶ λ; 0 is enabled, and one spike a is forgotten. Next, neurons σ s 3 and σ s 4 return to their initial state with respect to the initial number of spikes. Consequently, there is no interference between the SUB modules.
FIN module: outputting the result of the computation. As shown in Figure 3, the FIN module is constructed. Assume that the computation halts; in other words, the halt instruction l h is reached and the result of the computation is stored in register 1 (register 1 contains n spikes). Neuron σ l h receives two spikes and a neutral charge at step t, rule 0/a 2 ⟶ a; 0 on synapse (l h , C 2 ) is activated, and neuron σ l h sends a spike and a neutral charge to neuron σ c 2 . At that Complexity moment, neuron σ l h fires, sending a positive charge to neuron σ 1 via rule 0/a 2 ⟶ λ; + on synapse (l h , 1). Meanwhile, neuron σ c 1 receives a spike and a positive charge from neuron σ l h by rule 0/a 2 ⟶ a; + via synapse (l h , C 1 ). At step t + 1, neuron σ c 2 sends a spike and a neutral charge to neuron σ c 3 via synapse (C 2 , C 3 ) by rule 0/a ⟶ a; 0. Simultaneously, neuron σ 1 sends a spike and a positive charge to neurons σ c 1 and σ c 4 via rule +/a 2 ⟶ a; +. Meanwhile, rule +/a ⟶ a; − on synapse (C 1 , C 4 ) is enabled, and neuron σ c 4 receives a spike and a negative charge from neuron σ c 1 .
At that moment, a positive charge and a negative charge meet in neuron σ c 4 , which therefore has a neutral charge and two spikes. At step t + 2, rule 0/a ⟶ a; 0 on synapse (C 3 , out) is applied, and a spike is sent from neuron σ out . Meanwhile, neuron σ c 4 fires, sending no spike and a neutral charge to neuron .σ c 5 via rule 0/a 2 ⟶ λ; 0 on synapse (C 4 , C 5 ). At step t + 3, rule 0/a ⟶ a; 0 is applied, and neuron σ out sends the first spike to the environment. At the same time, neuron σ c 4 receives two spikes from neurons σ 1 and σ c 1 .
From step t + 3 to step t + n + 1, the spike of neuron σ 1 is exhausted by rule 0/a 2 ⟶ λ; 0 on synapse (C 4 , C 5 ). At step t + n + 1, neuron σ c 4 receives a spike and negative charge from neuron σ c 1 . en, neuron σ c 4 , which now has a negative charge, sends a spike and a neuron charge to neurons σ out and σ c 5 by rule − /a ⟶ a; 0 on synapses (C 4 , out) and (C 4 , C 5 ) at step t + n + 2. At step t + n + 3, neuron σ c 5 fires, sending a negative charge via synapses (C 5 , 1) and (C 5 , C 1 ) and restoring the initial state of charge. Meanwhile, neuron σ out sends the second spike to the environment by rule 0/a ⟶ a; 0. Hence, the interval at which two spikes are sent to the environment by the system Π is (t + n + 3) − (t + 3) � n, where n is exactly the number stored in register 1, i.e., corresponding to the result computed by system. erefore, the register machine M is correctly simulated by the system Π, N(M) � N 2 (Π).
Proof. A PSNRS P system Π ′ , working in the accepting mode, is constructed to simulate a deterministic register machine M � (m, H, l 0 , l h , I). e system Π ′ contains an INPUT module, a deterministic ADD module, and a SUB module. e INPUT module is shown in Figure 4. Spike train 10 n− 1 1 is introduced into Π ′ by means of neuron σ in . In this system, the time interval of the first two spikes introduced by the INPUT module is used as the computing result.
At step t, we suppose that neuron σ in receives the first spike from the environment. Neuron σ in fires, sending a spike and neutral charge to neuron σ in 1 via rule 0/a ⟶ a; 0 on synapse (in, in 1 ). At the same step, rule 0/a ⟶ a; − is applied on synapses (in, in 5 ) and (in, in 6 ). A spike is sent to neurons σ in 5 and σ in 6 , and their polarity is changed to a negative charge. Similarly, neurons σ in 4 and σ in 7 receive one spike and a neutral charge from neuron σ in via rules 0/a ⟶ a; 0 (corresponding to synapses (in, in 4 ) and (in, in 7 )). At step t + 1, neurons σ in 2 and σ in 3 receive a spike and neutral charge from neuron σ in 1 , respectively. Meanwhile, neuron σ in 5 fires, rule − /a ⟶ a; 0 is applied on synapses (in 5 , in 6 ) and (in 5 , 1), and neurons σ in 6 and σ 1 receive a spike and a neutral charge from neuron σ in 5 , respectively. Similarly, neurons σ in 5 and σ 1 receive a spike and a neutral charge by rule − /a ⟶ a; 0 on synapses (in 6 , in 5 ) and (in 6 , 1). From step t + 1 on, neurons σ in 5 and σ in 6 exchange one spike with each other, and neuron σ 1 receives two spikes in each step. In this case, at step t + n − 1, neuron σ in receives the second spike from the environment. en, neurons σ in 4 , σ in 5 , σ in 6 , and σ in 7 receive the second spike and accumulate two spikes. Note that neuron σ 1 still receives spikes at step t + n, and there are 2n spikes in neuron σ 1 , which represents the number stored in register 1 of M.
At the same step, neurons σ in 4 and σ in 7 send a positive charge to neurons σ in 5 and σ in 6 , respectively, restoring their original states of charge. Meanwhile, neurons σ in 2 and σ in 3 have spikes according to rule 0/a ⟶ a; 0 on synapses (in 1 , in 2 ) and (in 1 , in 3 ). At step t + n + 1, the spikes in neurons σ in 5 and σ in 6 are depleted by rule 0/a 2 ⟶ λ; 0 on synapses (in 5 , 1) and (in 6 , 1).
At the same step, neuron σ l 0 receives two spikes and a neutral charge from neurons σ in 2 and σ in 3 by rule 0/a 2 ⟶ a; 0. In this way, neuron σ l 0 receives two spikes and the system simulates the initial instruction l 0 of M.
For a deterministic ADD instruction of the form l i : (ADD(r), l j ), the corresponding ADD module shown in Figure 5 is simpler than that shown in Figure 1. Hence, we do not consider the details here.
In system Π ′ , the SUB module remains unchanged as shown in Figure 2, and neuron σ l h remains in the system; however, the FIN module is removed. ere is no rule in neuron σ l h . When neuron σ l h receives two neurons and no rules are available, the computation stops. e computing result introduced is (t + n + 1) − (t + 1) � n, which means that the number accepted by system Π ′ is n. e operation process of INPUT module is shown in Table 1.
According to the above description, the register machine M working in accepting mode can be correctly simulated by PSNRS P systems. Hence, the eorem holds.

A Small Universal PSNRS P System
In this section, a small universal PSNRS P system of computing device is constructed. Generally, a register machine M is used to compute a Turing computable function f: N k ⟶ N in the following way: arguments n 1 , n 2 , . . . , n k are introduced by the specified registers r 1 , r 2 , . . . , r k (representing the first k registers). We begin with the first instruction with label l 0 and stop with the halt instruction with label l h (if we stop), and then the value of the function is stored in a specific register r t ; beyond that, all other registers are empty. For further information about universal register machines for computable functions, readers can refer to [34].
In the following proof of the universal result, we use a specific universal register machine mentioned in [34], as shown in Figure 6. e universal register machine is of the construct M u � (8, H, l 0 , l h , I), where there are 8 registers, numbered from 0 to 7, and 23 instructions; the last instruction is the halting one. As defined in [34], the input numbers are introduced in registers 1 and 2, and the result is stored in register 0 when the machine M u halts.
According to the previous description, subtraction instructions are not allowed on the registers where the results are stored, but register 0 of M u is subject to SUB instructions. erefore, register machine M u is modified into M u ′ : a register with label 8 is added, and the halting instruction l h of M u is replaced by the following instructions:  In this way, the universal register machine M u ′ has 9 registers, 24 ADD and SUB instructions, and 25 labels. e result of the computation is stored in register 8, which is never decremented during the computation. Furthermore, the register machine M u ′ can be considered deterministic, and, without losing Turing completeness, the ADD instructions l i : (ADD(r), l j , l k ) having l j � l k is denoted by the form l i : (ADD(r); l j ). Step Neurons active Rules executed Synapses t in, 0, a 0/a ⟶ a; 0 (in, − /a ⟶ a; 0 (in 6 , in 5 ) − /a ⟶ a; 0 (in 6 , 1) in 4 , +, a +/a ⟶ λ; + (in 4 , in 5 ) in 7 , +, a +/a ⟶ λ; + (in 7 , in 6 ) t + n + 1 in 2 , 0, a 2 0/a 2 ⟶ a; 0 (in 1 , l 0 ) in 3 , 0, a 2 0/a 2 ⟶ a; 0 (in 1 , l 0 ) in 5 , 0, a 2 0/a 2 ⟶ λ; 0 (in 5 , 1) in 6 , 0, a 2 0/a 2 ⟶ λ; 0 (in 6 , 1)

Complexity
Assume that, at step t, the neuron σ l h ′ gets two spikes, rule 0/a 2 ⟶ a; 0 on synapse (l h ′ , 8) is used, and neuron σ 8 receives a spike and a neutral charge. en, there are 2n + 1 spikes in neuron σ 8 , it fires, using rules 0/a 3 ⟶ a; 0 on synapses (8, out) and (8, C 1 ), and a spike and one neutral charge are sent to neurons σ out and σ c 1 . en, neuron σ c 1 sends a spike and neutral charge to neurons σ 8 and σ out , so neuron σ out emits a spike and neutral charge out by rule 0/a 2 ⟶ a; 0, until n spikes are sent out. Note that neuron σ 8 and neuron σ c 1 exchange a spike and neutral charge with each other, ensuring that neuron σ out can emit all the results of computation for system M u ′ . erefore, according to the above INPUT module, deterministic ADD module, SUB module, and OUTPUT module, we have used the following: without any other instruction addressing the label l 21 , can be simulated by the module shown in Figure 10. en, three neurons associated with label l 21 can be saved. ere are also two pairs of ADD-SUB instructions: l 5 : ADD(5), l 6 , l 6 : SUB(7), l 7 , l 8 , l 9 : ADD(6), l 10 , l 10 : SUB(4), l 0 , l 11 .

(4)
Each sequence of ADD-SUB instructions, l i : ADD r ′ , l g , l g : SUB r ″ , l j , l k , (5) can be simulated by the ADD-SUB module shown in Figure 11. In this way, we save the 6 neurons associated with labels l 6 and l 10 .
A similar operation is possible for the following six sequences of SUB-ADD instructions:   Each sequence of ADD-SUB instructions, l g : SUB r ″ , l j , l k , l i : ADD r ′ , l g , can be simulated by the SUB-ADD module given in Figure 12. In this way, we save 18 neurons associated with labels l 1 , l 5 , l 7 , l 9 , l 16 , l 22 . erefore, by using the ADD-ADD module, ADD-SUB module, and SUB-ADD module, we can totally save 27 neurons (3(ADD-ADD) + 6(ADD-SUB) + 18(SUB-ADD)). en, the number of neurons can be decreased from 178 to 151.

Conclusions and Remarks
A variant of SN P systems, called SN P systems with polarizations and rules on synapses (PSNRS P systems), is proposed. We prove that as number generating devices and accepting devices, SN P systems with polarizations and rules on synapses are Turing universal. Moreover, a small universal system with 151 neurons as computing function device is given. Compared with the small universal SN P systems with polarizations proposed in [47], by moving rules to synapses, 13 neurons were reduced.
In the proof of eorems 1 and 2, only standard spiking rules are used. It is interesting to use extended rules to construct universal systems with fewer neurons. In this work, PSNRS P systems are used as number generating or accepting devices. It is of interest to investigate the computation power of PSNRS P systems as language generators or to control language generators.
In general, some open problems about PSNRS P systems may be considered based on the results obtained in this work; for instance, it remains open whether the results about the universality of PSNRS P systems still hold with fewer neurons. e PSNRS P systems proved to be universal when using both spiking rules and forgetting rules; it is challenging to investigate whether PSNRS P systems are still universal when using only one type of rules. In this work, the systems work in the synchronous mode. It is of interest to study the computation power of PSNRS P systems working in asynchronous mode [51] or local synchronous mode [52].

Data Availability
No data were used to support this study.

Conflicts of Interest
e authors declare that they have no conflicts of interest.