A 4 : 1 unequal Wilkinson power divider using microstrip artificial transmission lines (ATLs) is proposed. For the ATL, a series of meandered-line inductors, parallel-plate capacitors, and interdigital capacitors are employed. The designed power divider is composed of three ATLs, and a method has been proposed using technology of ATLs and double-sided parallel-strip lines (DSPSLs) to design line of high characteristic impedance. Microstrip line with very high characteristic impedance of over 150 Ω has been achieved by this method, which cannot be easily achieved by conventional transmission lines because of comparably thin conductor width. The fabricated 4 : 1 unequal power divider has good operational performance and occupies 55.3mm×37.8 mm, which is only about 40% of area compared to a conventional one at 0.9 GHz.
National Natural Science Foundation of China61401054Scientific and Technological Research Program of Chongqing Municipal Education CommissionKJ14004171. Introduction
Power dividers are widely used as one of the key components in various microwave applications for power allocation and synthesis. Wilkinson power divider is widely used due to its high return loss and isolation as well as low insertion loss by structure of simplicity. However, a conventional Wilkinson power divider has weakness in size, because it is composed of quarter wavelength transmission lines. In addition, for a 4 : 1 unequal Wilkinson power divider, high impedance line of 158.1 Ω is difficult to be achieved by conventional microstrip transmission line.
Recently, one type of artificial transmission line (ATL) has been proposed which can equivalently achieve arbitrary characteristic impedances and electrical lengths of the conventional transmission lines [1]. The ATL is easy to design and adjusts electrical parameters and reduces the dimension of circuits significantly, especially at low frequency band. The ATL is useful to achieve various microwave components, such as branch-line couplers [2], antennas [3], and baluns [4]. However, there are still some problems to use ATLs for miniaturized circuit design, especially when designing high impedance transmission lines, which limits the application of ATLs. Although several power dividers with artificial transmission lines have been proposed [5], they did not involve the implementation of high impedance lines.
In this paper, in order to achieve high impedance transmission line, an ATL with double-sided parallel-strip lines (DSPSLs) has been proposed. In order to further miniaturize size of 4 : 1 unequal Wilkinson power divider, other two sections of ATLs are used to take place of conventional microstrip transmission lines. Simulated and measured results agree well with each other and the measurements show good performance.
2. <italic>N</italic> : 1 Unequal Wilkinson Power Dividers
Topology of N : 1 unequal Wilkinson power divider is shown in Figure 1, and R2, R3 are loaded impedances of output ports 2 and 3, while Rint is isolation impedance [6–8].
Topology of N : 1 unequal Wilkinson power divider.
When output power of output port 2 is k2 times (k2=N) of port 3, lengths of branch arm 2 and branch arm 3 of power divider are quarter wavelength, respectively, and their characteristic impedances can be expressed as (1)Z2=Z01+k2k3,Z3=Z0k1+k2.
The loaded impedances of output ports R2 and R3 are calculated as (2)R2=Z0k,R3=kZ0.
The isolation impedance Rint can be obtained by(3)Rint=Z01+k2k.All characteristic impedances of the microstrip lines, isolation resistors, and loads at output ports with respect to N are given in detail in Table 1 with the notations marked in Figure 1.
Characteristic impedances, isolation resistances, and loads of an N : 1 unequal Wilkinson power divider.
N
Z2Ω
Z3Ω
RintΩ
R2Ω
R3Ω
2
51.5
103.0
106.1
35.4
70.7
3
43.9
131.6
115.5
28.9
86.6
4
39.5
158.1
125.0
25.0
100.0
5
36.6
183.1
134.2
22.4
111.8
6
34.5
207.0
142.9
20.4
122.5
In actual practice, the loaded resistors R2 and R3 are, respectively, replaced by impedance transformers with impedances Z4, Z5 connecting to Z0 in order to be implemented and tested easily. Therefore, the topology can be redrawn in Figure 2, and the impedances of Z4 and Z5 can be determined by (4)Z4=Z0k,Z5=Z0k.Consequently, for a practical unequal 4 : 1 power divider, Z4=35.4 Ω, Z5=70.7 Ω, Z2=39.5 Ω, Z3=158.1 Ω, and Rint=125 Ω as shown in Table 1.
Topology of N : 1 practical Wilkinson unequal power divider.
3. Theories of ATLs and DSPSLs3.1. Analysis of ATLs
The concept of ATL was proposed by Wang et al. [1], which is composed of a series of microstrip meandered-line inductors, parallel-plate capacitors, and interdigital capacitors. The physical structure and lumped-element equivalent circuit of a section of ATL are shown in Figure 3, respectively. Comparing to conventional microstrip transmission lines, using ATLs can achieve much smaller size of microwave components, especially at low frequency band. For a unit of ATL the characteristic impedance Zc and guided wavenumber βg can be expressed by (5)Zc=LtotCtot,βg=ωLtot·Ctot,where ω is the operating angular frequency. Ltot is the total series inductance of the equivalent lumped inductors, while Ctot is the total shunt capacitance of the equivalent lumped capacitors. Therefore, Ltot and Ctot can be given by(6)Ltot=L1+L2+L3,Ctot=Cl1+Cl2+Cl3+Cl4+Cp1+Cp2+Cp3+Cp4+Cs1+Cs2+Cs3+Cs4.
Unit cell of ATL.
Physical structure
Lumped-element equivalent circuit
From (5) we can find that when Ltot and Ctot changed proportionally, only the guided wavenumber βg would change while characteristic impedance Z0 remains the same value. Consequently, by increasing guided wavenumber βg, the physical length of demanded microstrip ATL is reduced comparing to structures of conventional microstrip transmission line, especially when operating frequency is in low frequency band.
Based on the above analysis of ALT, the design procedure can be described as follows.
Step 1.
From (6), the total series inductance values and shunt capacitance values can be calculated to achieve the required characteristic impedance and phase shift.
Step 2.
To extract the equivalent inductance and capacitance values, each element is simulated by the EM full-wave simulation software of IE3D and converted to their corresponding the π- or T-equivalent circuits.
Step 3.
The capacitance values can be optimized by tuning the fingers of interdigital capacitors or by adjusting the occupied area of parallel-plated capacitors, while the inductance values can be adjusted by tuning the length or width of meandered-lines. However, the dimensions of the lines still need fine-tuning when considering parasitic couplings between those elements.
3.2. DSPSLs and Conversion Circuit
DSPSL is balanced transmission line, and its basic structure is constituted of parallel metal transmission lines on both surfaces of the dielectric substrate [9–11]. Its three-dimensional view is shown in Figure 4. In fact, DSPSL can be equivalent to two microstrip lines sharing a common ground plane back to back, and the two microstrip lines have metal strips with the same width. Therefore, the relationship for impedance of DSPSL and microstrip line could be expressed by(7)Zc,DSPSL=2Zc,MS,where Zc,DSPSL represents characteristic impedance of DSPSL and Zc,MS is characteristic impedance of microstrip line with the same metal-strip width, half height of dielectric substrate.
Three-dimensional DSPSL.
When balanced circuit of DSPSL is applied to unbalanced circuit of microstrip transmission line, circularly tapered conversion circuit is used as shown in Figure 5, since circularly tapered metal line on bottom surface is smoother and discontinuity is less than conversion circuits with other shapes. For DSPSL with characteristic impedance of 50 Ω, its width is 3.5 mm, while the width of microstrip line is 2.7 mm on a F4B-2 substrate with relative permittivity εr=2.65 and height h=1 mm at the operating frequency of 0.9 GHz. As shown in Figure 6, the simulated results by IE3D software demonstrate that with different radii the performances of circularly tapered conversions are not very different in insertion losses and return losses. Consequently, radius R=5 mm is chosen for circularly tapered conversion circuit when taking circuit size into consideration. On the occasion, the bandwidth is from 0 GHz to 10.8 GHz, and in the band the insertion loss is less than 0.5 dB while the return loss is more than 19 dB.
Circularly tapered conversion circuit.
S-parameters of circularly tapered conversion.
3.3. Implementation of High Characteristic Impedance Line
The implementation of 158.1 Ω line would encounter too narrow line to fabricate if using microstrip transmission line or ATL. To solve the problem, based on the analysis mentioned above, a transmission line of 158.1 Ω is achieved using DSPSL and ATL as shown in Figure 7. At the two ends of the transmission line, circularly tapered conversions with 5 mm radius are adopted. And the ATLs on the top and bottom surface are perfectly symmetrical without any stagger in the vertical direction.
Proposed transmission line of 158.1 Ω.
Top
Bottom
Simulated s-parameters of proposed 158.1 Ω transmission line are shown in Figure 8, while simulated impedance is shown in Figure 9. It shows that phase shift is 89.91 degree at the operational center frequency of 0.9 GHz, while S11=-43.96 dB, S21=-0.10 dB, Re(Zc)=158.17 Ω, and Im(Zc) = 0.99 Ω. It is concluded that the transmission line has good performance for designing components.
Simulated s-parameters of proposed 158.1 Ω transmission line.
Simulated impedance of proposed 158.1 Ω transmission line.
4. Circuit Design and Measurements
A full-wave EM simulation software of IE3D is used in performing the design of 4 : 1 unequal power divider which has been implemented on a F4B-2 substrate with relative permittivity εr=2.65 and height h=1 mm. The technology combining DSPSL and ATL is applied for designing the transmission line of 158.1 Ω, while other sections of transmission lines are achieved by conventional ATLs or transmission line. As a result, all the optimized specific parameters of ATLs of proposed power divider are shown in Table 2 with the notations marked in Figure 3(a).
Dimensions of ATLs of proposed power divider (unit: mm).
Impedance
l_{1}
l_{2}
l_{3}
l_{4}
l_{5}
l_{6}
w1
w2
w3
w4
s_{1}
s_{2}
158.1 Ω
1.5
3
7.8
5.5
5.5
7.8
0.6
0.2
0.2
7.4
0.3
1.6
35.4 Ω
4
3
13.6
1.5
1.5
4.5
5.7
0.6
0.6
14.9
1.8
0.6
70.7 Ω
4.1
2.8
9
4.1
4.2
6.4
1.6
0.4
0.6
8.7
0.7
0.7
The photo of the fabricated unequal power divider is shown in Figure 10, and circuit size is 55.3mm×37.8 mm, that is 0.25λg×0.17λg, where λg is guided wavelength on the substrate at 0.9 GHz. Comparing to a power divider implemented by conventional microstrip lines, the occupied area of fabricated power divider is about 40%.
Photo of fabricated 4 : 1 unequal power divider.
Top
Bottom
The simulated and measured results of proposed 4 : 1 unequal Wilkinson power divider are shown in Figure 11. Figure 11(a) shows that at the center frequency of 0.9 GHz the return loss is nearly 35 dB. The bandwidth is from 0.62 GHz to 1.18 GHz when return loss is more than 10 dB. At 0.9 GHz, the insertion losses of output port 2 and port 3 are 1.17 dB and 7.37 dB, respectively. As shown in Figure 11(b), the return loss of port 2 in the range of bandwidth is above 10 dB and more than 12.4 dB for port 3, proving that the power divider is well matched at output ports. The isolation between output ports 2 and 3 is more than 15.3 dB in the range of bandwidth, as shown in Figure 11(b). Moreover, as shown in Figure 11(c), in bandwidth output differential magnitude (S21-S31) is 6.02dB±0.53 dB, and output differential phase (AngS21-Ang(S31)) is within ±5.1 degree. Between 0.62 GHz and 1.18 GHz, the measured power split ratio is close to 4 : 1 at port 2 and port 3 with excellent impedance matching and isolation, and at 0.9 GHz the power split ratio is 4.17, as shown in Figure 11(d). In conclusion, there is a good agreement between the simulated and measured results, and the measured results demonstrate an excellent performance as 4 : 1 unequal power divider.
Simulated and measured results of 4 : 1 unequal power divider.
Return losses and insertion losses
Return losses of output ports and isolations
Differential magnitude and phase of output ports
Output power split ratio of port 2 to port 3
The performance of this proposed power divider (this work) is compared to several previous designs in Table 3. The power divider in this work has similar electrical performance with the other power dividers but with small size, and it totally solves the problem of high impedance line. The power divider proposed in reference [12] has a similar performance to our work with high impedance of 158.1 Ω, and a very narrow meandered-line with 0.2 mm width is used to approximate to the high impedance. However, by this approach the narrow meandered-line could not realize the transmission line of 158.1 Ω designed on substrate with higher relative permittivity or thickness, and it could not achieve line with higher impedance. But this proposed method to design high impedance line in this work can design transmission lines with even much higher characteristic impedance.
Performance comparison of 4 : 1 unequal power divider.
Size
S11 15 dB BW (%)
S21(dB)
S31(dB)
ΔΦ (°)
Resistor number
Solve high impedance
[12]
0.13λg×0.23λg
0.3
1.3±0.5
7.4±0.5
±4
1
No
[13]
0.30λg×0.77λg
0.5
1.5±0.5
7.5±0.5
±6.1
3
Yes
This work
0.17λg×0.25λg
0.3
1.2±0.4
7.3±0.5
±5.1
1
Yes
ΔΦ, phase difference.
5. Conclusions
A miniaturized 4 : 1 unequal Wilkinson power divider has been designed and experimentally verified adopting ATLs, and 158.1 Ω transmission line is achieved by using DSPSL and ATL. The proposed design approach of high impedance using DSPSL and ATL can design even much higher impedance lines with compact size and good performance. The proposed power divider using the design approach achieved 4 : 1 power split ratio at 0.9 GHz, with bandwidth from 0.62 GHz to 1.18 GHz. And in the bandwidth, the power divider shows good performance in return losses, insertion losses, isolations, and so on. These results demonstrate that the miniaturized 4 : 1 power divider is highly suited for wireless communication applications, which require compact structures. And the method combining of ATL and DSPSL has good prospects in designing microwave circuit.
Conflicts of Interest
The authors declare that they have no conflicts of interest.
Acknowledgments
This work was supported by National Natural Science Foundation of China (61401054) and Scientific and Technological Research Program of Chongqing Municipal Education Commission (KJ1400417).
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