International Journal of Photoenergy

Volume 2012 (2012), Article ID 147250, 6 pages

doi:10.1155/2012/147250

Research Article

Effect of Processing Parameters on Thickness of Columnar Structured Silicon Wafers Directly Grown from Silicon Melts

Jin-Seok Lee, Bo-Yun Jang, and Young-Soo Ahn

Korea Institute of Energy Research, Daejeon 305-343, Republic of Korea

Received 31 August 2011; Accepted 4 November 2011

Academic Editor: C. W. Lan

Copyright © 2012 Jin-Seok Lee et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

Abstract.

In order to obtain optimum growth conditions for desired thickness and more effective silicon feedstock usage, effects of processing parameters such as preheated substrate temperatures, time intervals, moving velocity of substrates, and Ar gas blowing rates on silicon ribbon thickness were investigated in the horizontal growth process. Most of the parameters strongly affected in the control of ribbon thickness with columnar grain structure depended on the solidification rate. The thickness of the silicon ribbon decreased with an increasing substrate temperature, decreasing time interval, and increasing moving velocity of the substrate. However, the blowing of Ar gas onto a liquid layer existing on the surface of solidified ribbon contributed to achieving smooth surface roughness but did not closely affect the change of ribbon thickness in the case of a blowing rate of  Nm³/h because the thickness of the solidified layer was already determined by the exit height of the reservoir.

1. Introduction

In the photovoltaic industry growing at rates exceeding 30% per year, crystalline silicon (Si) is the dominant photovoltaic material and accounts for approximately 90% of the total solar cell production [1]. However, the current bottleneck in crystalline Si photovoltaics due to the shortage of Si feedstock increases Si prices and puts additional pressure on the fraction of wafer cost in the module [2].

The direct growth technology of Si ribbon wafer from the molten Si is one of the several routes for responding to increasing Si wafer consumption with almost 100% silicon usage. Technology with no kerf loss and high productivity can significantly lower manufacturing costs for solar cells [3]. The ribbon Si technologies are generally classified in two ways by the transport direction of the solidified ribbon with respect to the movement of the liquid-solid interface during crystallization: (i) liquid-solid interface moves in line with ribbon transport direction (also called vertical growth, e.g., edge-defined film-fed growth (EFG) and string ribbon (SR)); (ii) liquid-solid interface moves almost perpendicular to the ribbon transport direction (also called horizontal growth, e.g., ribbon growth on substrate (RGS)) [4]. Horizontal growth has much faster ribbon growth rate than vertical growth, finally leading to the effective production of silicon wafers with low manufacturing costs and high production rates, because thermal conduction through the directly contacted substrate is more efficient at heat removal from the ribbon.

In addition, one option to make a more efficient use of the Si materials in horizontal growth system is the use of thinner Si wafers. For instance, the total amount of Si used per decreases by about 20% when using 200 μm wafers instead of 300 μm wafers [5]. However, the effect of processing parameters such as preheated substrate temperatures, time intervals, moving velocity of substrates, and gas blowing rates on Si ribbon thickness has been rarely reported in order to achieve more effective Si usage in the horizontal growth process so far. The present investigation reports the experimental findings for processing parameters on the control of Si ribbon thickness in the horizontal growth process. These considerations will meet the demands for next-generation solar cell production with the optimum growth conditions for the desired thickness of the Si wafer.

2. Experimental Procedure

The system for the growth of columnar structured Si wafers shown in Figure 1 is separated into Si melting zones by induction coil and ribbon-type wafer growth zones in a vacuum chamber. After the Si (purity > 9N) in the melting zone is completely melted by heating to 1450°C at a pressure of 10⁻⁴ Torr, liquid Si is poured into the SiC-coated graphite reservoir positioned at the growth zone. As soon as liquid Si is solidified by releasing the latent heat through the SiC-coated graphite substrate preheated at a range of 700–1000°C and moved underneath the reservoir with a velocity of 315 ~ 926 cm/min after a certain amount of time (hereafter called time interval) at a range of 0.5–2.5 sec, then the solidified Si on the substrate moves away from the exit of the melt reservoir of 1 mm. At the moment, the blowing of Ar gas on a solidified wafer surface removed liquid Si residue at a flow rate of 0.5–1.1 Nm³/h, which improved the surface roughness of the Si wafer as a consequence. Dense SiC layer with thickness of around 50 μm and surface roughness of around 4 μm was coated on graphite substrate by commercially available chemical-vapor-reaction (CVR) method at 1700°C in vacuum, where the surface modification provided the advantage for preventing the carbon contamination from graphite remaining high thermal conductivity. The dimension of the Si wafer, especially the thickness, could be determined by the control of processing parameters such as substrate temperatures, time intervals, moving velocity of substrates, and gas blowing rates. Horizontal growth systems and experimental procedures of Si wafers are described elsewhere in detail [6].

Figure 1: Schematic diagram of a horizontal growth system for ribbon-typed Si wafers.

The thickness of as-grown Si wafers was measured by a sharp-tipped micrometer to be approximately 1mm without an additional polishing step, in which five measurements were carried out and averaged. The Si wafer was etched using a 10% KOH solution to measure the microstructures and defects of the wafer using a differential interference contrast optical microscope (BX60MF, Olympus, Japan).

3. Results and Discussion

The thickness of the ribbon-type silicon wafer grown in a horizontal growth system can be controlled by the shape and height of the reservoir exit if it is possible to perfectly engineer the liquid-solid interface in the reservoir. However, fine control of the liquid-solid interface only with the reservoir structure is very difficult in nature without considering processing parameters such as substrate temperatures, time intervals, moving velocity of substrates, and gas blowing rates. Therefore, this study aims to present a manner to control the thickness of columnar structured-silicon wafers horizontally and directly grown from silicon melts. The area for the growth interface of liquid-solid is now very large compared to the wafer thickness in the horizontal growth system. The latent heat of the silicon melt is extracted mainly by conduction through the substrate and also partially by radiation through the surface of the silicon melt. One of the reasons for the high productivity during the horizontal growth system is the ability of the substrate to dissipate heat through the bottom side that allows for better control of solidification, through the moving velocity and heat extraction rate [7]. Therefore, pull speed of the substrate and heat extraction on the substrate are important variables in optimum Si wafer production. Growth rates of 4–9 m/min in horizontal growth systems have been previously demonstrated [8].

Figure 2 shows the thickness variation of ribbon-type Si wafers depending on the substrate temperature preheated at the range of 700–1000°C at the constant time interval of 2.5 sec, moving velocity of the substrate of 485 cm/min, and blowing rate of Ar gas of 0.8 Nm³/h. Substrate temperature strongly relates to behaviors of heat extraction of solidified Si wafers. Even though the substrate is preheated up to 1000°C, the onset of solidification starts due to temperature differences between Si melt (~1414°C) and substrates. Solidification rate increases with decreasing substrate temperatures because of larger temperature differences. At the moment, the temperature of the melt can be more rapidly decreased by the heat extraction through the cold ceramic substrate. Therefore, higher substrate temperatures were beneficial to obtain thinner Si wafers, which could contribute to reduce the Si consumption.

Figure 2: Thickness variation of ribbon-type Si wafers depending on the substrate temperature preheated at the range of 700–1000°C at the constant time interval of 2.5 sec, moving velocity of the substrate of 485 cm/min, and blowing rate of Ar gas of 0.8 Nm³/h.

Assuming steady-state conditions, consideration of thermal flux during the growth of ribbon-type silicon wafers in the horizontal growth system is used to calculate the dependence of wafer thickness on the moving velocity of the substrate at a given temperature gradient between the silicon melt and substrate with (1) as follows [9]:

where is the moving velocity of the substrate (pulling speed), the effective coefficient of heat transfer, the length of the liquid-solid interface, the thermal conductivity of solid silicon, the wafer thickness, the density of solid silicon, the crystallization heat of silicon, the crystallization time, and the temperature gradient between the melt and substrate. The substrate temperature determines the and a lower substrate temperature increases the growth velocity according to the above equation. In this study, the temperature of liquid Si was > 1412°C when the melt was poured. Temperature differences, , were about > 400°C due to the substrate temperature pre-heated in the range of 700–1000°C. Note that wafer thickness, , can be easily controlled by operating if () is set at a constant moving velocity and the rest of the parameters such as , , , , , in the equation are fixed. Therefore, thickness, , decreases with the decreasing temperature gradient, , by fast solidification time.

In equipment for the growth of Si wafers in this study, the zone for the melting of Si materials and the zone for the growth of Si wafer are separated for the fabrication of more homogeneous wafer quality. Figure 3 shows the thickness variation of ribbon-type Si wafers depending on the time interval in the range of 0.5–2.5 sec at the constant substrate temperature of 1000°C, moving velocity of substrate of 485 cm/min and blowing rate of Ar gas of 0.8 Nm³/h. The thickness of the wafer increased with an increased time interval because a longer time interval allows for the increase of residence time in a reservoir filled with high-temperature melt, which allows for longer and slower growth time by increasing the solidification time. This is also supported by (1) which indicates that a longer time interval induces a longer crystallization time, , resulting in a thicker wafer. Slower growth occurring with increasing thickness of the wafer is due to the additional heat transport through the solidified silicon. As soon as silicon melts in the melting zone are poured into the reservoir, crystal growth begins on a cold (below silicon melting temperature) substrate underneath the reservoir. Then, the substrate, pre-heated up to a desired temperature, is continuously moved underneath the reservoir filled with silicon melts after a certain time interval. Once the thickness of the initial wafer is determined during the crystal growth with a certain time interval, the thickness of the following wafer by the movement of the substrate tends to depend on the thickness of the initial wafer. Therefore, the time interval is one of the important factors to control the thickness of ribbon-type silicon wafers especially in a continuous growth system.

Figure 3: Thickness variation of ribbon-type Si wafers depending on the time interval at the range of 0.5–2.5 sec at the constant substrate temperature of 1000°C, moving velocity of substrates of 485 cm/min, and blowing rate of Ar gas of 0.8 Nm³/h.

Figure 4 shows the thickness variation of ribbon-type Si wafers depending on the moving velocity of the substrate (pulling speed) at the range of 315–926 cm/min at a constant substrate temperature of 1000°C, time interval of 2.5 sec, and blowing rate of Ar gas of 0.8 Nm³/h. The lowest moving velocity of 315 cm/min in this study induced an excessively increased wafer thickness of 753 μm, but increasing moving velocity up to 926 cm/min drastically reduced the thickness of the wafer up to 145 μm due to decreasing the solidification time. However, defects such as pores were detected on the wafer surface in cases where the moving velocity exceeded above 926 cm/min. Compared to other silicon crystallization methods, the silicon crystal growth rate is very high, which is applicable to enhance a competitive price in the solar cell industry. The moving velocity essentially affects the residence time of the melt mass subject to the heat extraction rate through the substrate [7]. At low moving velocity, the longer residence time affords nearly complete solidification of the upper part of the silicon film. However, high moving velocity with a higher productivity encourages that a substantial portion of the upper layer of silicon wafer is still in liquid phase, which means that wafer thickness should be controllable by following the processing step such as the blowing of Ar gas onto the surface of liquid silicon film on solid silicon film.

Figure 4: Thickness variation of ribbon-type Si wafers depending on the moving velocity of substrates (pulling speed) at the range of 315–926 cm/min at the constant substrate temperature of 1000°C, time interval of 2.5 sec, and blowing rate of Ar gas of 0.8 Nm³/h.

From the results by Schönecker et al. [10], the initial crystal growth velocity is high in the beginning of the process but decreases rapidly. The reason is caused by the facts that (i) the substrate temperature is not constant during crystal growth, (ii) there is a finite heat transfer between liquid silicon and the substrate, which slows down the crystallization speed, and (iii) the silicon melt is most likely in turbulent flow, transporting heat from the hotter top surface of the melt to the liquid-solid interface. Therefore, the crystallization speed affecting wafer thickness is lower in reality, depending on system properties such as silicon-substrate properties, melt temperature, and melt flux behavior. It is very difficult to fabricate continuously grown wafers with uniform thickness with high reliability in the industrial field.

In order to solve the problem, the blowing system of Ar gas is employed in this study. Figure 5 shows the thickness variation of ribbon-type Si wafers depending on the blowing rate of Ar gas at a range of 0.5–1.1 Nm³/h at the constant substrate temperature of 1000°C, time interval of 2.5 sec, and moving velocity of substrates of 485 cm/min. Thickness was not reduced at the lowest blowing rate of 0.5 Nm³/h in this study because a low blowing rate is not sufficient to flatten the surface with a liquid portion. However, a blowing rate of more than 0.65 Nm³/h could considerably reduce the thickness compared to wafer thickness in the case of a blowing rate of 0.5 Nm³/h. Although there was an effect on the decrease of wafer thickness above 0.65 Nm³/h, thickness variation is not as large at the range of 0.65–1.1 Nm³/h. The solidification height (thickness of solid film) is determined at a certain time interval in the reservoir filled with silicon melts, in which solidification rapidly begins as soon as silicon melts make contact with cold substrate. The thickness of casted film (liquid film on solid film) is strongly dependent on the exit height of the reservoir. If the thickness of solid film is determined in the reservoir at a certain time interval before the casted film on the substrate moves to the blowing zone of Ar gas, thickness is no longer reduced to below the thickness of solid film in casted film even with a high Ar gas blowing rate. However, the step of Ar blowing was considerably effective on processing for thin wafers with smooth surface roughness if the melt layer remained on the surface of solidified wafer.

Figure 5: Thickness variation of ribbon-type Si wafers depending on the blowing rate of Ar gas at the range of 0.5–1.1 Nm³/h at the constant substrate temperature of 1000°C, time interval of 2.5 sec, and moving velocity of substrates of 485 cm/min.

Figure 6 shows optical microscope images for the surface and cross-section of as-grown ribbon-type silicon wafers at a substrate temperature of 1000°C, time interval of 2.5 sec, moving velocity of the substrate of 485 cm/min, and a blowing rate of Ar gas of 0.8 Nm³/h. While some grains are almost dislocation-free, others contain a high density of dislocations. Silicon wafers grown in a horizontal growth system usually have a high density of grain boundaries, dislocations, twins, and other intragrain defects because large thermal stresses are generated during rapid solidification and subsequent cooling [1]. The inhomogeneous distribution of dislocations is due to the fact that the thermal stress exceeds the critical shear stress only in some particular orientated grains. Grains with none or a low density of dislocations usually contain twin boundaries, while those with highly dislocated grains usually do not have twins. This means that twin planes act as barriers for dislocation propagation and contribute to the inhomogeneous distribution of dislocations across various grains [1]. A typical surface image (Figure 6(a)) of a wafer shows a mean grain size of around 150 μm and rather low densities of dislocation and twin through the consideration of processing parameters compared to previous reports [1]. However, subsequent steps for increasing grain size and stress relief in wafers are presumably necessary for improved efficiency of solar cells. A cross-sectional image (Figure 6(b)) typically indicates a columnar grain structure and smooth surface roughness by the blowing effect of Ar gas. Although there are relatively few grain boundaries in the up-and-down direction, it is expected that those columnar structures will induce an excellent result through current flows along the grain boundaries in the cells [11].

(a)

(b)

Figure 6: Optical microscope images for (a) surface and (b) cross section of as-grown ribbon-type silicon wafers at a substrate temperature of 1000°C, time interval of 2.5 sec, moving velocity of substrates of 485 cm/min, and blowing rate of Ar gas of 0.8 Nm³/h.

4. Conclusion

Processing parameters such as a pre-heated substrate temperature, time interval, moving velocity of substrates, and the gas blowing rate to control the thickness of the Si ribbon thickness were investigated for achieving more effective Si usage in the horizontal growth process. The substrate temperature strongly related to the change of ribbon thickness depending on the behavior of heat extraction of solidified the Si wafer. Higher substrate temperatures were beneficial to obtain thinner Si wafers, which could contribute to reduce the Si consumption. A longer time interval allows the increase of residence time in the reservoir, so that ribbon thickness increased by increasing the solidification time. The highest moving velocity of 926 cm/min in this study significantly reduced the thickness of wafers up to 145 μm, because the moving velocity essentially affects the residence time of the melt mass subject to the heat extraction rate through the substrate. The effect of Ar blowing was negligible if the thickness of solid film is determined in the reservoir. However, the step of Ar blowing was considerably effective on processing for thin wafers with smooth surface roughness. Processing conditions were established to grow the desired thickness of the Si ribbon with the columnar grain structure and smooth surface roughness in a horizontal growth process for low-cost solar cell application.

Acknowledgment

This work was supported by the New and Renewable Energy Technology Development Program of the Korea Institute of Energy Technology Evaluation and Planning (KETEP) Grant funded by the Korea Government Ministry of Knowledge Economy (no. 20103020010060).

References

J. Lu, G. A. Rozgonyi, and A. Schönecker, “Carrier lifetime limitation defects in polycrystalline silicon ribbons grown on substrate (RGS),” Materials Science in Semiconductor Processing, vol. 11, no. 1, pp. 20–24, 2008.

G. Hahn, S. Seren, M. Kaes et al., “Review on ribbon silicon techniques for cost reduction in PV,” in Proceedings of the IEEE 4th World Conference on Photovoltaic Energy Conversion, pp. 972–975, Hawaii, USA, May 2006.

J. P. Kalejs, “Silicon ribbons and foils—state of the art,” Solar Energy Materials and Solar Cells, vol. 72, no. 1-4, pp. 139–153, 2002.

K. Nakajima and N. Usami, Crystal Growth of Si for Solar Cells, Springer, 2009.

C. J. J. Tool, A. R. Burgers, P. Manshanden, and A. W. Weeber, “Effect of wafer thickness on the performance of mc-Si solar cells,” in Proceedings of the 17th European Photovoltaic Solar Energy Conference, Munich, Germany, 2001.

S. J. Ko, B. Y. Jang, J. S. Kim, Y. S. Ahn, and S. Nahm, “Polycrystalline silicon wafer fabricated by direct growth from liquid silicon,” Journal of the Korean Physical Society, vol. 57, no. 1, pp. 97–102, 2010.

H. M. Jeong, H. S. Chung, and T. W. Lee, “Computational simulations of Ribbon-Growth on substrate for photovoltaic silicon wafer,” Journal of Crystal Growth, vol. 312, no. 4, pp. 555–562, 2010.

R. O. Bell and J. P. Kalejs, “Growth of silicon sheets for photovoltaic applications,” Journal of Materials Research, vol. 13, no. 10, pp. 2732–2739, 1998.

H. Lange and I. A. Schwirtlich, “Ribbon Growth on Substrate (RGS)—a new approach to high speed growth of silicon ribbons for photovoltaics,” Journal of Crystal Growth, vol. 104, no. 1, pp. 108–112, 1990.

A. Schönecker, L. Laas, A. Gutjahr, P. Wyers, A. Reinink, and B. Wiersma, “Ribbon-growth-on-substrate: progress in high-speed crystalline silicon wafer manufacturing,” in Proceedings of the 29th IEEE Photovoltaic Specialists Conference, pp. 316–319, New Orlens, La, USA, May 2002.

H. Yamatsugu, H. Mitsuyasu, T. Takakura, et al., “Crystallization on dipped substrate wafer technology for crystalline silicon solar cells reduces wafer costs,” Photovoltaic International, 2008.