International Journal of Photoenergy
Volume 2015 (2015), Article ID 341032, 18 pages
http://dx.doi.org/10.1155/2015/341032

Research Article

Design, Development, and Analysis of a Densely Packed 500x Concentrating Photovoltaic Cell Assembly on Insulated Metal Substrate

Leonardo Micheli,¹ Nabin Sarmah,² K. S. Reddy,³ Xichun Luo,⁴ and Tapas K. Mallick¹

¹Environment and Sustainability Institute, University of Exeter, Penryn Campus, Penryn, Cornwall TR10 9FE, UK
²Department of Energy, Tezpur University, Tezpur, Assam 784 028, India
³Heat Transfer and Thermal Power Laboratory, Department of Mechanical Engineering, Indian Institute of Technology Madras, Chennai 600 036, India
⁴Department of Design, Manufacture and Engineering Management, Faculty of Engineering, University of Strathclyde, Glasgow G1 1XQ, UK

Received 14 May 2015; Accepted 28 July 2015

Academic Editor: Cheuk-Lam Ho

Copyright © 2015 Leonardo Micheli et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

Abstract.

The paper presents a novel densely packed assembly for high concentrating photovoltaic applications, designed to fit 125x primary and 4x secondary reflective optics. This assembly can accommodate 144 multijunction cells and is one of the most populated modules presented so far. Based on the thermal simulation results, an aluminum-based insulated metal substrate has been used as baseplate; this technology is commonly exploited for Light Emitting Diode applications, due to its optimal thermal management. The original outline of the conductive copper layer has been developed to minimize Joule losses by reducing the number of interconnections among the cells in series. Oversized Schottky diodes have been employed for bypassing purposes. The whole design fits the IPC-2221 requirements. The plate has been manufactured using standard electronic processes and then characterized through an indoor test and the results are here presented and commented on. The assembly achieves a fill factor above 80% and an efficiency of 29.4% at 500x, less than 2% lower than that of a single cell commercial receiver. The novel design of the conductive pattern is conceived to decrease the power losses and the deployment of an insulated metal substrate represents an improvement towards the awaited cost-cutting for high concentrating photovoltaic technologies.

1. Introduction

The basic idea behind the Concentrating Photovoltaics (CPV) is to reduce the cost of photovoltaic plants by replacing some of the expensive semiconductor material with a cheaper reflective or refractive material (such as a mirror or a lens) [1, 2]. This way the irradiance can be raised up to a few thousand times. The use of CPV contributes to reducing the materials and energy required for the fabrication of the PV cells [3], introducing a substantial benefit for the environment. Moreover, by decreasing the amount of photovoltaic material, the exploitation of more expensive and more efficient multijunction solar cells becomes cost-effective [4, 5]. These cells are particularly beneficial in systems achieving concentrations higher than 300 suns (high concentrating photovoltaic, HCPV) [6]. Multijunction cells are made of more than one semiconductive layer and those commercially available grant efficiencies between 37 and 42% [6], whereas a record efficiency of 46.0% has already been announced [7]. Multijunction cells are considered to be able to reach over 50% efficiencies in future terrestrial applications [8].

The IEEE defines a CPV receiver as “an assembly of one or more PV cells that accepts concentrated sunlight and incorporate the means for thermal and electric energy removal” [9]. The surface mounted components (such as cells, interconnectors, and diodes) are installed on the top surface of a conductive layer. The electrically conductive layer is usually not self-supporting so it has to be placed over a dielectric surface that provides both mechanical support and electric insulation. Copper is the most convenient conductive material, due to its good compromise between cost and performance. A printed circuit board (PCB) is a laminated material bonded with heat cured flame retardant epoxy resin and clad on either one or both sides with copper. PCBs are widely used in electronics, because of their high flexibility and relatively low cost. The laminate materials are primarily chosen to grant a structural strength to the board, but electrical properties (i.e., dielectric constant and electrical strength) and environmental properties (thermal expansion, glass transition) also have to be considered. Usually the laminated material is a low thermal conductive fiberglass, but it can be replaced with a metal baseplate. This way, the thermal management of the system can be enhanced and the board is referred to as an insulated metal substrate (IMS). IMSs have been developed for being used in LED (Light Emitting Diodes) applications, and they show a heat transfer management similar to that needed by high concentrating photovoltaic technologies [10]. IMSs are considered to be the best choice in applications where specific designs are needed, no matter the required quantity [11]. For these reasons, HCPV assembly manufacturers’ interest in IMS technology is increasing [10, 12–14]. Mabille and his group [12] have demonstrated that when exposed to accelerated aging tests, IMSs behave similarly to the direct bonded copper (DBC) boards, the most expensive substrates [15, 16] and the most widely used substrates in HCPV applications to date [17–20].

Despite the fact that a number of HCPV modules have been presented in the literature [21–23], no reference has been found detailing their designing and development. This paper focuses instead on a new insulated metal substrate-based 144-cell assembly for 500x HCPV applications. The aim of the work has been to produce an efficient and innovative receiver, by introducing an original, scalable, low-resistance pattern for the conductive layer and by enhancing the thermal management through analytical investigations and simulations. After a brief description of the whole HCPV system where the presented assembly will be installed, the selection of the components is described. Particular care is given to prove the reliability of the substrate. Following, the design of the electrical circuitry is described and the predictions on the electrical losses are also reported. In conclusion, the results of the indoor characterization are detailed.

2. System and Components

2.1. The Concentrating Photovoltaic System’s Configuration

This work is carried out as part of the BioCPV project [24]. The objective of the project is to develop and to integrate highly efficient solar, biomass, and hydrogen energy technologies to produce noninterrupting power supplies to the rural communities. The assembly presented in this paper is a component to be used in the eight 500x HCPV units designed for this project. Each HCPV unit counts a primary concentrator and a receiver, as represented in Figure 1. The receiver consists of the reported 144-cell assembly, a 4x secondary concentrator and an active cooling system. The primary 125x and the secondary 4x optics result in an overall geometric concentration of 500x: a summary of the concentrator specifications is reported in Table 1.

Table 1: Concentrator specifications.

Primary concentrator
Secondary concentrator

Geometric concentration ratio
125x
Geometric concentration ratio
4x

Aperture area
3 m 3 m
Cell side aperture area
10 mm 10 mm

Rim angle
20°
Acceptance angle
30°

Focal length ()
3.37 m
Length of CPC
25 mm

ratio
0.794
Length of homogenizer
10 mm

Figure 1: Schematic of the system configuration and particular of the receiver.

The 125x primary concentrator is a parabolic dish with square opening and is made up of four sections to achieve an entry aperture area of 9 m². The parabola has a focal length of 3.37 m and is truncated considering a rim angle of 20°. The 3 m × 3 m primary reflector focuses the light onto a 26.8 cm × 26.8 cm surface of the receiver. The secondary concentrator is made of 144 three-dimensional compound parabolic concentrators (CPCs) with a square 2 cm × 2 cm entrance aperture and a square 1 cm × 1 cm exit aperture. The CPCs are arranged in a 12 × 12 array and each CPC reflects the light on a single solar cell. A 10 mm length homogenizer is placed at the exit of each CPC in order to uniform the irradiation on the cells. In Figure 2, the cross-sectional view of a 12-CPC array and the cross-sectional view of a single CPC with homogenizer are presented.

Figure 2: Cross-sectional view of the secondary optics.

Each plate is equipped with 144 cells and is rated at 2.6  under standard test conditions at 500x. A continuous tracking system allows the plates to follow the Sun and the cells to work at their maximum power point. An active, water-based cooling system is being developed to control the temperature of each receiver of the plant [25].

2.2. Components

2.2.1. Solar Cells

A set of 3C40 cells, provided by AZUR SPACE [26], is used in this application. These devices are 1 cm² sized GaInP/GaAs/Ge cells with efficiencies up to 37.2% at 500x, optimized to work between 200x and 800x. These cells are designed to generate a 6.587 A short-circuit current at 500x, with an open circuit voltage of 3.170 V. At their maximum power point they are expected to work at 18.6 W. The active area sizes are 10 mm × 10 mm. Two 0.45 mm width Au/Ag finished tabs are used as negative pole and are placed on the front edges of the cell: in the ideal case, the current generated is equally distributed between them. The whole back of the cell works as positive pole.

2.2.2. Bypass Diodes

Bypass diodes are essential in any PV applications to reduce the power losses from a series when at least one cell is shadowed and, at the same time, to prevent damages to the shaded cell itself [27]. In regular operation, the diode is reverse-biased and, in this conditions, only a small amount of leakage current flows through it. The device turns on when the cell is shaded and, then, the current bypasses the cell, which would act as an impedance and flows through the low-resistance diode.

In concentrating photovoltaic systems, it has been demonstrated that the installation of one bypass diode per cell maximizes the performances [28]: this configuration is then applied to improve the outputs of the presented plate. The Vishay V10P45S Schottky Rectifier is used in this assembly as it appears to be the best compromise between dimensions and performance. Schottky diodes are usually employed as bypass devices for multijunction cells: they have a lower forward voltage drop and, therefore, lower losses and lower temperature while in bypass operation than the one of the silicon diodes. Their application is commonly considered practical, economical, and efficient [29]. The diodes are usually oversized to reduce the voltage drops and to reduce the risk of breakage: diodes can easily break when working closer to the maximum rating [30]. A safety factor of at least 1.5 is usually applied (Table 2) from companies in their commercial assemblies. In some application, safety factors can rise up to 10 to achieve a most conservative approach [30].

Table 2: Comparison of the safety factors used by HCPV industries and in the developed system.

Company
Cell dimensions
mm mm
Max CR

Max cell current A
Number of diodes per cell
Maximum forward current per diode A
Safety factor

AZUR SPACE [17]

1000
13.088
2
10
1.53

Emcore [19]

1000
4.4
1
10
2.23

Spectrolab [18]

500
6.95
1
12
1.73

Ergonsolair [31]

500
2
1
10
5.00

500
4.5
1
10
2.22

500
7
1
12
1.71

University of Exeter

500
6.587
1
10
1.52

Taking into account the cell’s short-circuit current in the presented scheme (6.587 A), a 10 A Schottky diode grants an acceptable safety factor of 1.52. The peak repetitive reverse voltage is always higher than the cell voltage, even when a conservative safety factor is applied: the cell voltage is less than the 75% of the peak repetitive reverse voltage. Using two 10 A diodes would have enhanced the safety factor, but there is no space available to allocate them. The diodes applied in the systems are surface-mounted technologies, since they are cheaper than the discrete ones because they do not require any predrilled holes on the board [32].

3. The Substrate

The HCPV receivers are designed to maximize the extraction of electrical energy, to enhance the transfer of thermal energy, and to assure an adequate mechanical support. The choice of the geometry and the selection of the materials depend on many factors, such as the concentration and the cost, as well as the thermal management. In this case, the thermal behaviour of the substrate is taken into account: all the incoming energy that is not converted by the cells becomes heat and contribute to increasing the cell temperature. The PV cells are negatively affected by the increase in temperature, which cause drops in electrical efficiency and can lead to mechanical failures.

In this application, an active cooling is developed to dissipate the waste heat produced by the cell: the cell assembly is expected to be designed to optimize the heat transfer from the cell to the cooler. The most of the waste heat is removed from the cell by conduction [33]: the order and the properties of the materials of the substrate have to be opportunely designed to enhance the heat transfer towards the cooling system. For this reason, the conductive heat transfer of the cell assembly is modelled using the COMSOL’s “Heat Transfer in Solids” module, in order to predict the thermal behaviour of the system. The equations used in the simulation are reported in the next paragraph.

3.1. The Thermal Model: Equations and Conditions

The stationary pure conductive heat transfer equation is used to model the heat exchange between solids. The heat flux depends on the conductivity of the material and on the temperature gradient between the opposite surfaces . The conduction heat flux vector can be written as follows [34]:

The heat transfer in solids can be expressed through Fourier’s law [34, 35]:

where is the density, the specific heat capacity, the time, and the volumetric rate of heat generated. is the Laplace operator and expresses the heat fluxes in the three dimensions of an isotropic medium [36]. In Cartesian coordinates it is reported in the following form:

The steady-state temperature is not dependent on time and, then, . So (2) reduces to the Poisson equation [34]:

Taking into consideration the number of cells on the plate () and the volume of each cell (), the heat produced by all the cells of the receiver () can be expressed as

Some boundary conditions are set. All the media-facing surfaces are thermally insulated (6), with the exception of the backside of the prototype. A convective heat flux is introduced on the back surface of the heat sink to model the action of the cooling system or of the natural convection. Equation (7), based on Newton’s law of cooling [36], explains how this condition is modelled, taking into account the difference in temperature between the surrounding media and the surfaces of the board ( and , resp.) and requiring in input the value of the heat transfer coefficient (). This parameter describes the thermal properties of the convective exchange between a surface and the surrounding media and is influenced by different conditions such as the geometry of the surface and the properties and the motion of the fluid [37]. The solder paste and the thermal interface materials are modelled as thin thermally resistive layers. The heat fluxes across these layers are described in (8) and (9), where the and subscripts refer, respectively, to the upside and the downside of the layer. For thermally resistive layers, only the thermal conductivity () and the thickness () are required in input. Consider

3.2. Receiver Geometry and Substrate

In the first approach, a single-cell geometry is reproduced in the software environment (Figure 3): the solar cell (CC) is placed onto the copper layer (CuL), which is accommodated onto a 21 mm × 21 mm heat sink through a dielectric layer. The interconnectors (IC) are modelled as 0.025 mm thick silver tabs. The diode (Ds) is not considered in these thermal investigations, due to the small current flowing through it when the system is in operation. In this investigation, the copper pattern is inspired by the design of the commercial AZUR SPACE assembly, and the densely packed design is obtained by repeating the conductive patterns on the large aluminum board.

Figure 3: Front view and cross section of the single-cell receiver developed in COMSOL.

The simulations are conducted to predict the steady-state thermal behaviour of the receiver. Three different substrates are considered: a printed circuit board (PCB), a direct bonded copper (DBC), and an insulated metal substrate (IMS). The thicknesses of the layers are established on the basis of the commercially available products or references and are reported in Table 3.

Table 3: Thicknesses and materials for the modelled substrates.

Layer
PCB
DBC
IMS

Interconnectors
0.025 mm Ag
0.025 mm Ag
0.025 mm Ag

Cell
0.190 mm Ge
0.190 mm Ge
0.190 mm Ge

Solder paste
0.125 mm solder
0.125 mm solder
0.125 mm solder

Conductive layer
0.035 mm Cu
0.30 mm Cu
0.035 mm Cu

Dielectric
4.5 µm marble resin
0.63 mm AlN
4.5 µm marble resin

Heat sink
1.6 mm FR-4
0.30 mm Cu
1.6 mm Al

Reference
[38]
[39]
[40]

The COMSOL’s “Heat transfer” module, used in this simulation, requires three proprieties for each material: the thermal conductivity, the density, and the heat capacity at constant pressure. Wherever available, the COMSOL built-in materials are used, such as copper and aluminum. In other cases, the values are set according to external references (Table 4).

Table 4: Proprieties of materials (materials marked with are COMSOL built-in materials).

Materials
Thermal conductivity [W/Km]
Density [kg/m³]
Heat Capacity [J/kgK]

Aluminum nitride
285
3260
740

Aluminum
160
2700
900

Copper
400
8700
385

FR-4
1.7
1850
600

Germanium
60
5323
320

The solder pastes used in all the substrates and the marble resin, which acts as a dielectric in the considered PCBs and IMSs, are modelled as thin thermally resistive layers: for this function, COMSOL requires in input the thickness and the thermal conductivity only (Table 5).

Table 5: Conductivity and thickness of the thermally resistive layers.

Materials
Thermal conductivity [W/Km]
Thickness [mm]

Marble resin
3.0
0.0045

Solder paste
4.5
0.1250

No Joule heating is considered: as proved in [38], the raising in temperature due to the Ohmic losses is negligible. All the pictures show temperatures in Celsius degrees. The temperature distribution and the isothermal contours are represented: the scale gradually ranges from red, for high temperatures, to blue, for lower temperatures. The 3D rendering of the simulations is generally shown from either one or two views: a front view of the top surface and a lateral 3D view.

3.3. Selection of the Substrate

According to Royne et al. [41], a well dimensioned cooling system for densely packed HCPV receiver should have a thermal resistance lower than 10⁻⁴ Km²/W. Taking into account this value, the behavior of the three substrates was reported in [38]. The investigation predicted a maximum cell temperature ranging between 30 and 32°C for DBC and IMS, whereas the PCB was found to achieve nonacceptable peak temperatures. The values obtained by the model are below the HCPV cell operating temperature range [42, 43]. For this reason, in the present work, a lower thermal resistance is considered for a more realistic model.

The following simulations are conducted taking into account the Concentrator Standard Test Conditions (CSTCs) [44]: a 1000 W/m² DNI and an ambient temperature of 25°C. The cell is modelled as a heat source: considering the AZUR SPACE 3C40C cell’s peak-efficiency of 37.2% at 500x and an optical efficiency of 85%, an overall heat production of 26.7 W/cm² is predicted. The heat sink generally works at temperatures up to 25°C lower than that of the cell [45]: considering a max cell temperature of 100°C, the heat sink should not overtake temperatures of 75°C.

The minimum resistance per mass unit is then given as follows [41]:

where is the area of the thermal exchanging surface, is the temperature difference between the heat sink and the ambient, and is the heat produced by the cell. Considering that all the heat produced by the cell would reach the heat sink, a single-cell receiver with a 21 mm × 21 mm surface would require a minimum resistance of about 1250 Km²/W. For this reason, this value is then introduced in the model to simulate the action of the cooling system.

This second investigation confirmed that DBC and IMS behaved similarly in terms of heat removal, even in presence of a less performing cooler. The DBC achieved a maximum cell temperature of 75.6°C (Figure 5), whereas the IMS reached 73.8°C (Figure 6). In these conditions, instead, the temperature of a HCPV cell mounted on a PCB would overtake 200°C (Figure 4).

(a)

(b)

Figure 4: Temperature distribution (a) and isothermal contours (b) in the PCB based assembly, in °C. Max cell’s temperature: 204.7°C.

(a)

(b)

Figure 5: Temperature distribution (a) and isothermal contours (b) in the DBC based assembly, in °C. Max cell’s temperature: 75.6°C.

(a)

(b)

Figure 6: Temperature distribution (a) and isothermal contours (b) in the IMS based assembly, in °C. Max cell’s temperature: 73.8°C.

3.4. Full Scale Simulation

Similarly, a full scale simulation of the IMS-based receiver is conducted. A surface of 21 mm × 21 mm is left around of each cell. Each secondary concentrator requires a 20 mm × 20 mm entry aperture to achieve a 4x concentration on a 10 mm × 10 mm cell. Moreover, the thickness of the optics’ walls (1 mm) needs to be considered, leading the total area to 21 mm × 21 mm. In addition, a minimum of 2 mm tolerance is required on each side of the substrate and, on one of the sides, 8 mm is added to allocate the terminal tabs used for current extraction. Taking into account these values, an aluminum board sized 255.0 mm × 262.5 mm is designed.

The simulation predicts the thermal response of the assembly and proves the ability to remove the waste heat even in a densely packed configuration. The results are shown in Figures 7 and 8: the first image reports the distribution of the temperature across the plate and the second one presents the temperature contours. The final maximum temperature is similar to that reached in the single-cell simulation: 76.5°C. This means that the large IMS can well perform when coupled to an appropriate cooling system: the plate is able to remove the heat from the cells to let the system work at steady-state in a suitable operating temperature range.

(a)

(b)

Figure 7: Front view (a) and lateral view (b) of the temperature distribution of the full scaled board in °C. Max. cell’s temperature: 76.5°C. Min. cell’s temperature: 62.5°C.

(a)

(b)

Figure 8: Front view (a) and lateral view (b) of the isothermal contours in the assembly of the full scaled board in °C.

A maximum difference of temperature of 14°C is registered among the cells installed in the assembly: the minimum temperature, achieved by the cells on the edge, is due to the 1 cm room left on one side of the board to allocate the tabs for current extraction. Unfortunately, it is not possible to reduce that space and, on the other hand, adding the same room in the other edges will increase the temperature gradient, without any positive effect on the system’s performance.

In order to predict the behaviour of the system under a wider range of conditions, the system is then tested under the worst case conditions, when all the concentrated sunlight is converted into heat. In this case, the cell’s efficiency is considered to fall to 0%: the heat production then rises to 42.5 W/cm² and a maximum cell’s temperature of 150°C can be allowed [26]. As shown in Figures 9 and 10, the insulated metal substrate is able to successfully handle the large amount of heat: the cells are expected to achieve a maximum temperature of 115°C.

(a)

(b)

Figure 9: Front view (a) and lateral view (b) of the temperature distribution of the full scaled board in the worst case conditions in °C. Max. cell’s temperature: 115.6°C. Min. cell’s temperature: 91.9°C.

(a)

(b)

Figure 10: Front view (a) and lateral view (b) of the isothermal contours of the full scaled board in the worst case conditions in °C.

4. The Conductive Layer

The design of the electrical circuit is developed to allocate all the components, to have a high efficiency, and to be easy to realize. In order to enhance the performances, the same copper plate is used to directly connect the negative pad of the cell with the positive one of the following cell. This way, the number of connections is reduced, limiting the contact resistances. To facilitate the manufacturing, the whole copper pattern is designed to be made of only few shapes, periodically repeated in the space to obtain the final drawing.

The pattern is realized taking into account the requirements and the restrictions of the optical geometries and the recommendations of the standards, which are listed in the next section. In the designing stage, AutoCAD is used to check the matching between the receiver’s geometry and the optics systems restrictions. A symbolic representation of the HCPV key components is shown in Figure 11: the same symbols are used in all the drawings reported in the present paper.

(a)

(b)

(c)

Figure 11: Key of the components schematics: (a) diode, (b) bare cell, and (c) cell with front interconnectors.

4.1. The IPC Standards Restrictions

The design is drawn up according to the IPC-2221 Generic Standards on Printed Board Design [46], produced by the Association Connecting Electronics Industries. A 70 μm thick copper is considered for this application; the most common 35 μm thickness is not enough to safely carry the nominal currents in the restricted volumes available in HCPV. In order to limit the increase in temperature due to the Joule losses to less than 5°C, the minimum 70 μm thick copper widths have to be equal to or larger than 1.17 mm (Figure 12(a)) where a maximum short-circuit current of 3.293 A is expected to flow and larger than 3.05 mm (Figure 12(b)) where the short-circuit current can rise up to 6.587 A. Table 6 shows the minimum width required for a 70 μm thick copper plate depending on the conductor’s temperature and on the maximum current flowing into it. In the proposed designs, a 10% tolerance and the effects of the thermal expansion are considered as well and the minimum widths are increased accordingly.

Table 6: Minimum width (in mm) of the 70 µm thick copper, for ambient temperature of 25°C, depending on current and copper’s temperature (according to the IPC-2221 Standards).

Current versus temperature increase
3°C
4°C
5°C
15°C
25°C
35°C
45°C
55°C
65°C

6.5870 A
4.26
3.58
3.12
1.60
1.18
0.96
0.82
0.73
0.66

3.2935 A
1.64
1.37
1.20
0.62
0.45
0.37
0.32
0.28
0.25

Figure 12: Current distribution across the C2 copper shape. The dimensions are in mm.

Across the plate, adjacent copper shapes face various voltages while in operation. In conditions of open circuit at 500x, the negative pads of two consecutive cells face a difference up to 3.17 V. The ends of two consecutive rows meet a maximum difference of 76.08 V. The largest voltage difference is the one registered between the last pad of one series and the first one of the other one; there, the shapes face a maximum difference of 228.24 V. The standards strike out clearly the required electrical clearance between DC external coated conductors: 0.13 mm for any voltages lower than 100 V and 0.40 mm for voltages up to 300 V.

4.2. The Electrical Circuitry Pattern

The copper pattern is built to allocate two series of 72 cells each: each series is expected to produce 6.440 A at about 208 V at the maximum power point. A 4.5 μm thick layer of marble resin is used to bond the aluminum substrate and the conductors. It works as a dielectric as well and has to be able to face a maximum open circuit voltage of 230 V per series. It is a DC dielectric strength of 60 · 10³ V/mm, which means that it is able to support maximum voltages of 270 V.

In the designing stage AutoCAD is used in order to check the matching between the receiver’s geometry and the optics systems restrictions. The main challenge is to fit all the components in the available space. A 4x secondary system is placed above the plate: this means that the surface available to allocate the cell, the diode, the interconnectors, and the conductive layers, inclusive of the clearances, is four times larger than the cell’s active area (10 mm × 10 mm). The edges of the optics structure have a thickness of a 1 mm; the available surface rises then up to 21 mm × 21 mm and it is marked by the red square in Figure 13.

Figure 13: Components distribution across the 21 mm × 21 mm surface, delimited by the red square.

The geometry, shown in Figure 14, is specifically developed to fit the original 500x optical system, but it can be easily adapted to fit different set of optics. The design is based on four simple shapes (Figure 15), named C1, C2, C3, and C4 [47]. The full scale plate is obtained through the appropriate repetition of these shapes on the conductive layer.

(a)

(b)

Figure 14: A four-cell V3.1 pattern. In (a), cells and diodes are reported with dimensions in mm. In (b) the copper shapes employed for the pattern are highlighted.

Figure 15: The four shapes of the V3.0: C1 recurs twice, C2 recurs 132 times, C3 recurs twice, and C4 recurs 10 times in the 144-cell design. Dimensions are in mm.

The large, 144-cell conductive layer is composed of 146 copper elements, opportunely etched on the substrate, as shown in Figure 16. C2 is repeated 132 times. C3 recurs 10 times: it is used at the end of each row, excepted for the start and the end of each series, where C1 and C4 are, respectively, placed. C1 and C4 are then present twice each on the 144-cell plate, respectively, at the positive and the negative ends of each series. The two series are named A and B.

Figure 16: Complete assembly: the dimensions of the aluminum board are shown.

4.3. Features of the New Design

In any electronic application, interconnectors represent one of the weakest points, because of the high electrical contact resistance and the fragility of the bonding. The original design of the copper pattern designed in this work has only one set of interconnections between adjacent cells: one shape of copper is used both as landing surface for the interconnectors coming from the negative pole of the cell and as mounting pad for the positive pole of the adjacent cell. This approach allows lowering the electrical resistance of the circuit and, thus, the electrical losses.

A second feature of the design is the scalability: it can be easily adapted to allocate a different number of cells. Opportunely combining the copper shapes, it is possible to create less or more populated arrays of aligned cells. In the present work, the design has been used to produce several single-cell receivers, a 16-cell receiver [38], and the presented 144-cell receiver.

4.4. Thermal Expansion Analysis

An investigation about the effects of the thermal expansion is sorted out, in order to prevent problems due to the high temperatures involved. The plate is designed and manufactured at a room temperature of 25°C. In case failures, the system can face temperature up to 150°C. The maximum thermal expansion is then calculated between these two extreme temperatures: a maximum difference of temperature () of 125°C is considered.

Copper has a coefficient of thermal expansion () of 17 ppm/°C and the maximum dimension () in the presented design is 20.5 mm. According to the standard equation for the linear thermal expansion (11), the maximum expected deformation () due to the temperature is 0.00435 mm. The linear thermal expansion equation is expressed as

Considering the expansion of both the copper shapes facing a gap, a decrease in distance of about 0.01 mm will still maintain the gap above the minimum value recommended by the standards (0.4 mm).

4.5. Top Interconnections

4.5.1. Wire Bonding Technology

Wire bonding is used to interconnect the front of the cell with the conductive layer. It is a standard process in electronics and is considered to be extremely reliable after the introduction of automatic wire bonding, low temperature bonding processes, and effective pad cleaning methods [48]. Either gold or aluminium wires are generally used. Copper wires have been developed and are gaining much attention but are not yet capillary available. In our application, 32 μm thick aluminium wires were bonded, because of the higher mechanical strength of aluminium, the lower temperature required for the bonding process, and the lower cost compared to gold.

4.5.2. System Sizing

The approach suggested by Shah [49] is considered to dimension the wire bonding interconnections of the receiver. Shah based his method on the principle that at steady-state all the heat produced by the Joule losses () on the wires need to be removed (12). This procedure is centered on the conservative assumption that the heat is dissipated only through thermal conductivity: the amount of heat removed through the wire () has to equalize . In the present case, the amount of heat generated on the wire (13) is directly proportional to the square of the current flowing through the wire itself (), with the proportion given by the electrical resistance of aluminum (). Consider

The amount of heat removed by the wire can be estimated through the equation of the heat transfer by conduction, given as

where represents the thermal conductivity of aluminum, and are, respectively, the sectional area and the length of the wire, and indicates the difference of temperature between the two ends of the wire.

The electrical resistance depends on the electrical resistivity of the material () and the length and the cross-sectional area of the conductor. Applying the definition of electrical resistance (15), and considering the circular section of the wire, Shah [49] obtained (16); it can be used to determine the maximum () current allowed to flow through one -sized wire. Consider

The current generated by the cell () can be distributed on different wires. The minimum number of wires needed to carry it safely () can be established through the ratio between the total amount of current and the maximum current per wire:

Aluminum has a thermal conductivity of 205 W/mK and an electrical resistivity of  Ωm. Standard aluminium wires are used in this application; their diameter is 32 μm. The distance between the front contacts on the cell and the landing pads on the copper is 2 mm and corresponds to the length of the wire. Considering a difference of temperature of about 15°C between the two terminals of a wire, a number of 50 wires are needed to carry 6.587 A.

4.5.3. Safety Factor

In the fabrication of the cell receiver, 70 wires per cell are bonded, applying then a safety factor of about 1.4. This factor can be judged as low, but it is safe enough if the already conservative approach used for sizing is considered. Anyway, the surplus of wires is installed to overtake two issues that can occur during manufacturing and in operation: wire bond nonsticks and nonuniform current generation. Some contamination on the dies from the soldering process causes some wire bond nonsticks, like those shown in Figure 17. In the present system, the 3.75% of the connections are found to be faulty: this means that almost 3 wires per cell are missing, out of 70. A peak of 14 missing wires per cell is counted, with a maximum of 10 wrong connections per cell’s side. The surplus of bonded wires prevents the system from dangerous overcurrents. Furthermore, the excess of wires allows the system to face any potential nonuniformity in current generation due to nonhomogeneous light distribution onto the cell’s surface. Under a nonuniform illumination the cell operates locally at higher irradiance and, thus, generates higher currents [50, 51]. A larger number of interconnections will help to distribute any surplus of current, in order not to overload some of the wires in case of nonuniform illumination.

(a)

(b)

Figure 17: A completely bonded cell’s tab (a) and a cell’s tab with two missing wires (b).

4.6. Ohmic Losses

The plate is designed to work at a peak power of 2.678 : this is the expected output from 144 cells working at the maximum power point under 500x at 25°C. An analytical investigation is sorted out to determine the Ohmic losses: some electrical energy is wasted in the copper circuit and some is lost in the interconnectors. These two cases are separately studied, in order to understand the effect of the interconnections on the performances of the system. The 144-cell copper pattern is made of 146 copper components, with a common thickness of 70 μm. The power losses are calculated for each copper shape, as reported in Table 7, taking into account the current flowing in the different portions of each shape. Considering an electrical resistivity of  Ωm for copper, a loss of 10.50  is estimated while in operation. This value represents about 0.4% of the whole power output.

Table 7: Power losses breakdown in the conductive pattern.

Component code
Geometry
Power losses per piece [W]
Number of repetition in 144-cell design
Total power losses [W]

C1

0.013
2
0.026

C2

0.077
132
10.202

C3

0.014
10
0.140

C4

0.067
2
0.134

70 aluminum wires are installed on each cell, to transfer a current of 6.440 A at the maximum power point. Taking into account an electrical resistivity of  Ωm, about 0.063  are going to be wasted on each cell and, then, about 9.00  are lost on each plate (0.34% of the power output). In the presented plate, an average number of 3 wires are missing on each cell; this raises the power losses to about 9.40 , with an increase of 4.5% compared to the ideal case. It is interesting to highlight that the interconnectors are causes of almost half of the Joule losses on the plate. The wires are designed to operate safely when up to 20 of them fail on each cell. If only 50 wires are working on each cell, the power loss rises to 12.60  (+40% compared to the 70-wire case). The losses might be decreased by using materials with higher electrical conductivity: 70 gold wires per cell and 70 copper wires per cell would drop the losses per plate, respectively, to 7.80  (−12%) and 2.68  (−70%). Out of a designed peak power of 2.678 , a net power output of 2.658  is expected to be obtained by the plate.

5. Fabrication and Analysis of the 144-Cell HCPV Assembly

The 262.5 mm × 255.0 mm IMS plate is developed to accommodate 144 cells and to fit the 4x secondary concentrators as described earlier (Figure 18). The IMS has a 2.003 mm thick 5052 aluminum baseplate and a 70 μm thick copper layer, bonded together with a 4.5 μm thick marble resin. Aluminum is chosen due to its good thermal performances and its lower price than copper [52]. The whole board is produced and populated through standard electronic processes.

Figure 18: The cell assembly populated with cells (CC), interconnectors (IC), diodes (D), and terminal tabs.

5.1. Indoor Characterization

The plate is tested in a WACOM WXS-300S-50 solar simulator, in order to verify the lack of faulty connections or of short-circuits that can happen in the manufacturing operation and to check the components. This device is a class AAA simulator, equipped with one xenon short arc lamp. The simulator is able to provide a continuous irradiance of 1000 W/m² at AM1.5, distributed over an area of 30 cm × 30 cm. Due to the dimensions of the plate, only a 1x indoor characterization is possible. The plate is tested at DNI 1000 W/m², AM1.5, and 28°C. For comparison purposes, a 3C40A assembly produced by AZUR SPACE [17] is also tested in the same conditions. The 3C40A is a single-cell assembly equipped with a 3C40C cell, the same used in the plates presented in this paper. It is based on a DBC substrate and equipped with two diodes. The measured - curves are shown in Figure 19; the two series of the boards are separately characterized and therefore named A and B (Figure 16), because the - tracer cannot work with voltages higher than 300 V. In this study, it is not possible to vary the irradiance, because of the impossibility for the - tracer to measure at the same time currents lower than 10 mA and voltages higher than 30 V [53].

Figure 19: - curves of the series of the fabricated assembly at 1x under 1000 W/m² DNI, AM1.5, and 28°C temperature.

A short-circuit current of 11.6 mA is measured and open circuit voltages of 181 V and 180 V are recorded for the two cell’s series on the assembly. The discrepancy in the voltage outputs might be due to the hand-placement of the components and to the solder paste contamination found during the wire bonding. The fill factor ranges between 80.3% and 80.9%. The high values of fill factor prove a low series resistance in the board, whereas the shape of the curve means that the fabrication has been properly realized: the lack of steps in the curve is due to the good connections and to the absence of mismatches between the cells.

The measured outputs, shown in Table 8, are compared with those of the AZUR SPACE’s 3C40A single-cell assembly tested in the same conditions. The average outputs of each cell of the large cell assembly are calculated; the curves are compared in Figure 20.

Table 8: Electrical outputs per cell of the two series of the produced cell assembly, compared with those of the commercial 3C40A assembly, under AM1.5, 1000 W/m², at 28°C.

Assembly
Number of cells
[mA]
per cell [V]
per cell [mW]
[mA]
per cell [V]
F.F.

Series A
72
11.57
2.50
23.58
10.31
2.29
0.814

Series B
72
11.59
2.51
23.38
10.32
2.26
0.801

3C40A
1
12.11
2.58
25.64
11.00
2.33
0.820

Figure 20: Comparison of the curves of one of the cells mounted on the large cell assembly and that of the 3C40A single-cell receiver produced by AZUR SPACE. The curves are measured in the same conditions.

For a better prediction, the measured values are refined to simulate a full scale characterization. In the following numerical investigation, the values of the series A are considered: an average open circuit voltage of 2.50 V per cell is generated. The equations reported in [54] are used to estimate the performance of the cell assembly at the designed 500x concentrations. The intensity of the current () at any concentration () can be estimated as

The voltage () can instead be obtained according to

where is the ideality factor, is the Boltzmann’s constant ( J/K), is the cell’s temperature, is the elementary charge ( C), and is the series resistance of the circuit. An average ideality factor of 3.5 is considered [54]. The measurements are conducted at a temperature of 28°C, 3 degrees more than the standard one. For this reason, the values obtained by (18) and (19) have to be corrected according to the temperature coefficients reported in the cell’s datasheet [26]. is calculated as described in Section 4.6.

A minimum short-circuit current of 5.77 A and an average open circuit voltage per cell of 3.08 V are predicted at 500x, under CSTCs (Table 9). The current and the voltage measured for the large receiver are, respectively, 4.80% and 2.06% lower than those obtained for the commercial single-cell assembly under the same conditions [55]. This discrepancy can be justified by the difference in the cell’s number between the 144-cell plate and the single-cell receiver and by a potential nonuniformity in the solar simulator irradiance, which would affect only the larger assembly.

Table 9: Refined electrical outputs of the two series of the produced cell assembly, compared with those of the commercial 3C40A assembly for a concentration of 500x under AM1.5, 1000 W/m², at 25°C.

(500x) [A]
(500x) [V]

Series A
5.77
3.08

Series B
5.78
3.09

3C40A
6.04
3.16

In a similar way, the maximum power point values can be predicted. At 500x, each cell is expected to work at a maximum power point power of 14.7 W, achieving, under 1000 W/m² DNI, an efficiency of 29.4%. The commercial assembly instead reaches an efficiency of 31.9%. The difference between the two efficiencies might be due to the dimensions of the tested boards.

The cell’s datasheet reports a peak efficiency of 37.2% at 500x, under standard test conditions. The characterization has been conducted at one sun, instead of at full 500x scale: the cells are designed to work at high concentrations, so they are expected to differently behave at one sun [56]. In particular, the cells used in this application are optimized for concentrations ranging between 300 and 500 suns [26]: the lack of concentration leads to a reduction in efficiency. For this reason, higher cell’s efficiencies are expected to be achieved at full scale. Moreover, the discrepancy between the cell’s and both the assemblies’ efficiencies is probably partly due to the spectrum of the simulator, which is optimized for silicon cells, whereas it is less performing when triple-junction cells are tested.

In a real full-scale scenario, a combination of optical, mismatch, and Ohmic losses, along with the impacts of the temperature and the spectra, can occur and negatively affect the performances of the system [57]. The results of a full scale outdoor characterization will be presented in future works.

6. Conclusions

A new, densely packed assembly for 500x HCPV applications has been developed on an insulated metal substrate. For the first time, the design of a large, densely packed HCPV receiver has been detailed in a scientific paper. This assembly represents a novelty for the unique low-resistance design of the conductive layers. The application of IMS can represent a step ahead towards the awaited cost-cutting for HCPV. The receiver is designed to accommodate 144 cells and to work at a power output of 2.6 . Due to the large number of cells and the high concentration, the leading issues were to design a receiver able to handle the large waste heat generation thus maintaining high electrical properties and to assure long term reliability of the system. The geometry of all the components has been designed to fit the requirements of the standards and to grant acceptable thermal management and electrical performance to the assembly. The shape of the electrically conductive layer minimizes the electrical resistances, by reducing the number of interconnections, assuring easy scalability of the structure. The simple design can be used in different applications with few changes. All the assumptions and the analytical investigations made during the design stage have been reported. Schottky diodes have been used in the receiver to order to avoid damage to shaded cells and to reduce the power losses in case of current mismatch among different series-connected cells. The diodes are slightly oversized, consistent with the safety factors applied in commercial applications, in order to ensure better performance and a longer life to the device. Aluminium wires have been bonded to interconnect the cells and the conductive layers: they were sized to work safely even in the case of overcurrents caused by nonuniform irradiance over the cells. The reliability of the insulated metal substrates in the HCPV has been demonstrated using a software simulation: insulated metal substrates behave similarly to the more expensive direct bonded copper in terms of heat removal. The thermal behaviours have been proven using a 3D multiphysics simulation; the densely packed structure can be cooled using an active cooling system, even accounting for the Joule heating. The use of an IMS as the baseplate will help in experimentally understanding the potential and the weaknesses of this kind of substrates in HCPV applications. The prototype has been tested indoor for characterization, showing peak efficiency of 29.4% and a fill factor above 80%. The developed assembly will be installed and tested in outdoor conditions: the results of a long-term outdoor characterization will be presented in future works.

Nomenclature

: | Area
: | Cross-sectional area of the wire (m²)
: | Specific heat capacity (J/K)
: | Diameter of the wire (m)
: | Focal length of the primary concentrator (m)
: | Heat transfer coefficient W/(m²K)
: | Current (A)
: | Thermal conductivity (W/mK)
: | Boltzmann constant (J/K)
: | Maximum geometric dimension (mm)
: | Length of the wire (m)
: | Ideality factor
: | Number of cells
: | Number of wires per cell
: | Conduction heat flux (W/m²)
: | Elementary charge
: | Heat generated by the Joule losses (W)
: | Heat removed through conduction (W)
: | Volumetric heat source (W/m³)
: | Electrical resistance (Ω)
: | Thermal resistance per unit of surface (m²K/W)
: | Series resistance (Ω)
: | Temperature (°C)
: | Thickness of the layer (m)
: | Voltage
: | Volume of the cell (m³)
: | Concentrating Ratio.

Greek Symbols

: | Coefficient of thermal expansion (ppm/°C)
: | Deformation due to thermal expansion (mm)
| Difference between the maximum operating temperature and the reference temperature of the copper layer (°C)
| Difference of temperature between the two ends of the wire (°C)
: | Electrical resistivity (Ωm)
: | Density (kg/m³).

Subscripts

amb: | Ambient
: | Downside surface of the layer
ext: | External environment
: | Surface
: | Thin thermally resistive layer
: | Upside surface of the layer
: | Wire.

Conflict of Interests

The authors declare that there is no conflict of interests regarding the publication of this paper.

Acknowledgments

This work was financially supported by EPSRC-DST funded BioCPV project (EP/J000345/1). The authors would like to thank Cubik Innovation Ltd. and Custom Interconnect Ltd. for the assistance during the fabrication.

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