International Journal of Reconfigurable Computing
Volume 2018 (2018), Article ID 9595171, 1 page
https://doi.org/10.1155/2018/9595171

Corrigendum

Corrigendum to “PCIU: Hardware Implementations of an Efficient Packet Classification Algorithm with an Incremental Update Capability”

O. Ahmed, S. Areibi, K. Chattha, and B. Kelly

School of Engineering, University of Guelph, Guelph, ON, Canada N1G 2W1

Correspondence should be addressed to S. Areibi; sareibi@uoguelph.ca

Received 26 February 2018; Accepted 27 February 2018; Published 20 March 2018

Copyright © 2018 O. Ahmed et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

The article titled “PCIU: Hardware Implementations of an Efficient Packet Classification Algorithm with an Incremental Update Capability” [1] was found to contain material from the following published articles.

(1)Y. Chen and O. Oguntoyinbo, “Power efficient packet classification using cascaded bloom filter and off-the-shelf ternary CAM for WDM networks,” Computer Communications, Volume 32, Issue 2, 12 February 2009, Pages 349–356, ISSN 0140-3664, https://dx.doi.org/10.1016/j.comcom.2008.11.002, which is cited as reference .(2)K. Xu, J. Wu, Z. Yu, et al. “A non-collision hash trie-tree based fast IP classification algorithm” Journal of Computer Science and Technology. (2002) 17: 219. doi: 10.1007/BF02962215, which is not cited.

The paper by Chen and Oguntoyinbo was cited by the authors. The authors forgot to cite Xu et al. in their paper [1]. The authors would like to acknowledge the minor text reuse from both Chen and Oguntoyinbo and Xu et al.

References

O. Ahmed, S. Areibi, K. Chattha, and B. Kelly, “PCIU: hardware implementations of an efficient packet classification algorithm with an incremental update capability,” International Journal of Reconfigurable Computing, vol. 2011, Article ID 648483, 21 pages, 2011.