Novel Modified High Step-Up DC/DC Converters with Reduced Switch Voltage Stress

*is paper presents the improved switched inductor unit and new step-up DC/DC converters with reduced switch voltage stress and high voltage gain.*e proposed switching-inductor unit is composed of 1 switch, 2 diodes, and 2 inductors, which can realize the step-up function. *rough comparison, the better topology is selected from the proposed converters, which is named the double-switch high step-up (DS-HS) converter. *e CCM operating principles and voltage gain of the DS-HS converter are analyzed. *en, the influences of nonideal components, efficiency analysis, small signal modeling and control, and design criteria of components are discussed. *e comparison of the converters is given, and the loss of the DS-HS converter is lower through theoretical derivation, which shows that the DS-HS converter has the advantages of high voltage gain, low voltage stress, and high efficiency. Finally, in order to verify the effectiveness of the DS-HS converter, simulation and experimental results are given, and the efficiency of the DS-HS converter can reach 96.15%.


Introduction
In recent years, the world's attention to the adhibition of renewable energy for power generation has greatly increased. Photovoltaic cells and fuel cells are sources of renewable energy power generation and have received sufficient attention. Because of the low output voltage of these renewable energy sources, it is not enough to be used in many applications [1]. erefore, it is necessary to need an efficient and high boost DC/DC converter to achieve step-up. High-boost DC/DC converters can be applied to photovoltaic and fuel cell energy conversion systems, DC microgrids, automobiles, uninterruptible power supplies, high-intensity light ballasts, LEDs, and hybrid vehicles [2,3]. Since the output DC voltage of solar photovoltaic power generation and fuel cell power generation is low, generally less than 50 V, the low DC voltage needs to be boosted to the 380 V DC bus voltage of input of the grid-connected full-bridge inverter. erefore, the nonisolated high-gain DC converter is an important link to ensure the normal operation of the entire photovoltaic power generation system and fuel cell power generation system and has a very important impact on the entire system.
For the classic boost converter [4], theoretically, it can achieve high voltage gain only as the duty cycle approaches 1. Recently, a number of DC/DC converters on account of several enhancement techniques have been proposed in [5]. Isolated step-up DC/DC converters can easily achieve high boost through transformers, such as H-bridge, push-pull, and others. However, due to the need for high-frequency transformers and supplementary circuits to handle leakage inductance energy [6,7], these converters are bulky, large, and expensive. In addition, due to transformer leakage inductance, the voltage stresses of active switches on these converters are high. erefore, additional energy regeneration technology and voltage clamping technology are needed to recover the leakage energy and reduce the voltage stress of the active switches [8,9]. e boost DC/DC converters based on coupled inductors can achieve high step-up; however, additional voltage clamping techniques and input filters are needed to reduce ripple and leakage inductance energy recovery solutions, which lead to higher costs. In addition, authors in [10][11][12] also introduce additional losses related to the clamping circuit. However, these topologies are complicated, and the gain factor depends on the coupling coefficient of the coupled inductor. e LLC resonant converter uses the principle of soft switching to realize zerovoltage (zero-current) switching of the switching device, which greatly reduces the switching loss of the converter and further improves the switching frequency of the converter [13][14][15]. e LLC resonant converter has the advantages of parasitic parameter compatibility and good soft switching performance, but it also has a certain complexity, and its energy transfer is realized by using a complex resonant circuit. e cascaded and secondary boost converters can be other ways to the problem, but high-voltage devices are still required, and the switch voltage stress is equal to the output voltage. e cascade of two or more DC/DC converter topologies brings about complex circuits and increased costs. Because the voltage gain is highly nonlinear, two or more switches are required to be synchronized [9,[16][17][18], and the control is complicated.
In order to solve the problems of the aforementioned converters, switched inductors (SIs), mixed switched inductors and capacitors, interleaved front-end structures, and multiplier-based converters are possible approaches recently [19][20][21][22][23]. However, multiple power levels are applied in many cases, and the voltage stress of the active switch is too high or even equal to the output voltage. In addition, using many multipliers will increase the measure and cost of the system. For the sake of reducing the voltage and current stress on the switch and obtaining a higher boost voltage gain, the DC-DC converters are proposed in [24,25], when the duty cycle is not high. However, the converters in [23,24] require a lot of reactive components and achieve high boost through the cascade. e geometric structure method is proposed in [26], which is a method to develop the DC conversion topology by constructing the geometric structure. However, the constructed geometric structure is only for a certain part of the topology, not for the whole topology, so it still cannot be unified in the character analysis, and the analysis process is too cumbersome.
In this paper, the improved switching-inductor unit and new high step-up DC-DC converters with reduced switch voltage stress and high voltage gain are proposed. en, the better topology is selected from the proposed converters by comparison, named the double-switch high step-up (DS-HS) converter, in Section 2. Section 3 analyzes the CCM operating principles and voltage gain of the DS-HS converter so as to verify the accuracy of the DS-HS converter in Section 2. e impact of nonideal components on the output voltage and efficiency is analyzed in Section 4. A comparison with existing converters is shown in Section 5. Section 6 provides the design criteria for components. Small-signal models and control schemes are listed in Section 7. Sections 8 and 9 deal with the simulation and experimental results of the DS-HS converter. At last, Section 10 draws conclusions.

Proposed Switching-Inductor Unit and Step-Up Converters
Section 2 proposes the improved switching-inductor unit and new high step-up DC/DC converters with reduced switch voltage stress and high voltage gain, and the better boost converter is selected from the proposed converters.

Proposed Switching-Inductor Unit.
Based on the switching-inductor unit in [16], a modified switching-inductor unit is proposed. e switching-inductor units and operating conditions are shown in Figure 1. Figure 1(a) is the existing switching-inductor unit, consisting of 3 diodes and 2 inductors. By replacing a diode in Figure 1(a) with a switch and changing the position of the switch, it helps to share the voltage stress on this branch of the switches, when combining the step-up DC converters. e improved switchinginductor unit of Figure 1

Proposed High
Step-Up Converters. Combining the proposed switching-inductor unit with the existing converters [27], four new step-up DC/DC converters with reduced switch voltage stress and high voltage gain are proposed in Figure 2. On the branch of the switches, two switches S1 and S2 can share the voltage stress with each other, as shown in Figure 2 marked with a red box, so the voltage stress of the switch can be much lower, compared with the DC/DC converter with only one switch in the branch. e characteristics of four proposed DC/DC converters are shown in Table 1 can be filtered out. In addition, the input current of the DC converter in Figure 2(a) is not pulsating, so its input current has less disturbance to the input power. All in all, by comparison, the proposed converter in Figure 2(a) is better, and the detailed analysis in the following section is carried out on the converter in Figure 2(a).

Operating Principle of the Proposed Converter
is section discusses the operating principles and voltage gain of the better converter in Figure 2(a), named the double-switch high step-up (DS-HS) converter. e continuous-conduction mode (CCM) for the DS-HS converter is shown in Figure 3, where D is the duty ratio, and T S is a whole cycle. DT S represents the time that the switch is turned 2 International Transactions on Electrical Energy Systems on, which is recorded as T on , and (1-D) T S represents the time that the switch is turned off, which is recorded as T off . e operating principle of the DS-HS converter in CCM is shown in Figure 4. e components connected by solid lines represent operation, but the components connected by dotted lines represent nonoperation in the circuit. Let us assume that the inductance of L 1 is equal to L 2 , and the capacitance of C 1 is equal to C 2 . e operation condition of the circuit during t 0 − t 1 can be shown in Figure 4(a). e inductors L 1 and L 2 are charged by the DC power supply, and in the meantime, the capacitors C 1 and C 2 charge the load. e operation condition of the circuit during t 1 − t 2 is shown in Figure 4(b). e DC power supply, L 1 , and L 2 release energy to C 1 and C 2 .
In Figure 4(a), the inductors L 1 and L 2 are charged during T on , and their voltages are as follows:   2 Switch voltage (U S1 and U S2 ) C 1 and C 2 are discharged during the T on period, and they are as follows: (2) In Figure 4(b), the voltages at L 1 and L 2 are expressed during T off as follows: On the basis of voltage-second balances of L 1 and L 2 , the expression is as follows: According to Figure 3 and equation (4), the voltages at C 1 and C 2 are as follows: Combining the equations (2) and (5), the output voltage U o is obtained as follows: According to equation (6), the voltage gain of the DS-HS converter in CCM can be expressed as follows:

Effect of Nonidealities on Output Voltage
e nonidealities of the DS-HS converter are considered in Figure 5 to discuss the nonideal effects of components on voltage gain. e equivalent series resistance (ESR) of the inductors L 1 and L 2 is the resistance r L . e ON-state resistance of switches S 1 and S 2 is represented by the resistance r S . e threshold voltage and the forward resistance of diodes D 1 , D 2 , D 3 , D 4, and D 5 are indicated by the voltage U FD and resistance r D , respectively. e ESR of C 1 and C 2 is r C , and the ESR of Co is shown by r Co .

Nonideal Effect of Inductors L 1 and L 2 on Output Voltage.
Considering the effect of ESR of the inductors L 1 and L 2 , other parasitic parameters are neglected, i.e., r S � 0, r D � 0, r Co � 0, r C � 0, and U FD � 0. Considering the case mentioned above, during the T on period, the voltages across inductors L 1 and L 2 are expressed as follows: During T off , the voltages at L 1 and L 2 can be expressed as follows: According to (8), add the voltages across inductors, and the following formula is obtained: On the basis of voltage-second balances on L 1 and L 2 , the following formula is obtained: e ratio of the voltages of C 1 and C 2 to the input voltage U i is as follows: Because L 1 � L 2 , the currents through the inductors L 1 and L 2 are equal, i.e., i L � i L1 � i L2 . Assume that the voltage drop across ESR of the inductor is U d − L , i.e., us, (12) can be re-expressed as follows: e relationship between the output voltage U o and the voltages of C 1 and C 2 is as follows: Combining the formulas (13) and (14), the voltage gain of the DS-HS converter can be deduced as follows: Considering the different values of U d − L /U i and duty cycle D, equation (15) is shown in Figure 6(a), which indicates the effect of the inductor's ESR on the voltage gain. It can be observed that the voltage gain will decrease for higher values of U d − L . is fact indicates that the ESR (r L ) of the inductor should be as small as possible.   International Transactions on Electrical Energy Systems 5 Considering the case mentioned above, during T on , the voltages across inductors L 1 and L 2 are expressed as follows: During T off , the voltages at L 1 and L 2 are as follows: According to (17), add voltages across inductors, and the following formula is obtained: On the basis of voltage-second balances on L 1 and L 2 , the following formula is obtained: e ratios of the voltages of C 1 and C 2 to the input voltage U i are obtained as follows: Combining the formulas (14), (21), and (22), the relationship between output and input voltages on the DS-HS converter can be deduced as follows: Assuming that the voltage drops of all the diodes are equal, then we get the following formula: us, (23) can be re-expressed as follows: Considering the different values of U d − D /U i and D, equation (25) is revealed in Figure 6(b), which indicates the effect of the diodes on the voltage gain. It can be observed that for higher values of U d − D /U i , the voltage gain will decrease. It indicates that the smaller the forward resistance and threshold voltage of the diodes, the better.

Effect of Switches S 1 and S 2 on Output Voltage.
Since only the effect of switches S 1 and S 2 is analyzed here, other parasitic parameters are neglected, i.e., r L � 0, r C � 0, r Co � 0, r D � 0, and U FD � 0.
During T on , the voltages across inductors L 1 and L 2 are as follows: During T off , the voltages at L 1 and L 2 are expressed as follows: According to (26), add voltages across L 1 and L 2 , and the formula is obtained as follows: On the basis of voltage-second balances on L 1 and L 2 , the following formula is obtained: (29) e ratios of the voltages of C 1 and C 2 to the input voltage U i are as follows: 6 International Transactions on Electrical Energy Systems Combining the formulas (14) and (30), the voltage gain of the DS-HS converter can be obtained as follows: Assume that the voltage drops on the switches S 1 and S 2 are as follows: us, (31) can be re-expressed as follows: (33) us, (33) is rewritten as follows: By considering the different values of U d − S /U i and D, (34) is shown in Figure 6(c), and it also shows the relationship between the on-resistance of the switches and the voltage gain. It is observed that the higher the values of U d − S , the lower the voltage gain. is fact indicates that the ONstate resistance of the switches should be as small as possible.

Effect of the Capacitors C 1 , C 2, and Co on Output Voltage.
Considering the effect of ESR of capacitors C1, C2, and Co, other parasitic parameters are neglected, i.e., r L � 0, r D � 0, U FD � 0, and r S � 0.
Considering the case mentioned above, during T on , the voltages across the inductors L 1 and L 2 are expressed as follows: Simultaneously, C 1 and C 2 are discharged to Co, and the output voltage is as follows: During T off , the voltages at L 1 and L 2 are expressed as follows: e capacitor Co is discharged through load Ro during t 1 − t 2 , and the output voltage is as follows: According to (35), add voltages across inductors, and the following formula is obtained: On the basis of voltage-second balances on L 1 and L 2 , the following formula is obtained: e ratios of the voltage of C 1 and C 2 to the input voltage V i are shown as follows: Since the capacitor voltage cannot be changed suddenly, the voltages across C 1 , C 2, and Co remain unchanged during International Transactions on Electrical Energy Systems the whole cycle. erefore, the average value of the output voltage U o in a whole period is as follows: According to formulas (36), (38), (41), and (42), it can be obtained as follows: (44) e currents through the capacitors C 1 and C 2 are as follows: Hence, the voltage gain is as follows: Let us suppose the voltage drops due to ESR of C 1 , C 2, and Co are U d − C and U d − Co , then we get the following formula: us, (46) can be re-expressed as follows: Further, let us assume that U d− C � U d− Co . us, (48) is rewritten as follows: By considering the different values of U d − C /U i and D, equation (49) is shown in Figure 6(d), and it shows the effect of the ESR of the capacitors on voltage gain. It can be observed that for higher values of U d − C /U i , the voltage gain will decrease. is fact indicates that the ESR of the capacitor should be as small as possible.

Combined Effect of Nonidealities on Voltage Gain.
By considering the nonideal effect of inductors L 1 and L 2 , diodes D 1 , D 2 , D 3 , D 4, and D 5 , switches S 1 and S 2 , and capacitors C 1 , C 2, and Co, respectively, the voltage gain is expressed as follows: 4.6. Efficiency Analysis. e proportional relationship between the inductor current and the output current is as follows:

International Transactions on Electrical Energy Systems
Considering that P SW − S1 and P SW − S2 are the power losses on account of switching of S 1 and S 2 , respectively, the total loss P SW during switching is as follows: where the rising and falling time of switches S 1 and S 2 are t r − S1 , t f − S1 and t r − S2 , t f − S2 ; I S1 , U S1 and I S2 , U S2 are the average current and voltage on S 1 and S 2 . e core loss of the inductors is considered, so it can be shown as follows: where B n ac is the operating magnetic position swing of the inductor core, M´is the quality of the inductor core, and K, m, and n are the coefficients determined by the core material. e parameters can be found in the datasheet.
e total power of the input and output are received as follows: According to (50)-(54), the efficiency of the DS-HS converter is obtained as follows:

Comparison of Converters
Many converters have recently been proposed to realize high voltage gain. e DS-HS converter is compared with the classical and recently proposed converters in this part. e detailed comparison is shown in Table 2, including voltage gain, number of components, the position of the switch, the voltage and current stresses of switches and diodes, the average value and effective value of inductor current, and efficiency. It is obvious that the total number of components of the DS-HS converter is the same as the converter in [20]. e efficiency of the converter depends on several factors, including voltage and current ratings and their types. e comparison of the voltage gain for converters is revealed in Figure 7(a). From Figure 7(a), it can be seen that the DS-HS converter and the converter in [20] have higher voltage gain, compared with the converters in [4,16,19]. e average values of inductor currents for the converters are described in Figure 7(b), which reflect the relationship between the voltage gain G and the ratio of average inductor current to output current I L /I o . From Figure 7(b), it is evident that I L /I o of the DS-HS converter and the converter in [20] is slightly higher than that of the converters in [16,19] but much lower than the boost converter in [4]. e figures of normalized current stress on switches and diodes are incarnated in Figures 8(a) and 8(b). e comparison chart of total current stress on switches and diodes for converter topologies is shown in Figure 8(c), and the comparison chart of total current stress per component is revealed in Figure 8(d). e comparison between the total current stress of the converters is as follows: e relationship between the total current stress averaged to each element is shown as follows: (G + 1) 2 I o √√√ √ √√√ √ [19] < 3(G + 1)I o 5 √√√√ √√√√ [16] < GI o √ √ Boost [4] 3(G + 2)I o +(2(G + 2)/(G − 2))I o 7 √√√√√√√√√√√√√√ √ √√√√√√√√√√√√√√ √ [20]  (57) Boost [4] e converter in [13] e converter in [16] e converter in [17] Proposed converter C/I/D/S/T     [4], B represents SIBC [16], C represents converter [19], D represents converter [20], and E represents the proposed DS-HS converter.  Generally speaking, the cost of components increases parabolically with component ratings. A high rating means high cost and high on-resistance. e relationship of total voltage stresses for converters is as follows: [20] < 3GU i √ √ √ √ [16] . (58) e total voltage stress of each component is received as follows: [20] < 2(G + 1)U i 3 √√√√ √√√√ [19] < 3GU i 5 √ √ √ √ [16] < GU i √ √ Boost [4] . (59) e figures of normalized voltage stress on switches and diodes are reflected in Figures 9(a) and 9(b), respectively. e comparison chart of total current stress for converters is shown in Figure 9(c), and the comparison chart of total current stress per component is also shown in Figure 9(c). According to (59), on average for each component, the proposed DS-HS converter has lower voltage stress than the converters in [4,16,19,20].

International Transactions on Electrical Energy Systems
Half of the total output voltage for the proposed DS-HS converter is shared by two switches. en, low voltage rating switches can be used to design DS-HS converters. In general, as the rating of any device increases, its on-resistance increases. It can be seen that the DS-HS converter requires lower rating components. e efficiency of the classical boost converter [4] and suggested converters in [16,19,20] are 88%, 90.2%, 92.7%, and 94.31%, respectively, and that of the DS-HS converter is 96.15%. erefore, the proposed DS-HS converter has higher efficiency compared with converters in [4,16,19,20].
By comparing with the converter in [20], the DS-HS converter has the same number of components, and the difference in components is just one more switch and one less diode. erefore, the difference in loss is derived in detail as shown in the following figure. e total switching losses of the converter in [20] and the proposed DS-HS converter are shown as follows: where E represents the energy loss during the switching process, and its subscript represents the components. e difference value between the switching loss of the DS-HS converter and the converter in [20] is shown as follows: [20] SD � E on,S1 + E off,S1 where E on and E off represent the switching energy loss of turn-on and turn-off. rough solving (61), the following formula is obtained: Figure 11: Voltage loop control scheme of the DS-HS converter. where t r and t f represent rise time and fall time. According to the formula (62), the final difference value between the switching losses is as follows:

Gc (s) GPWM (S) U ref (S) GDo (S) U o (S) H (S) E (s)
(63) e solution of (63) is always negative, when the voltage gain G is greater than 2.
erefore, it can be concluded that the switching loss of the DS-HS converter is less than the converter in [20]. According to the above analysis, the DS-HS converter provides a feasible method to achieve high voltage gain, reduce voltage stress, and improve efficiency.

Design Criteria of Component Parameters
e parameter design criteria for inductors and capacitors are given as follows.
When the DS-HS converter operates at the boundary (BCM) between the CCM and DCM modes, the relationship between the average inductor current and the minimum load current I oG is as follows: For a given application, if the maximum allowable value for the inductor current ripple is ∆I Lmax , then we get the following formula: (65) For the relationship of ΔI L1 ≤ ΔI L1max and ΔI L2 ≤ ΔI L2max , the minimum inductance of L 1 and L 2 is as follows: where f s � (1/T s ), and K i is the proportional coefficient.
In order to ensure that the DS-HS converter works in CCM, the following inequality needs to be satisfied: ΔI L1 and ΔI L2 in the formula are the inductor current ripples, and Δi Substituting formula (64) into (67), the following formula is obtained: (68) e normalized inductor time constant τ is as follows: By combining equations (68) and (69), the boundary functions of the DS-HS converter working in CCM and DCM can be obtained as follows: e boundary conditions of the HS-LC converter are shown in Figure 10. From Figure 10, it can be seen that when τ is below the solid line, the circuit works in DCM, and when τ is above the solid line, the circuit works in CCM.
Simplifying formula (68), the relationship of Ro can be obtained as follows: According to formula (71), it can be known that the value of the load Ro also determines whether the circuit works in CCM or DCM.
e minimum capacitance formula is as follows: ΔV C1 and ΔV C2 are the voltage ripples of the capacitors, and ΔV C1 max and ΔV C2 max are the maximum allowable values of ΔV C1 and ΔV C2 , respectively. e minimum value of the output capacitor is as follows: where ΔV Co max is the maximum allowable value of ΔV Co , and ΔV Co is the voltage ripple of the output capacitor. Assuming that the inductance and capacitance are large enough, the small-signal model can be obtained using the state-space averaging method. U i (t), U o (t), and d(t) are input variable, output variable, and control variable, respectively. i L1 (t), i L2 (t), U C1 (t), U C2 (t), and U Co (t) are state variables. e equivalent series resistance of capacitors C 1 and C 2 is r. When switches S 1 and S 2 are turned on, the state space average model can be obtained as follows:

Small Signal Modeling and Control Scheme
When S 1 and S 2 are turned off, the state space average model can be written as follows: International    Combining (74) and (75), the average model of the DS-HS converter can be obtained as follows: State variables, input variables, output variables, and control variables can be described as follows: , and U o (t) are the small-signal disturbance variables.
Combining equations (76) and (77), the small-signal model of the converter can be written as follows: International Transactions on Electrical Energy Systems 21

Simulation Results
In order to verify the correctness of the DS-HS converter, a simulation is carried out. e design index and component parameters are shown in Table 3 e current stress of the inductor current is shown in Figure 12(d), and the average currents of L 1 and L 2 are 2.26 A.
When the input voltage is 45 V and the output voltage is 380 V, the simulation waveforms are shown in Figure 13. e drive signal of the switches S 1 and S 2 , output voltage, and the voltage stress of the diode D 5 are shown in Figure 13(a). e voltage stresses of the diodes D 1 -D 4 are shown in Figure 13(b), then the voltage stresses of S 1 and S 2 and the sum of the voltage stresses of S 1 and S 2 are shown in Figure 13(c). e current stress of the inductor current is shown in Figure 13(d), and the average currents of L 1 and L 2 are 1.37 A.

Experimental Results
For the sake of verifying the correctness of the above analysis for the DS-HS converter, the experimental prototype of the DS-HS converter is built, shown in Figure 14(a), composed of a power supply, DSP, oscilloscope, and DS-HS converter. e enlarged figure of the DS-HS converter is shown in Figure 14(b), which consists of inductors, capacitors, switches and diodes, and so on.
When the input voltage of the DS-HS converter is 25 V and the output voltage is 380 V, the experimental results are shown in Figure 15. e drive signal of the switches S 1 and S 2 for the DS-HS converter is shown in Figure 15(a). e output voltage and the voltage stress of diode D 5 are shown in Figure 15 Figure 15(e), and the sum of the voltage stresses of S 1 and S 2 is shown in Figure 15(f ), which is half of the output voltage, 190 V. e current stress of the inductor current is shown in Figure 15(g), and the average currents of L 1 and L 2 are 2.3 A and 2.3 A.
When the input voltage of the DS-HS converter is 45 V and the output voltage is 380 V, the experimental results are shown in Figure 16. e driving signal of switches S 1 and S 2 is shown in Figure 16(a), and the output voltage and the voltage of D 5 are shown in Figure 16 e voltage stresses of S 1 and S 2 are shown in Figure 16(e), and the sum of the voltage stresses of S 1 and S 2 is shown in Figure 16(f), which is half of the output voltage, 190 V. e current of inductors L 1 and L 2 is shown in Figure 16(g), and the average currents of L 1 and L 2 are about 1.33 A and 1.33 A.
As shown in Figure 17(a), when the input voltage of the DS-HS converter changes from 25 V to 45 V, the output voltage remains around 380 V, and the DS-HS converter can achieve a gain range from 8.4 to 15.2. As shown in Figure 17(b), when the input voltage of the HS-LC converter drops from 45 V to 25 V, the output voltage remains around 380 V, and the DS-HS converter can achieve a gain range from 15.2 to 8.4. e efficiency of the DS-HS converter is shown in Figure 18, when U i � 25 V. It can be seen from Figure 18 that the efficiency of the DS-HS converter increases as the power increases, and the efficiency can reach up to 96.15%. In addition, the DS-HS converter also has some limitations. e input and output do not share the same ground, which will cause an electromagnetic interference problem. Because the DS-HS converter does not use soft switching, voltage and current spikes will be generated which results in power loss when the switch is switched.

22
International Transactions on Electrical Energy Systems

Conclusion
e improved switching-inductor unit and new step-up DC-DC converters with reduced switch voltage stress are proposed.
rough filtering of characteristics, the DS-HS converter is selected from the proposed converters. e voltage gain of the DS-HS converter in CCM, the nonideal effects of components, and the efficiency analysis are analyzed. e design criteria for components and small signal modeling and control are given. By the comparison of the existing converters, it can be shown that the DS-HS converter has lower voltage stress, higher voltage gain, and higher efficiency. e actual circuit of the DS-HS converter is built to verify the correctness of the theory. e simulation and experimental results of the DS-HS converter are presented, and the efficiency can reach 96.15%.

Data Availability
No data were used to support this study.

Conflicts of Interest
e authors declare that they have no conflicts of interest.