A Nonisolated Single-Switch Coupled Inductor-Based DC-DC Converter with High Voltage Gain for Renewable Power Generation Systems

. Tis article proposed a new structure of nonisolated high step-up DC-DC converter based on a three-winding coupled inductor and voltage multiplier cells (VMCs) for renewable energy systems applications such as PV power generation. Continuous input current with low ripple, common ground between output and input ports, low voltage stress across semiconductors, low number of components, high voltage gain, and high efciency are the main advantages of the proposed converter. In order to further increase the output voltage, the windings of the coupled inductor are combined with VMC. Te combination of coupled inductor and VMC technique leads to a high voltage gain with low duty cycle, and therefore the conduction loss of power switch is reduced. Additionally, the diodes’ reverse recovery currents are reduced which improve the presented topology’s efciency. On the other hand, the used VMCs clamp the voltage, and the peak voltages across power switch are decreased. Te operational modes, steady-state, and efciency analysis are discussed. Also, to demonstrate the performance of the recommended converter, an experimental prototype with 580 W output power and 400 V output voltage with the switching frequency of 25kHz is built and the experimental results are presented. Also, another 1 kW, 400 V with the switching frequency of 50kHz has been implemented and tested.


Introduction
Due to increased energy consumption, environmental degradation, and the decrease of fossil resources, the generation of electricity from renewable energy sources such as photovoltaic (PV) and wind has increased dramatically in recent years [1,2].However, owing to uncertain climatic circumstances, these types of energy sources have low output voltage and nonregulated output power with low dependability [3,4].DC-DC converters are used to improve and manage the output voltage of renewable energy sources [5,6].Te traditional boost PWM converter may be used to increase the voltage.However, due to voltage gain limitations, it cannot be employed for high voltage applications [7,8].In fact, to increase the voltage conversion ratio even more, the power switch of this converter should be set to a high number [9].As a result, there is a large conduction power loss and a low efciency [10,11].Te peak voltage on the power switch and diode of the traditional boost design, on the other hand, is equivalent to the output voltage [12].As a result, high-rated semiconductors should be employed for this converter's implementation.To address this issue, high step-up converters with higher voltage conversion ratios are proposed for renewable energy producing systems, as seen in Figure 1 [13].Isolated/nonisolated, unidirectional/bidirectional, soft switched/hard switched, current feed/voltage feed, and nonminimum phase/minimum phase are the several categories of high step-up topologies [14].Various methods for increasing voltage gain are also presented, including switched capacitors, VMC, magnetic coupling (magnetically coupled based, tapped inductor, isolated, and built-in transformer), and multistage techniques such as interleaved, multilevel, and cascaded (hybrid and quadratic) [15].Isolated high step-up converters with a single switch are proposed in [16,17].An isolated transformer achieves galvanic isolation between the input and output sides.Furthermore, these topologies ofer exceptional efciency due to semiconductor ZVS and ZCS.Nonisolated structures are less in size, volume, and cost than isolated topologies.Furthermore, common ground between input and output ports is possible.Te magnetic coupling approach can be employed as a coupled inductor in this sort of DC-DC converter.In addition, the windings of the coupled inductor are paired with VMCs to enhance the output voltage even further.Another advantage of the coupled inductors is that they have two or three windings on a single magnetic core.As a result, the converter's volume is decreased [18].
Tere are numerous high step-up DC-DC converters topologies published in the articles.Reviewing all the converters is not possible.However, some more competitive ones are surveyed here.Heidari et al. and Wong et al. [19,20] suggested nonisolated boost converters based on VMC and coupled inductor.Tese topologies beneft from high voltage gain, high power efciency, and low voltage stress across semiconductors.However, the coupled inductor's main side is in series with the input side.As a result, the fundamental shortcoming of these converters is input current with excessive ripple.On the input side, a low-pass flter can be used to decrease the ripple of the input current.However, this process increases the cost and volume.Khalilzadeh and Abbaszadeh [21] described a nonisolated high step-up converter with high voltage gain and low voltage stress.Te main benefts of this converter are its high efciency, ease of control, and recycling of leakage energy.However, this topology has a pulsating high-ripple input current.For renewable energy applications, a low input current ripple high step-up SEPIC-based nonisolated DC-DC converter is presented in [22].Te limited number of components in this topology results in good efciency.However, its voltage gain is lower than that of other comparable converters.Alghaythi et al. and Kurdkandi and Nouri [23,24] presented an interleaved high step-up coupled inductor-based converter with high voltage gain for renewable energy applications.Te interleaved structure results in reduced input current ripple.Nonetheless, because of the large number of the diodes and the capacitors, these topologies are high-volume and expensive topologies.
In this article, a topology of nonisolated high step-up DC-DC converter is proposed for renewable applications such as PV power generation.Te presented converter is designed based on coupled inductor and VMC technique.Te main benefts of the presented topology are as follows: (1) Continuous input current with low ripple (2) Low voltage stress across semiconductors (3) Common ground between input and output ports (4) High voltage gain (5) Low volume and cost (6) High power efciency To attain a high output voltage, the secondary side of the coupled inductor is combined with VMC, which leads to a high voltage gain with low duty cycle, and as a result, the conduction loss of the power switch is reduced.Te used VMCs act as voltage clamps, and the peak voltage on the power switch is reduced.Te converter is presented and its operation modes are analyzed in Section 2. Its steady-state analysis is presented in Section 3. Te converter design considerations and its efciency analysis are given in Sections 4 and 5, respectively.Te comparative studies and experimental results are presented in Sections 6 and 7, respectively.

The Proposed Topology and Its Operation Modes Analysis
Te circuit of the suggested topology is depicted in Figure 2.
Based on the fgure, there are four power didoes (D Te key waveforms are depicted in Figure 3. Tere are two operation modes in each switching period (T s ).Tese modes are explained in the rest of this section.
2.1.Mode 1 (t 0 < t < t 1 ).Tis mode starts at t � t 0 , when power switch S is turned ON by applying PWM pulse to the gate.During mode 1, only D 2 is forward biased, and other diodes are turned OFF.Te voltage across input inductor L in is equal to V in .Terefore, its current is increased.Te voltage over leakage and magnetizing inductances is equal to (V C1 − V C5 ), which is a negative voltage.Tus, i Lk and i Lm are decreased.Capacitor C 3 is discharged to the coupled inductor's secondary side and capacitor C 2 through diode D 2 .Furthermore, capacitors C 4 and C 5 are discharged to the output load.Tis mode ends when power switch S and diode D 2 are turned OFF.Te equivalent structure of mode 1 is depicted in Figure 4(a): 2 International Transactions on Electrical Energy Systems According to the confguration of mode 2, the following equations can be expressed:

Steady-State Analysis
In this section, the proposed structure's voltage gain (M � V o /V in ), voltage of capacitors, peak voltage across semiconductor components, and current of each element are calculated and presented.International Transactions on Electrical Energy Systems 3

Voltage Calculation.
Using equations ( 1) and ( 6) and volt-second balance principle on the input inductor L in , the following equation is achieved: With the simplifcation of equation ( 11), the voltage of capacitor C 3 can be expressed versus V in : Using equations ( 3) and ( 9) and volt-second balance principle on the input inductor L m , the relation between V C1 , V C5 , and V in is obtained as follows: Replacing equation ( 14) in equation ( 3), the voltage across V Lm at mode 1 can be calculated as follows: Replacing equations ( 12) and (15) into equation ( 3), the voltage of capacitor C 2 is achieved as follows: Using equations ( 2) and ( 8) and volt-second balance principle on the input inductor L m , the voltage of capacitor C 4 is obtained as follows: Replacing equation (18) into equation ( 8), the voltage across V Lm at mode 2 can be determined as follows: Replacing equations ( 16) and ( 19) into (7), the voltage of capacitor C 1 is achieved as follows:

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Using equations ( 15), (20), and (3), the voltage across capacitor C 5 can be written as follows: Finally, replacing equations ( 18) and ( 21) into (4), the voltage gain (output voltage versus input voltage) is calculated as follows: Figure 5 depicts the variation of the voltage gain (M) versus N and D.
Using equations ( 12)-( 21), the maximum blocking voltage of diodes D 1 , D 3 , and D 4 is calculated based on Figure 4(a), as follows: Also, the maximum blocking voltage of power switch S and diode D 2 can be obtained at the second operation mode as follows: Te normalized maximum voltage stresses across semiconductors are summarized as follows: Te normalized maximum voltage stresses across semiconductors versus diverse values of N and D are shown in Figure 6.

Currents Calculation. Te input average current is obtained versus I o as follows:
Based on the proposed converter's confguration, diodes average currents are equal to I o .
Using equations ( 26) and ( 27), the power switch's average current can be calculated as follows: Using average currents, the peak currents of diodes are archived as follows: Te input inductor's peak current can be expressed versus average current and current ripple as follows: Te current of capacitor C 1 at mode 1 and 2 is obtained as follows:

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Based on confguration of mode 1, the power switch's peak current can be written as follows: Finally, the current of C 2 , C 3 , C 4 , and C 5 are calculated as follows: (40)

Design Considerations
Tis section presents the design procedure of inductors and capacitors.
In equation ( 42), ∆i L m is the magnetizing inductance's current ripple, which can be determined using the following equation: Using the current of capacitor C 1 in modes 1 and 2, the minimum (I min L m ) and maximum (I max L m ) currents of L m are achieved as follows: (44) Additionally, using equation ( 22), turns ratio of the coupled inductor can be calculated versus input voltage, output voltage, and power switch's duty cycle: Te magnetizing inductance maximum current is used for designing of the coupled inductor.As a result, the magnetizing inductance must be specifed as equation (42).Te magnetizing inductance maximum and RMS current can be written as follows: In the next step, using equation ( 7), the core size can be calculated using the following relation: 6 International Transactions on Electrical Energy Systems Te primary side number of winding turns the coupled inductor is obtained using the following equation: Ten, the percentage of window area allotted to each winding is determined as follows: , and e 3 � n 3 I n3 Also, the wire size can be obtained using the following equation: , and a w3 � e 3 k core W a n 3 . (51) In the experimental prototype, an EE55 Ferrite Core is used.Te magnetizing inductance is selected at 300 µH, and for this value, the number of windings in obtained as n 1 � n 2 � n 3 � 34.Using equation ( 52), if L m � 300 μH and coupling coefcient is considered 0.98, the value of leakage inductance is obtained which is almost 6 μH.
4.2.Capacitors.In order to minimize the voltage ripple across capacitors, the following equation is assumed: Terefore, the minimum values of C 1 ∼C 5 can be calculated as follows:

Efficiency Analysis
Te total power losses of the proposed converter can be calculated using the following equation [13]: In equation ( 55), Loss Switch is the power switch's power losses and presented in the following equation: (56) In equation (56), t R and t f are the rise and fall time which are the characteristics of the power-electronics switch.Loss Diodes presents the total loss of diodes, which includes conduction and forward losses as follows: Loss Capacitors and Loss Magnetics are the power losses of the capacitors and the magnetic components which can be obtained as follows: In equations ( 57)-( 59), the RMS currents are required.RMS currents are calculated and summarized as follows: International Transactions on Electrical Energy Systems (68)

Comparison Study
Tis part presents a comparison among the presented high voltage topology and other similar coupled inductor-based topologies ( [1,3,5,7,9,10,12,[25][26][27][28][29][30]).For this purpose, the number of used components, including the number of switches, diodes, capacitors, and magnetic devices (inductors and coupled inductors), voltage gain, normalized maximum peak voltage over semiconductors, and input current ripple are taken into account.Based on Table 1, topologies in [3,30] have a lower components count.In [30], only one magnetic core was used.However, this topology sufers from high peak voltage across diodes, and the maximum voltage stress of [30] is equal to the output voltage.In [26,29], two power switches were used, which is more than that of the others.Comparison of voltage gains is shown in Figure 7(a).In the fgure, the coupled inductor turns ratio is assumed to be equal to 1. Te proposed converter and topology of [7] present higher voltage gain than other structures.However, for D > 0.55, the suggested converter has high voltage gain than that of [7].Also, the topology in [7] sufered from high input current ripple, while the proposed topology has an input current with low ripple, which is suitable for renewable energy sources.Te comparison results of voltage stress across switches and diodes are shown in Figures 7(b) and 7(c).For N = 1, the presented topology has lower voltage over switch than other introduced converters.For N > 1.5, the peak voltage across switches of [29] was lower than that of the proposed converter.However, it is clear that, for higher values of the turns ratio, the power loss is increased.According to Figure 7(c), in the converters presented in [1,5,10], and [25] the peak voltage on the diodes is lower than that of the suggested topology.However, these converters obtain low voltage gain with high peak voltage on switches.Terefore, considering the comparison results, it can be deduced that the proposed converter has a high voltage conversion ratio with low voltage stresses across semiconductors.Additionally, this high voltage gain is obtained with reasonable components count and low input ripple.Te low input current is an important characteristic in DC-DC converters especially in those applied in renewable energy systems.However, some high gain converters present higher input current ripples [31,32].

Experimental Results
Tis section presents the experimental results of the proposed converter.For this work, a 580 W, 46 V to 400 V prototype is built and tested.Te photo of the experimental prototype is shown in Figure 8. Specifcations of this prototype are given in Table 2. Based on the table, the switching frequency is equal to 25 kHz.It should be mentioned that another prototype with the power rating of 1 kW and the switching frequency of 50 Hz has been implemented and tested and its experimental results are also included.
Te voltage across capacitors C 1 ∼C 5 are shown in Figures 9(a)-9(d).According to Figure 9(a), the voltage over capacitor C 1 is measured 284 V. Tis result can verify equation (20).Te voltage across C 2 and C 3 is obtained as 148 V and 114 V, respectively.Tus, equations ( 12) and ( 16) are proved.Voltage waveforms of capacitors C 4 and C 5 are depicted in Figure 9(d).Using these results, equations ( 18) and ( 21) can be verifed.
Te voltage waveforms of diodes D 1 ∼D 4 and power switch S are demonstrated in Figures 10(a   (1), (10), (25) (3) (5) (7) ( 9), ( 28  International Transactions on Electrical Energy Systems the fgures, the peak voltage across D 1 ∼D 4 is measured equal to 115 V, 230 V, 230 V, and 115 V, respectively.Also, the maximum V s is about 125 V. Terefore, the presented equations in (25) are verifed.A comparison of theoretical and experimental results of the capacitors and semiconductors voltage is presented in Table 3.
Te current waveforms of input inductor and coupled inductor are depicted in Figures 11(a) and 11(b), respectively.As can be seen in Figure 11(a), the proposed converter has a low input current ripple, which is suitable for renewable energy applications.
To regulate the output voltage versus disturbance in input voltage, a closed-loop system is designed, as shown in Figure 12.Te open-loop and closed-loop output voltage of the suggested converter is measured and shown in Figures 13(a In order to show the ability of the proposed converter for operating in high switching frequency (50 kHZ) and high power level (1 kW), the experimental results provided in these conditions are shown in Figure 14.Te voltage across the switch is shown in Figure 14(a) which indicates that its maximum of-state voltage is 145 V. Te output voltage and current are shown in Figure 14(b).Te average value of the output voltage is about 390 V and the average output current is about 2.40 A resulting in output power of 936 W.

. Conclusion
Tis article proposed a topology of nonisolated high step-up DC-DC converter with high voltage conversion ratio for renewable usages such as PV power systems.Te suggested topology is designed based on three coupled inductors and VMC technique.Te major benefts of the proposed topology are continuous input current with low ripple, low voltage stress across semiconductors, common ground between input and output ports, high voltage gain, low volume and cost, and high efciency.To obtain a high output voltage, the windings of the coupled inductor are combined with VMC, which leads to a higher output voltage with lower duty cycle.Terefore, the conduction power losses of the power-electronic switch are decreased.A 580 W, 400 V, 25 kHz and another 1 kW, 400 V, 50 kHz prototypes are built, and the experimental results are presented to indicate the validity of mathematical analysis and efectiveness of the suggested structure.Te experimental results indicated that the high voltage gain is achieved with low power losses while maintaining the continuous input current and low voltage stress on the active switch.

Figure 1 :
Figure 1: Application of the high step-up DC-DC converter in grid-connected PV systems.
power switch S is turned OFF, and diodes D 1 , D 3 , and D 4 are forward biased.Te equivalent circuit of mode 2 is demonstrated in Figure 4(b).Based on the fgure, the voltage across input inductor L in is equal to (V in − V C3 ).Tis negative voltage makes a negative slope on i Lin .Additionally, the voltage over leakage and magnetizing inductances is V C4 /N.Tus, their currents are increased linearly.During this mode, capacitors C 3 , C 4 , and C 5 are charged, and capacitors C 1 and C 2 are discharged.

Figure 3 :
Figure 3: Te key waveforms of the presented topology.

4. 1 .
Inductors.To obtain continuous conduction operation, the current ripples of input and magnetizing inductors are considered as ∆i L ≤ 2I avg L .Minimum values of L in and L m are determined as follows:
) and 13(b).At the rated power (580 W), output voltage and current are measured as 400 V and 1.45 A, respectively.For closed-loop output voltage regulation, a PI controller is adjusted as k(1 + sT)/(sT), where k � 0.001 and T � 0.022.Based on Figure 13(b), when the input voltage is changed, the output voltage is regulated at 400 V with minimum oscillation.

Figure 7 :
Figure 7: Comparison results.(a) Te voltage gain (M) versus the duty cycle (D), (b) V S /V o , and (c) V D /V o .

Table 2 :
Specifcations of the experimental prototype Te minimum efciency is measured at W, which is 93.11%.Terefore, P � 50∼580 W, and the efciency is obtained between 93 and %96.2.