Delay Testing Method for Off-Site Asynchronous LTE Networks Based on Singular Value Removal

Key Laboratory of Specialty Fiber Optics and Optical Access Networks, Joint International Research Laboratory of Specialty Fiber Optics and Advanced Communication, Shanghai Institute for Advanced Communication and Data Science, Shanghai University, Shanghai 200444, China Shanghai Engineering Research Center of Driverless Train Control of Urban Guided Transport, Research & Design Institute, CASCO Signal Ltd., Shanghai 200072, China


Introduction
In order to test the up-link and down-link transmission delay of the Long-Term Evolution for Metro (LTE-M) [1,2], it is necessary to synchronize the clock of the personal computer (PC) between the two terminals. In the communication-based train control (CBTC) system of rail transit, there exists only one way of LTE between the train and ground, and the clock synchronization between the two terminal PCs could not be realized. e commonly used IxChariot [3] uses NTP protocol to obtain the loopback delay through sending and retrieving the test data. With Ixchariot, the handover delay of LTE-M is studied by testing the loopback delay, and moreover, the unidirectional transmission delay was considered as one-half of the loopback delay [4][5][6]. Iperf [7] is a performance measurement tool for the network communication protocol, and it is used to test the network throughput, statistical delay jitter, and packet loss rate. Wireshark [8] captured all the data packets flowing through the network card, and it can further detect the network security-related issues [9]. None of the above tools can be used to test the transmission delay when the service data only transfer in the case of a one-directional link.
To analyse the time synchronization scenario, the delay was measured in one-way transmission by utilizing the double Network Interface Card (NIC). One network port was used for the NTP to synchronize the clock while the other network port transmits the service data. However, such scheme is not applicable to the rail transit systems. In the wireless sensor networks, by using the timestamps in the physical layer [10], the time offset error is achieved lower than 100 picoseconds on the platform of field-programmable gate array (FPGA); however, this method is inappropriate to obtain the timestamps in our test scenario. e localization problem in wireless sensor networks (WSNs) mostly depends on clock synchronization between nodes. e coupling between synchronization and localization has been studied in many related works [11,12], and localization is performed based on time of arrival (TOA) or time difference of arrival (TDOA) measurements. In order to achieve high accuracy, the localization scheme takes the very complex process of precise clock synchronization among all nodes as the cost [13]. e complex clock synchronization algorithm is not suitable for calculating the time delay of train-ground communication with high timeliness. Timing-sync Protocol for Sensor Networks (TPSNs) [14] is generally a time synchronization method for the large-density network nodes. Each node needs to be synchronized according to the hierarchical structure, which leads towards more packet switching times and higher protocol energy consumption, so it is not necessary to use it for the communication between both ends of rail transit. Most of the multinode-based cooperative network synchronization [13][14][15] focuses on the cooperation architecture of the node network, while the research on the synchronization method between the two nodes is less. Based on the wireless sensor network, a method of software skew and offset compensation [16,17] is proposed to solve the problem of single hop direct connection synchronization between the two nodes. Apart from this scenario, the communications of CBTC go through the multiple nodes, and eventually some singular values are generated.
According to the requirement of CBTC communication synchronization, the contributions of this paper are as follows: (i) A modified software skew and offset compensation scheme is proposed. Since some singular values are generated in the communications of CBTC, thus in order to ensure the accurate measurement of time delay, the singular values are carefully removed. (ii) A three-stage asynchronous clock calibration scheme is proposed, which contains the first calibration stage, the working stage, and the second calibration stage. In the calibration stages, the relative skew and offset of the transmitting and receiving clocks are accumulated to verify the transmission delay in the working stage. e structure of this paper is as follows: Section 2 describes the clock drift model and formulates the clock synchronization. Section 3 proposes a LTE-M one-way transmission delay measurement method and the method of singular value removal. Section 4 presents an experimental test of the LTE up-link and the down-link delays for the Shanghai Zhangjiang Metro Training Line. Finally, the conclusion is given in Section 5.

Clock Drift Model.
e clock synchronization of nodes in communication networks is very necessary, and each node has its own local clock. e clocks between the two network nodes are driven by the local oscillators, and the clock differences occur in the case of the oscillator frequency and the counter offset [18]. erefore, the local hardware clock can be expressed as the formula [16,17]: where t is the real time, α i is the clock skew of hardware, and β i is the clock offset of hardware. In practice, α A ≠ α B , β A ≠ β B due to the character of PC's oscillators, and α i , β i are the hardware parameters that cannot be adjusted artificially, as shown in Figure 1. We define the clock difference between the two PCs as Δt, where Δt 0 � β A − β B stands for the start clock difference. In order to achieve the time synchronization, first of all, we need to discuss the relative relationship between the hardware clocks at both ends. It is obvious that the clock difference mainly depends on the relative offset β A,B and the relative skew α A,B : where and β A,B parameters directly; therefore, we need to fit the parameters of the linear function through a large number of test data.

ree-Stage Correction Principle.
In order to get more accurate relative offset and relative skew, this paper proposes a new clock synchronization method, which divides the test into three stages: the first calibration stage, the working stage, and the second calibration stage. In calibration stages, the calibration test data are transmitted by sending and returning of data. Moreover, in the working stage, the unidirectional data of train control are transmitted for further processing. For the better understanding of this model, the time of transmission and arrival is recorded, as shown in Figure 2.
In the first calibration, the relative offset 1 can be calculated. In the second calibration, the relative offset 2 can be obtained. According to relative offset 1 and 2, the relative skew of the clock at both ends can be calculated. Afterward, according to the relative offset and relative skew of the clocks at both ends, the linear relationship of time at both ends is estimated.
e results are used to calculate the corresponding time at both ends during the working stage. us, the time delay of one-way transmission in the working stage can be acquired cautiously.

Principle of Relative Offset and Relative Skew.
e relative offset between two ends of PC is obtained by using the NTP [19]. e NTP protocol model is shown in the left of e A-terminal records the time information of receiving packets as H A (t 2 ). Second, the A-terminal will send H B (t 1 ), H A (t 2 ), and the current delivery time H A (t 3 ) to the B-terminal, which records the receiving time H B (t 4 ). us, we find Afterwards, we apply the NTP time model to the H A − H B plane as shown in the right of Repeat the above test for the N times to achieve the H A1 (t Mi ) and H B1 (t Mi ), subsequently average them, and we can get After the first calibration, the LTE-M system enters the working stage. Both ends transmit train control data and record the local time of transceiver. After the working stage, the second calibration is carried out, and the method is the same as the first calibration. Later on, we achieve the second point on the linear line, Test2 ( H A2 (t M ), H B2 (t M ) ).
According to the clock relationship of two terminals (2), we acquire a linear fitting line of H A and H B by using Test1 and Test2: From (5)- (7), we can get is formula indicates the clock relationship between the two ends, where α A, e one-way transmission time delay obtained in the working stage can be improved by using the clock relationship. As shown in the working stage in Figure 3, for example, the A-terminal sends the local time H A (t n ), the B-terminal receives and records the receiving time H B (t n+1 ). We can obtain by the clock relationship function (8) as e true one-way transmission delay is equivalent to

The working stage
The first calibration stage PCA The second calibration stage

Journal of Computer Networks and Communications
In theory, only initial synchronization is needed without replacing the equipment. However, due to the existence of test errors such as singular value, the fitting line is not completely accurate. After a period of time, errors are easy to appear, so periodic synchronization is considered [20]. Because it is a three-stage clock calibration, the working stage represents the train entering the station and communicating with the base station. In order to maximize the accuracy of the delay for safety reasons, periodic synchronization can be carried out according to the frequency of the train entering the station.

Singular Value Removal.
During the first and second clock calibration, there exist various phenomena, such as data waiting, queuing, blocking, and packet loss. erefore, in order to handle this issue, there are placed jitters and some singular values in the delay data, as shown in Figure 4. Most of the transmission delays are distributed near the same mean, while some singular values are very large or very small. ese singular values in calibration stages affect the accuracy of clock calibration and must be removed. e special small and large values existing only account for a small proportion, thus can be considered as singular values. When the α% data are removed as the singular value, the first calibration fitting line is set to H B � f 1 (H A ) and the second calibration fitting line is set to H B � f 2 (H A ) by formula (7), respectively. e principle of selecting α% is as follow: f 1 and f 2 can be fitted into a straight line to the greatest extent, where M is the data length and d denotes the time-mean-variance distance between two fitting lines: when d is taken to the minimum value and α% is the threshold value.

Verification of ree-Stage Method.
In order to further verify the feasibility of three-stage asynchronous clock correction, after completing three stages of CBTC transmission experiment, we disconnect two PCs from the network and then connect two PCs directly with the network cable. We propose the verification stage to verify whether the clocks at both ends of A and B conform formula (7) by the NTP time model. e verification stage is shown in Figure 5.
When H A (t M ) is substituted into formula (9), the estimated value H B ′ (t M ) can be calculated. After several values are taken, we record the delay error between the calculated value and the real value Table 1 and Figure 6 as follows. In Figure 6, we find the delay error which is evenly distributed around 0. Because of the complexity of the system and the multiple nodes of the transmission path, the transmission delay obtained after the same size of data transmission is not the same. In the Table 1    e average difference is − 0.69 ms and the root mean square is 3.07 ms in this test. Moreover, among the 71070 packets, the number of packets whose absolute error is greater than 8 ms is 18, which can be ignored. e results show that the approach meets the requirement of CBTC delay measurement accuracy of 1 ms and can be used for the one-way communication in asynchronous clock condition of trainstation communications.

LTE System Structure of Zhangjiang Metro Training Line.
e LTE-M standard stipulates that in the transmission of train control service, the probability of one-way singlechannel transmission delay greater than 150 ms cannot exceed more than 2%. e transmission delay test of LTE-Metro system is carried on Shanghai Zhangjiang Metro Training Line, and the actual scene is shown in Figure 7(b). e LTE-M system architecture is mainly composed of Evolved Packet Core (EPC), Baseband Unit (BBU), Radio Remote Unit (RRU), and Terminal Access Unit (TAU). e train PC and the trackside PC carrying the CBTC data are basically the test platform construction carriers. e base station equipment trackside PC is connected to core network through switch 3. e train equipment is connected to TAU, and on the other hand, it is further connected to switch 2 through wireless communication, as shown in Figure 7(a). At this time, the trackside PC is far away from the train PC, and the train equipment moves with the train at high speed, so it cannot be directly connect for clock synchronization. erefore, by using the three-stage asynchronous clock correction method to run the network layer test program through the single channel, we can precisely measure the

Delay Test of LTE Communication System in Laboratory.
We connected the LTE system in the laboratory according to Figure 7 to verify the feasibility of this method. e single-channel synchronization test method proposed in this paper is compared with the dual channel synchronization test method. Table 2 shows the test results of our method under the clock asynchronous condition.  Table 4. From the result in Table 4, it is demonstrated that the singularity threshold α% is determined in each experiment. It can be seen that the singular values in the calibration stage are random, so each de-singularity needs to select the minimum d according to the actual situation. e transmission delay test of Shanghai Zhangjiang Metro Training Line adopts the three-stage asynchronous clock correction method. Some of the test data are listed in Table 5. In the transmission of train control service, the up-link average delay at the trackside is basically maintained at 25-28 ms and the maximum delay is maintained at 49-121 ms. e down-link average delay at the train is maintained at 15-22 ms, and the maximum delay is maintained at 84-237 ms. e probability of the one-way transmission delay at the trackside and the train is greater than 150 ms, which is less than 2%. Almost all of the values are perceived nearly 0%, except one value which is greater than 0.20%, as given in Table 5. ese results satisfy the requirements of LTE-M test indicators and verify the feasibility of the proposed method in the test.

Conclusions
In this paper, the time difference is considered in terms of relative offset and the relative skew. A three-stage asynchronous clock correction method, which contains the first calibration stage, the working stage, and the second calibration stage, is proposed in the case of off-site    Data Availability e measurement and simulated data used to support the findings of this study have not been made available because of the protection of intellectual property rights. Moreover, the data are shared with our partner company and will be used in our future work.

Conflicts of Interest
e authors declare that they have no conflicts of interest.