Current Control and Active Damping for Single Phase LCL-Filtered Grid Connected Inverter

LCL filter has been widely used in the grid connected inverter, since it is effective in attenuation of the switching frequency harmonics in the inverter. However, the resonance in this filter causes stability problems and must be damped effectively to achieve stability. +ere are some methods to damp the resonance; one method is passive damping of resonance by adding a series resistor with the filter capacitor, but passive element reduces the inverter efficiency. Other method uses active damping (AD) by adding a proportional control loop of filter capacitor current, but this method needs additional sensor to measure filter capacitor current; moreover, when the control loops are digitally implemented, the computation delay in AD control loop will lead to some difficulties in choosing control parameters and maintaining system stability. +is paper presents current control scheme for the grid connected inverter with the LCL filter. +e proposed scheme ensures the control of injected current into grid with AD of the resonance in the LCL filter while keeping system stability and eliminating the effect of computation delay of the AD loop. An estimation of filter capacitor current with one step ahead is performed using the discrete time observer based on measuring the injected current.+is reduces the cost and increases the robustness of the system. Proportional Resonant (PR) controller is used to control the injected current. Design of control system and choosing its parameters are studied and justified in details to ensure suitable performance with adequate stability margins. Simulation and experimental results show the effectiveness and the robustness of the proposed control scheme.


Introduction
With the rapid growth in global energy consumption, distributed power generation systems (DPGS) based on renewable energy sources such as solar energy and wind energy has attracted much more interest because of its environment friendly features, where they minimize greenhouse gas emissions and pollution. e grid connected voltage source inverter (VSI) plays an important role in DPGS, where it connects DPGS to the utility power grid. e inverter injects sinusoidal current to the grid, and this current must be synchronized with grid voltage [1,2].
Conventional proportional integral PI controller has well-known drawbacks as inability to track sinusoidal reference without the steady state error in the stationary reference frame, so it needs to convert AC quantities to DC quantities in d-q synchronous reference frame based on Park transformation, but this transformation increases the burden on DSP and it is difficult to be applied in single phase systems [3][4][5]. For those reasons, proportional resonant (PR) controller is more attractive since it provides infinite gain at grid fundamental frequency. So, it eliminates the steady state error and contributes in rejection of current harmonics caused by grid voltage. Also, it could be used in the single phase system without any transformations and has the ability of harmonics compensation [6][7][8].
Pulse Width Modulation (PWM) of VSI adds harmonics to grid current. So, a filter is needed to attenuate these harmonics. e LCL filter is more preferable than the L filter since it can provide higher attenuation ability, smaller volume, and lower cost compared with the conventional L filter [9][10][11][12][13]. However, the LCL filter generates high gain peak at resonant frequency. So, any harmonics in grid voltage or inverter voltage close to resonance frequency will cause resonance in the injected current. In the literature, many resonance damping methods have been investigated. e simplest method is the passive damping which is implemented by adding a series resistor to the filter capacitor. is method increases the power loss in the inverter [6,14]. For this reason, the active damping (AD) method is more attractive. e most widely used method to achieve AD is the proportional control loop (i.e., damping loop) of filter capacitor current [6,15]. However, this method requires measurement of filter capacitor current. Moreover, some problems related to system stability will appear when the controller is digitally implemented due to computation and modulation delays, especially the delay of AD loop [16,17]. It has been proved in [16,17] that the AD loop is necessary when the resonant frequency ω res is smaller than one sixth of the sampling frequency ω s (ω res < ω s /6). e system can be stable without the AD loop if ω res > ω s /6. If ω res � ω s /6 (i.e., the boundary case), the system cannot be stable even with the AD loop. So, it is preferable to reduce the computation delay in the AD loop [16]. One solution proposed is to shift the capacitor current sample instant toward PWM update instant [16], but aliasing in measured current could happen. Some other techniques were proposed to avoid using additional current sensor and achieve damping [18,19]. In [19], estimate the capacitor current was performed directly from the model depending on the derivative of the measured current, where inverter side current is used as feedback; however, differentiation of measured current will amplify the noise. Ideally, to estimate the capacitor current based on measuring grid side current, second derivative of the measured current is required. However, in practice second derivative could not be implemented due to noise amplification [18]. In [20], the second derivative of the measured current is replaced by the first-order high pass filter, but there would be some difficulties in choosing parameters of high pass filter to maintain stability. e full state feedback controller is used with 11 states' model in [21]. e robust observer using LMI criterion is implemented to achieve active damming in [22]. In [23], inverter side current is measured and capacitor current is estimated. e extended state observer (ESO) is used to estimate capacitor current and grid voltage but the effects of delays were not discussed. In [24], the full state observer is used with measuring grid side current and an additional lead lag network to compensate control delay. e notch filter to eliminate resonance harmonics components in inverter output voltage is used in [25]. However, the notch filter must be tuned carefully since erroneous tuning will compromise the LCL-filter stability.
In this paper, step by step design of grid current control is presented. e current control consists of the PR controller to control the grid current, and AD control loop to eliminate the resonance caused by the LCL filter. e AD control loop is implemented without the additional capacitor current sensor. Discrete time full state Luenberger observer is used to estimate capacitor current and avoid the computation delay in the AD loop. Design of control system parameters, to ensure suitable stability margins, and effects of delay on the single-phase system are explained in the context of this paper. Simulation and experimental results show the effectiveness of the proposed control scheme. is paper is organized as follows. In Section 2, the model of LCL filter and inverter is presented. It shows the necessity of damping the resonance in the LCL filter to achieve system stability. In Section 3, synchronous sampling and delay sources will be studied and modelled, and the effect of delay in the AD loop will be discussed. Section 4 presents choosing of controller parameters when the delay in the AD loop is cancelled, as well as the discrete time Luenberger observer is designed to avoid measuring filter capacitor current and the delay in the AD loop. In Section 5, simulation and experimental results are presented to validate the proposed control scheme. In Section 6, the conclusion is stated.

Modelling of the Inverter and LCL Filter
e closed loop for grid current control with AD based on measuring filter capacitor current is shown in Figure 1.
e VSI is connected to the grid through the LCL filter. e LCL filter and inverter model could be written as follows: where L 1 , L 2 , and C are the filter parameters, i i , i g , v c , v i , and v g are, respectively, inverter side current, grid side injected current, filter capacitor voltage, inverter output voltage, and grid voltage, u i is the control signal, K PWM is the gain of the inverter and the modulator, v i � K PWM u i . To track equations easily, Table 1 contains the main parameters definitions used in this paper. Taking the average model of the PWM modulator, K PWM could be determined as K PWM � V DC /V carrier . So, if V carrier is scaled to equal V DC , then K PWM � 1. e system given by equations (1) and (2) could be modelled in S domain as the block diagram shown in Figure 2. e LCL resonance frequency is given by e grid side injected current can be written as follows: e transfer functions G i g u i and G i g v g could be expressed as follows: Journal of Control Science and Engineering From equation (4), the first term is the grid current caused by the inverter voltage and the second term is the grid current caused by the grid voltage, which plays the role of output disturbance of the controlled system and must be rejected by the controller. e loop gain given in equations (5) and (6) has infinite gain at the resonant frequency ω res , so any harmonics in the grid voltage or inverter voltage close to resonant frequency will cause resonant current and instability. To solve this problem, a series resistor is added to the filter capacitor, but it will increase the power loss in the inverter and that is known as passive damping. For this reason, AD is more preferred, the most widely used method to achieve AD is by taking capacitor current i c multiplied by proportional gain K d and adding it to the input of the modulator, which is equivalent to add a parallel resistor (virtual resistor) to the filter capacitor [26,27].
As shown in Figure 1, Phase Locked Loop PLL is used to estimate the angle θ of the grid voltage. e signal I Aref is the desired amplitude of the grid current to be injected into the grid. Grid current reference must be synchronized with the grid voltage.
en, the grid current reference could be generated as follows: Error signal e I � I ref − i g is the input of the current controller G PR , which is the PR controller. Since it achieves high gain at the grid frequency, the PR controller high gain reduces the steady state error and rejects the effect of the grid voltage on the controlled current. e transfer function of the PR controller is given as follows: e parameters k p , k r , and ω g are proportional gain, resonant gain, and grid frequency, respectively. In equation (8), the gain of resonant term at ω g is k r , and the controller has some margins around ω g , where the gain of resonant term at ω g ± ω i is k r / � 2 √ , where ω i could be chosen 1%ω g [3,28,29].

Delay Sources and Its Effect on Active Damping
When the current controller of VSI is digitally implemented, synchronous sampling of the measured current is preferred where samples are taken when the PWM counter of the DSP reaches its maximum and/or minimum value [30]. is sampling technique avoids sampling the harmonics in measured current caused by switching and gets the average value of the current. Moreover, it avoids switching noise or electromagnetic interference (EMI) when the transistors switch on or off [1,31]. Figure 3 shows the digital control process; bipolar PWM is used to drive VSI. e triangular signal has normalized amplitude carrier. At time instant k, the interrupt of the PWM occurs and the PWM comparison register is updated according to duty ratio D k , simultaneously the analog to digital converter (ADC) takes the measurements. en, the controller starts computing the convenient duty ratio D k+1 and the computation must be finished before time instant k + 1, where the PWM comparison register will be updated again, which means that the digital controller produces delay equal to one sampling period. is delay is commonly called computation delay and it is modelled in S domain as G cd (s) � e − T s S . After updating the PWM comparison register, it is compared with the carrier to generate the duty ratio. is behavior could be modelled by ZOH as follows: In frequency domain, s � jω; then, Since the spectrum of a sampled signal, which is the input of the ZOH, is divided by T s , then the delay caused by modulation is G md (s) � e − 0.5sT s , which means the modulation delay equals half sampling period.
Taking the delay into account makes the control design more complex. Figure 4 shows the block diagram of the control system, which takes into account the delay. e transfer functions G cd1 and G cd2 are, respectively, the computation delay in the AD control loop and in the grid current control loop. Generally, G cd1 � G cd2 � e − T s S . From the block diagram, it could be found that e transfer function G ol is the open loop transfer function from grid current error e I to grid current i g when v g � 0. G g is the open loop transfer function from grid voltage to grid current when e I � 0. G g and G ol are given by equations (12) and (13), where delays are included in S domain [32]: It could be seen from equation (11) that the stability of the system depends on the open loop transfer function G ol . e AD loop adds a term related to the AD gain K d in the denominator of the open loop transfer function. is parameter K d could be tuned together with the control parameters to achieve suitable damping, good stability margins, and good current performance.
Without the AD loop (i.e., K d � 0), the system can be stable if the resonant frequency is greater than ω s /6, where ω s is the sampling frequency [17,33]. is is because of the delay in the system G cd2 G md � e − 1.5T s S , which causes a phase lag in the open loop transfer function G ol and will contribute a −90°in phase at ω s /6. So, if the resonant frequency is greater than ω s /6, then the phase of the open loop will cut Figure 3: Digital control process to drive VSI using bipolar PWM. −180°at ω s /6. Since the proportional resonant controller is equivalent to proportional gain k p at high frequency, the system can be stable by choosing a suitable controller gain without the need of the AD loop. Figure 5 shows the bode plot of G ol without the AD loop, with and without considering the delay.
Indeed, high resonant frequency will cause higher PWM current ripples. Good attenuation for PWM current ripple means reducing resonant frequency. So, if ω res ≤ ω s /6, the AD loop is essential to achieve system stability with good PWM harmonics attenuation.
When the delay is taken into account, the AD loop is equivalent to a virtual impedance instead of the virtual resistor connected in parallel with the filter capacitor [16,26,27]. By replacing the feedback from capacitor current i c to capacitor voltage v c and adding the effect of the active damping loop to the output of 1/L 1 s, as shown in Figure 6, Virtual impedance can be introduced as resistor R eq and capacitor C eq in parallel with C, as shown in Figure 7. Replacing s � jω in equation (14), then Z eq � R v e 1.5T s S � R v cos 1.5ωT s + j sin 1.5ωT s � R eq � � � � � 1 jωC eq .
R eq and C eq are determined as where R eq plays the main role in damping the resonant frequency peak. However, it must be noted that the equivalent resistor can go negative for the frequency ω > ω s /6. And the negative equivalent capacitor C eq will change the resonant frequency of the system. So, increasing AD gain K d will increase the actual resonant frequency. If ω res is equal or closed to ω s /6, then a small change in K d will shift the resonant frequency to be in the negative resistor region. is negative resistor will cause two unstable open loop poles and the system will be nonminimum phase system, which should preferably be avoided if a fast-dynamic response is demanded [18]. According to [16,17], the system cannot be stable if ω res � ω s /6, and it is difficult to achieve good damping if ω res is close to ω s /6. From equation (16), it could be seen that if the AD loop delay G cd1 � 1 (no computation delay in AD loop), negative resistor will appear at ω > ω s /2 which is far from ω s /6 and that means the possibility of extending K d range and achieving good damping and avoiding unstable poles pair.

Control Design
As seen previously it is better to eliminate AD loop computation delay. Suppose that AD loop computation delay is cancelled (i.e., G cd1 � 1); then, the open loop transfer function in equation (12) is given as follows: In general, the cutoff frequency ω c should be chosen higher enough than grid frequency to achieve fast dynamic response, at the same time should be less enough than the resonant frequency to achieve good stability margins [6,29,34]. e LCL filter can be approximated by the L filter, where L � L 1 + L 2 at frequencies lower than resonant frequency (i.e., the capacitor current can be neglected). At the same time, the proportional resonant controller can be approximated by proportional gain k p . So, the open loop gain can be approximated as follows: It could be seen that choosing the cutoff frequency ω c depends on k p only. By replacing s � jω c and taking |G ol (jω c )| � 1 in equation (19), then k p can be found as follows:  (21) can be obtained from ∠G ol (jω 0 ) � −π: en, GM at ω 0 is given by Figure 4: Block diagram of the control system including delay with AD by measuring capacitor current.

Journal of Control Science and Engineering
GM � −20 log Figure 8 shows the open loop bode plot for different damping gain values K d ; then, K d can be tuned to achieve good damping and suitable gain margin (GM > 3 dB). It should be noted that increasing the damping gain too much will affect the phase margin badly.
After choosing suitable values for k p and K d to guarantee suitable cutoff frequency and good gain margin, then phase margin (PM) can be manipulated by changing k r . Commonly, PM is chosen to be (PM > 45 ∘ ). PM � π + ∠G ol (jω c ) then from equation (18) Figure 5: Bode plot of G ol without the AD loop, with and without considering the delay when ω res > ω s /6.   Journal of Control Science and Engineering Continuous time system in equation (1) could be described in discrete time with ZOH as follows: where e system is observable by measuring grid current i g since rank(O) � 3, where O is the observability matrix given as follows: To achieve AD without measuring the capacitor current, capacitor current can be estimated using full state Luenberger-like observer given as follows: where A o , B o , and D o are the observer matrices and L � [l 1 l 2 l 3 ] T is the observer gain vector. It could be seen that the observer in equation (26) has another benefit of providing one step prediction for current estimation since it estimates state space vector at time instance k + 1 using samples of time instance k, which means avoiding the delay in the AD loop, as shown in Figure 9; as seen previously, it is preferable to cancel this delay for system stabilization.
K d i c is taken as feedback to the input of the inverter. It is a state feedback with gain If the observer matrices match the system matrices (i.e., , then from equations (24) and (26) the dynamic of the observer error is given as follows: Based on separation principle, the AD loop gain and observer can be designed separately. e observer gain vector should be chosen in a way that does not affect the bandwidth of the system [24,35]. e characteristic equation of the observer error is third-order polynomial and has three poles, which can be located arbitrary in z plan since the system is observable. e poles are chosen as follows: which consists of one real pole and two complex conjugated poles. e poles of the observer should be chosen at least twice faster than the dynamic of the system. One of the poles is dominant one and the other two conjugated poles should Frequency (rad/s) ese two poles are equivalent to a second order system whose characteristic are determined by (ζ, ω o2 ); the observer dynamic is determined by its dominant pole. e proportional resonant controller is commonly discretized using Tustin transform with prewarping, since it provides good approximation for this controller around grid frequency [6,36]: e control design of the system can be summarized step by step as follows: (a) Determine cutoff frequency ω c by tuning k p according to equation (20) (b) Determine gain margin GM by solving equations (21) and (22) to find proper damping factor K d (c) Determine phase margin PM by tuning k r according to equation (23) (d) Determine observer gain to place the observer poles in proper locations according to equation (28) (e) Discretize the PR controller using Tustin transform with prewarping using equation (29)

Simulation and Experimental Results
Simulations and experiments were carried out to validate the proposed control scheme. e simulations are performed using Matlab/Simulink. e experiments are performed using 1 kW grid connected inverter with the LCL filter implemented in the lab.
e system parameters used in simulations and experiments are listed in Table 2.
As mentioned previously, cutoff frequency ω c should be higher enough than grid frequency ω g to achieve fast dynamic response. So, it could be chosen as ω c � 10ω g . en, from equation (20), k p � 25. AD gain K d and resonance gain k r could be determined to achieve GM > 3 dB and PM > 45 ∘ . By solving equations (21)-(23) numerically using Matlab, it could be found that k r � 1500 and K d � 30 achieve GM � 4.2 and PM � 45 ∘ .
Dominant pole of the observer z 1 � e − ω o1 T s is chosen to be three times faster than system dynamic ω o1 � 3ω c , if (ζ, ω o2 ) are chosen as ω o2 � 5ω c and ζ � 0.7; then, the equivalent part determined by the other two conjugated poles z 2 and z 3 is faster than the dominant pole. Figure 10 shows the simulation results at full load condition, where inverter side current, injected current, and grid voltage are illustrated. It could be seen that synchronization is achieved and tracking the reference signal is performed with the neglected steady state error, and because of using the PR controller, which produces high gain at grid frequency, it eliminates the steady state error in the injected current. e effectiveness of the control method is studied by dropping the reference current from full load condition to half load conditions. Figure 11 shows the simulation result of this case. It could be seen that, at time 55 ms, when the reference signal amplitude dropped from 7 A to 3.5 A, the resonance in the injected current is damped effectively, and the injected current has a fast dynamic response in tracking the new reference. Figure 12 shows AD loop capability to stabilize the system and damp the resonance in the injected current. When the AD loop is disabled at time 50ms, the resonance in the injected current appears.
To study the robustness of the proposed method against parameter uncertainties, each parameter of L 1 , L 2 , and C is changed in a range [−20%, 20%] of its nominal value, and system stability is studied against those changes. Figure 13 shows the closed loop poles map of the system, where all poles stay inside the unit circle. Simulation results show the ability of the control scheme to maintain stability despite of wide range of uncertainty.
In practice, the system with the PR current controller and AD method with the discrete time Luenberger observer is implemented using FPGA cyclone II kit, and the injected current is measured using LEM LA 55-P hall effect current sensor, and the grid voltage is measured using a transformer. Synchronous sampling technique is used, where switching frequency equals sampling frequency f s � 10 kHz. e same filter and control parameters used in simulation are used in practice. e same cases studied in simulation are applied in experiment.
e experiment results are shown in Figures 14 and 15, where Figure 14 shows the experiment result of the grid voltage, injected current, and inverter side current at full load conditions, and Figure 15 shows the experimental result of the control process when current reference dropped from full load conditions to half load conditions; it could be shown that the results of the simulation and experimental are close. e results show the powerful performance of the control method in practice.

Conclusion
In this paper, a control scheme for the grid connected inverter with the LCL filter is presented. e control scheme is composed of two control loops. e first control loop using the PR controller ensures the grid current control. e second loop, AD loop, eliminates the LCL resonance and ensures the stability. e AD loop is implemented using the discrete time Luenberger observer. Simulation and experimental results show the effectiveness of the proposed control scheme. e proposed control scheme eliminates the computation delay in the AD loop, which has a bad effect on system stability, reducing cost since there is no need to use the additional current sensor. e parameters of the control scheme is chosen and discussed in detail. e results show that when the inverter works in full load conditions, the injected current tracks the reference signal with the neglected steady state error; when the system is tested under hard transient in reference signal from full load condition to half load conditions, the results show the effectiveness in damping the resonant frequency and a fast dynamic response in tracking the reference signal again. In future works, extending the proposed control scheme for the three-phase inverter is planned and the robustness in the proposed control scheme against grid impedance variation and model uncertainty is studied.

Data Availability
e data used to support the findings of this study are included within the article.