Design and Performance Analysis of W-Band Low Noise Amplifier for RFIC-5G Mobile Systems

This paper presents a new approach of the design of a W-band low noise amplifier (LNA) in a 0.13 technology for narrowband and wideband applications. The proposed LNA utilizes input matching bandwidth extensions based on the source degeneration topology, and it is designed and optimized at a center frequency of 94GHz and a supply voltage of 1.2V. The obtained results exhibit a noise figure of 3dB, a power gain of 32dB, and a VSWR of 1.1. The design technique of this LNA is based on an agreeable tradeoff between the available gain of 30dB and the noise figure of 3dB, which leads to good bilateral stability and high linearity described by an input third-order intercept point of -17 dBm. A detailed performance analysis is presented and discussed along this paper. With the aim of a complete and robust integration, all lumped elements and transmission lines are integrated on a silicon PCB having ε r (cid:31) 11.7 and a dielectric loss Tan Δ (cid:31) 0.001 for low manufacturing costs. The prominent results of this LNA indicate that it is suitable for 94GHz-image-radar and RFIC-5G mobile systems.


Introduction
During the past years, massive e orts have been made to obtain optimally designed radio-frequency integrated circuits (RFIC) operating at millimeter-wave bands, addressed to the wide range of 5G use cases and applications. e obtained results have motivated researchers to develop diverse 5G integrated-circuits with limited supply voltages (1-2 V) and ultra-low power consumption [1,2]. In this context, the low noise ampli er (LNA) is a very important component in RFIC.
is is the rst block in a receiver whose primary function is to provide enough gain to overcome noise from subsequent blocks (such as the lter and the mixer), but not too much so as not to overload the mixer. In addition, LNA based on CMOS technologies should provide good linearity as demonstrated in [3,4]. It should have also a speci c impedance, conventionally 50 Ω, at the input source and at the output load. Moreover, LNA should provide low-power consumption especially for portable systems and 5G-enabled IoT devices [5,6]. As W-band LNA applications, Li et al. [7] and Xue et al. [8] proposed various LNA structures for automotive radars.
For CMOS technologies [9], these new RFIC potentialities must be added to a series of useful RFICs on insulating silicon substrates despite the high permittivity of silicon (ε r ≈ 11.7 @ 94 GHz). Among these advantages, we can cite much lower substrate drain and substrate source di usion capacities, better integration density, strong reduction in junction surfaces, and possibility of using high-resistive substrates to obtain passive devices (inductors) of highquality factor. Moreover, the frequency performances and characteristics of CMOS devices have been continuously enhancing, and several RFIC/MMIC results using the CMOS technology operating in E/W-band have been published [10][11][12][13][14]. ese prior LNAs have achieved acceptable performances but have been modest in terms of tradeo between the gain and the noise gure (NF), as presented in [11], where G 14.2 dB and NF 6.3 dB. In our work, LNA is proposed with miniaturized RF inductors followed by microstrip-transmission-line input/output matching networks, as shown in the block diagram of Figure 1. e LNA core is composed of a cascode topology with a drain/source DC bias and stability circuits. e put/output matching networks are represented as a bandpass topology. e studied block is that LNA is the rst element of the RF reception chain. In this context, the main aim of our work is to optimize the suggested model for low-power consumption with low-cost RF components for 94 GHz anticollision radar. e application of the proposed LNA model is not limited only for 94 GHz systems but it is compatible to diverse applications over the W-band such as millimeterwave radar [15] and radar targeting [16] search used for civilian [17,18] and military purposes [19,20], satellite communications [21,22], and various military and civilian geo-tracking applications [23]. To improve these previous applications, the suggested LNA has advantages in terms of power consumption and gain with the NF cost. Moreover, this work gives a good tradeo between the gain and NF with relatively high LNA linearity, like the results obtained by Li et al. in [24]. Besides, the input/output matching networks, device parameters, LC components, and biasing points have been designed to get the e ective results. us, the proposed ampli er is designed with standard microelectronic procedures for low cost, all with the aim of achieving a good performance compared to prior research exposed in [3,4,11,13,14,24,25], as summarized in Subsection 5.4 of this manuscript. is paper is structured as follows: Section 2 deals with the suggested LNA modeling and its design parameters. Section 3 gives polarization circuits with a DC/RF stopper and the corresponding LNA matching networks. Section 4 concludes the modeling and design techniques with the performance analysis of the proposed LNA. Section 5 exposes the obtained results and the discussion. Section 6 draws the conclusions presented as opportunities for research. Finally, all results are performed by Cadence and advanced design systems (ADS) simulators.

Proposed LNA Design
e most important step in designing LNA with the desired performances is the choice of the transistor. Various transistor topologies are available for LNA applications. In this context, the suitable transistor should be designated for a good tradeo between the high gain (G) and the low NF. In practice, the operation frequency is crucial to limit the number of transistors. Figure 2 shows the electronic circuit of the integrated ampli er. e con guration used is a common source (T1) structure with inductive degeneration.
Before going to the presented analysis and techniques of the suggested LNA, it will be useful to rst investigate the topology of the source degeneration cascode LNA, as explored in detail in [26,27]. In general, the source degeneration LNA, represented by the series source inductor «L s » of Figure 2, ensures bilateral stability, good input matching, and a low NF by utilizing L s degeneration to realize 50-Ω input impedance, but without inducing resistive thermal noise.
is con guration presents a good compromise between NF, the gain, and the stability of LNA. e output load is by convention resistive 50 Ω tuned to the working frequency 94 GHz. e addition of a cascode stage (T2) guarantees the isolation between the output and the input of the stage, and it prevents any problem of instability at a high frequency. e input power adaptation is carried out thanks to inductors L6 and L8 which cancel the capacitive part Cin of the input impedance Z in and adjust the real part of Z in to the value of 50 Ω at the pulse working ω 0 . At the output, the adaptation on a resistive load of 50 Ω is carried out by the capacitive divider C10-C13. e C8 and C10 capacitors prevent the stopper of the DC signal from dissipating in the RF generator. e role of the L7 inductor is to isolate the RF signal from DC. Inductors L i (i 1, 2, 3, 4, 5, 10) model, the interconnecting conductors; transmission lines (TL i ) (i 1, 2, 3, 4, 5, 6) model, the package e ect; and these lines are made up of distributed RLC elements where, R 0.880 nΩ, L 1 nH and C 1.6 pF. Resistors R i (i 3, 4, 5) are used to bias the NMOS transistors T1 and T2 and ensure the stability of the ampli er at the operating frequency. However, it should be noted that the power adaptation is necessary to ensure the maximum transfer of power from the source to the load. e supply voltage is xed at 1 V.
ere are several steps to follow the design of the RF ampli er [28]. First, choose the point of polarization without forgetting to isolate the DC signal and the RF signal from each other. en, study the input/output stability of the transistor and stabilize it. If it is not already unconditionally stable, it must then choose a tradeo between the available gain (G a ) and NF and nd the input and output matching circuits that will achieve the desired performance. ese steps lead to obtaining a mask for the nal circuit.

DC Bias and the Polarization Point.
e problem of polarization is quite simple [28]. It is just to nd Vgs which gives the transistor a bias current of 1.374 mA with VDS 1.2 V. We use the complete electrical model of the transistor illustrated in Figure 3 for this DC simulation. Voltage Vgs is then 0.581 V.

RF/DC Signal Stopper.
To avoid any loss of power of the RF signal, it must prevent this signal from going to dissipate in the polarization resistors of the gate and the drain. For this, we use λ/4 microstrip TL terminated by capacitors which must behave like a closed circuit at the operating frequency, as depicted in Figure 3. e end of this TL will be seen as an open circuit at the input of λ/4 − TL. is TL must have a very large characteristic impedance compared to the impedance of the capacitor. By optimization, the width of this TL is equal to 152.4 µm and the capacitance is equal to 0.1 pF. According to the obtained results of the re ection coe cient S 11 listed in Table 1, LNA is properly polarized at 94 GHz without lossless power.

Input Impedance.
To facilitate the analysis of the LNA circuit, we take the assembly of Figure 4(a).
is stage presents a common source ampli er with L s inductance around of 1 nH, inserted between the source and the ground to control the real part of the input impedance. From Figure 4(b), we can extract all physical parameters related to the input impedance (Z in ) as follows: From equation (1), the input impedance (Z in ) can be demonstrated as is impedance which is a series RLC-network is proportional to the value of the inductance LS. It is important to consider that this L s inductor does not bring thermal noise back to the ampli er circuit because a pure reactance is noise    is impedance is then purely resistive at a single frequency (at resonance). However, this method can be used in circuits operating at a narrow band.

Input Matching Network.
In order to maximize the performance of the circuit and ensure a maximum power transfer from the input-source to load (ZL), it is necessary to design a matching network to match the output impedance of the source-RF-generator (Z g ) to the input impedance (Z in ) of LNA, where Z g Z * in and Z g R s . To achieve this task: (i) we create an impedance of 50 Ω, and (ii) design a resonant circuit with inductance L s and capacitance C gs at the resonant frequency 94 GHz. It is often di cult to obtain resonance with these two elements. For this, we add inductance L g , as shown in Figure 5.
To obtain an impedance of 50 Ω, a ne tuning can be introduced on inductance L g .
Let us now consider the circuit presented by Figure 6 with the presence of source V. erefore, we can write as v v gs + g m v gs Z. (3) i out g m v gs g m 1 + g m Z v.
Using expression equation (2) and Figure 6(b), we can write as where ω T g m /C gs . Suppose now that the resonance is completed by L g and L s , then we get We can neglect term − L g C gs ω 2 0 , so we directly obtain the gain of the LNA circuit:

NF Analysis.
After ensuring the maximum transfer of power from the source-RF-generator to the load, it is essential to evaluate the NF of the circuit. To calculate this parameter, it must evaluate the current at the output of the circuit, while assuming that there is a short circuit at the output of LNA. To achieve this, it must determine the transfer function (transconductance) from the input to the output of the circuit at the resonant frequency which is set at 94 GHz in the spectral (frequency) domain. From equation (9), we can de ne the function of the spectral density function (SDF). For the resistance (R s Z g ) and in terms of voltage, the spectral density is By multiplying this expression (SDF) by the squared transconductance, we obtain the rst component of the SDF in terms of output-current such that we get Gate-current (io1) can be analyzed using Figures 6(a)-6(b). en, gate-current (io1) can be expressed as is expression shows us that there is a relation between the output-current component (io2) and the gate-current (i g ), which can be written as follows: From this equality, the spectral density of the current at output (io2) can be expressed as follows: with QL (L g + L s )ω 0 /R s 1/ω 0 R s C gs and g g ω 2 0 C 2 gs / 5g d0 .
Using the circuit illustrated by Figure 7, we can determine the noise which accompanies the current of drain (id) with SDF using equation (10): e current at output (io2) of the transistor can be expressed as follows: where Finally, the NF of the proposed LNA circuit can be expressed as

S-Parameters and Gains.
LNA is characterized by its S-parameters [29,30], such that S 11 and S 22 give us the amounts of signals re ected at the input/output port. S 21 indicates the signal transmission coe cient from the input to the output of the LNA ampli er. It also represents the gain of the ampli er at the operating frequency, after adaptation. S 12 indicates the signal transmission coe cient from the output to the input of the LNA ampli er, and is also considered as inverse gain (S 12 ). Figure 8 shows the simulation results of the S parameters. e re ection at input S 11 is − 14.75 dB, the re ection at output S 22 is − 19 dB, and the inverse gain (S 12 ) is − 34 dB and the forward gain (S 21 ) is 32 dB at 94 GHz. ese S-parameter results are rigorous enough to achieve the desired performance of LNA and con rm well that the proposed LNA is bilaterally stable and matched at frequencies between 90 and 100 GHz. However, the value of S 22 can be improved by making a ne tuning to the value of the load (ZL) at the output of LNA.

NF.
NF varies as a function of the RF-generator impedances (R s Z g ) and has a minimum NF min for an admittance called optimal (Y opt or G opt ). Figure 9 illustrates the NF of the suggested LNA and that for a frequency range from 90 GHz to 100 GHz, with an operating frequency of 94 GHz, where NF 3 dB.

ird-Order Input Intercept Point.
e third-order input intercept point (IIP3) is a very important parameter to evaluate the performance of LNA. It also determines the non-linearity of the ampli er. Figure 10 shows that the value of IIP3 at a 94-GHz operating frequency is -16.78 dB.

Comparison Results.
e performance summary and the comparison results with other state of the art W-band LNA in silicon-based technologies are shown in Table 2. It can be Mobile Information Systems seen that our work accomplishes a high gain, a required NF, and a competitive linearity at the same time. e gure of merit (FoM) is calculated and simulated as mentioned by equation (3) [3]. Moreover, the obtained results are very promising for active RF devices over the W-band (from 75 GHz to 300 GHz) where ultra-large bands are needed.

Conclusion
A new approach of modeling and designing W-band LNA in silicon-based technologies has been presented in this paper. e suggested LNA design provides good performances and results compared with the existing work. Biasing point, stability, and matching network components have been designed to obtain better results at a 94-GHz frequency. A tradeoff between the gain and NF have been improved as 32 dB and 3 dB, respectively. Input/output return losses (S 11 and S 22 ) are less than − 13 dB. us, this LNA exhibits a high linearity of − 16.78 dBm at 94 GHz and good stability. In future work, power consumption can be reduced. e proposed model can be a good candidate for 5G-RFIC mobile systems.
Data Availability e data that support the findings of this study are available from the author upon reasonable request.

Conflicts of Interest
e author declares that there are no conflicts of interest.