Sample-Data Modeling of a Zero Voltage Transition DC-DC Converter for On-Board Battery Charger in EV

1 Coacalcos Institute of Tecnological Studies, 16 de Septiembre Avenue No. 54, Col. Cabecera Municipal, 55700 Coacalco de Berriozabal, MEX, Mexico 2 School of Mechanical and Electrical Engineering, National Polytechnic Institute of Mexico, ESIME Cul., Santa Ana Avenue No. 1000, Col. San Francisco Culhuacan, 04430 Coyoacan, DF, Mexico 3 Automotive Mechanical Engineering Department, Polytechnic University of Pachuca, Ex Hacienda de Santa Barbara, Carretera Pachuca Cd. Sahagún, Km. 20, 43830 Zempoala, HGO, Mexico


Introduction
Advanced vehicular systems are based on the more electric systems (MES) concept.MES is the intensive application of power electronic converters (PEC), electric machines (EM), and advanced embedded control systems to aeronautical, automotive, and maritime systems.MES was initially applied to aeronautical systems toward the reduction and/or substitution of mechanical, pneumatic, and hydraulic systems, that is, the more electric aircraft (mea) and totally integrated more electric systems (TIMES), [1].MES are more efficient compared to their counterparts due to (i) small utilization of electric energy, (ii) high energy efficiency, (iii) reduced weight, and (iv) low maintenance [2].After that, MES was implemented in automotive sector resulting in the more electric vehicle (MEV).MEV includes electric vehicles (EV), hybrid electric vehicles (HEV), and plug-in hybrid electric vehicles (PHEV) [3].In particular, MES applied to vehicular systems has become popular due to the market introduction of the HEV Toyota Prius in 1997 [4].HEV are being developed by companies like BMW, Chrysler, Daimler AG, General Motors, PSA Peugeot Citroen, Suzuki Motor Corp, Toyota, and Volkswagen.Motivations to develop EV, HEV, and PHEV are based on economic, environmental, and energetic facts.Regardless of these kinds of configurations, at least two different sources of energy are needed to achieve the same performance compared to an internal combustion engine (ICE).Indeed, at least one EM and PEC are needed in the propulsion stage at any EV, HEV, and PHEV configuration.Series, parallel, series/parallel, and integrated starter alternator (ISA) with its optional plug-in capability are typical configurations available in the market.
PHEV uses an off-board or on-board charger similar to EV.The standard SAEJ1772 is used in North America and comprises three charge methods: AC level 1 (supply voltage varies from 120VAC 1-phase), AC level 2 (208V to 240VAC and 600V DC maximum; with a maximum current (ampscontinuous) from 12A, 32A and 400A), and DC charging.Additionally, SAEJ1772 provides a guide to the AC level-3 vehicle, an on-board charger capable of accepting energy from an AC supply source at a nominal voltage of 208V and 240VAC and a maximum current of 400A.In addition, SAEJ1772 provides information about the coupler requirements, general electric vehicle supply equipment (EVSE) requirements, control and data, and general conductive charging system description [5].Single-and three-phase, isolated and nonisolated, and unidirectional or bidirectional configurations have been proposed in literature as battery chargers, such as reported in [6].Methods to improve their performance are using one or several combinations of the following techniques: power factor correction (PFC); interleaved, multicell, and resonant configurations; soft/hard switching; zero voltage switching (ZVS); and zero current switching (ZCS).Moreover, the control algorithms include proportional integral (PI), proportional-integral-derivative (PID), sliding modes, fuzzy logic, and adaptive neural network.Following this trend, this paper proposed a sample-data modeling strategy of a DC-DC ZVT to understand its dynamic characteristics as an on-board battery charger.In this topology, the switches are turned on during zero voltage reducing the switching losses; as a result, a compact, lightweight system with high switching frequency can be designed.A typical peak current method is used in this work for control purposes resulting in a simple and inexpensive control law.
This paper is organized as follows.The principle of operation of the converter is described in Section 2 using idealized waveforms.Then, a mathematical analysis based on a piece-wise linear analysis is provided in Section 3, where a phase control strategy is modeled to obtain a largesignal model of the converter.Using this model, a half-cycle, sample-data linear model is obtained, which helps provide the final small-signal transfer functions of the converter.Numerical and simulation results of a 250 W prototype are presented to validate the model obtained.Final conclusions are summarized in Section 5.

Principle of Operation of the Converter
2.1.Circuit Description.A typical system configuration for an EV battery charger is shown in Figure 1(a), which normally consists of a boost power factor corrected (PFC) rectifier connected to an AC supply and a high frequency (HF) DC-DC converter to regulate the load of the batteries.The topology of the DC-DC ZVT converter is shown in Figure 1(b), which has a full bridge inverter supplied with a DC voltage source; a HF transformer with a turns ratio of 1 : N to generate a quasisquare, phase-controlled wave; a stray inductance connected in series to the inverter output, mainly formed by the leakage inductance of the transformer; a full-bridge rectifier connected to the transformer secondary side; and, then, a LC filter to smooth the pulsating rectified voltage waveform of the output of the rectifier.The model also considers a disturbance current source in parallel with the load.
The left-hand leg of the inverter, denoted by leg , is used as the reference to describe the converter operation.The switches of leg  operate complementarily with fixed duty ratios of 50% at high frequency.The switches of the righthand inverter leg, leg , also operate complementarily with fixed duty ratios of 50%, but the operation of leg  is delayed by T/2 respective to leg , where  is the switching period and  is the phase control variable, which ranges from 0 to 1.
The steady state operation of the circuit of Figure 1 may be explained with the steady state, voltage, and current waveforms of Figure 2.
The first four waveforms shown in Figure 2 are the states of the switches of the inverter leg .Then, the third and fourth waves show the states of the leg  switches, which are delayed by /2 respective to the first and second waves of Figure 2. The fifth and sixth waveforms of Figure 2 are the inverter output voltage, V  = V  2 − V  2 , and output current,   (also    ).The next two waveforms of this figure are the rectifier output voltage, V  , and the filter inductor current,    .   is a continuous wave with a small ripple component, which is also present in    , but amplified by the turns ratio N and reverted during the negative semicycle of V  .The last three waveforms of Figure 2 are the current of diodes  1 to  4 ,   1 to   4 , and the supply current waveform  sum .When V  =  in , the current    is positive and flows through  1 and  4 , whereas when V  = − in , the current    is negative and flows through  2 and  3 since these diodes are positively biased.When the V  waveform changes from zero to ± in , the diodes  1 and  4 are naturally commutated, short-circuiting the transformer secondary winding due to the overlapped operation of the diodes.The duration of the diodes overlap,   , causes a fast reversal of the inverter primary current    , being limited by the inductance   , which prevents a short circuit of the inverter output.
The production of   may be described using the waves   1 to   4 of Figure 2. When V  changes from zero to  in , the currents   1 and   4 rise from zero to the output current level   and   2 and   3 fall to zero, whereas when V  changes from zero to − in ,   2 and   3 rise from zero to the output current level and   1 and   4 fall to zero.During the   period, a gradual current transfer is effectuated from one diode pair to the other, in such a way that    continues the slight current slope which feeds the load.The steady state value of   may be calculated assuming that the rate of change of the current reversal of   ,   /, only depends on the supply voltage and the amplitude of the DC output filter current, I O , [3], which may be expressed as 2.2.Piece-Wise Analysis of the ZVT Converter.From Figure 2,   presents six different behaviour intervals, which may be termed operating modes I to VI.
For each mode of operation a different circuit configuration may be obtained, which is shown in Figure 3.These equivalent circuits may be described using the state-space equation ( 2) and the state-space output expression (3): where  3(a), and the equations that describe this mode are shown in ( 2) and ( 3) with  = 1.The matrixes A 1 , B 1 , F 1 , and G 1 are listed in Table 5.
In Mode II, the state of the inverter switches is exactly as that of Mode I, but  1 and  4 are conducting and  2 and  3 are off.The equivalent circuit of Mode II is shown in Figure 3(b), and again (2) and (3) describe Mode II, but with  = 2.The matrixes  2 ,  2 ,  2 , and  2 are shown in Table 5.
In Mode III,   1 and   1 are in the on state,   2 and   2 are in the off state,  1 and  4 are conducting, and  2 and  3 are off.The equivalent circuit of Mode III is shown in Figure 3(c), being (2) and ( 3) with  = 3 the mathematical model of this mode.Again, the matrixes  3 ,  3 ,  3 , and  3 are shown in Table 5.
Mode IV is a mirror of Mode I, but with   1 and   2 in the off state and   2 and   1 in the on state, whilst Modes V and VI are mirrors of Modes II and III, respectively, since the state of the switches and diodes is complementary to that of Modes II and III.Again, ( 2) and (3) describe Modes IV, V, and VI but with  = 4, 5, and 6, respectively.The corresponding matrixes to these operating modes are shown in Table 5. 4 is a DC-DC ZVT converter with peak current control loop, which has a current transducer with gain   that senses  sum , one SR flip-flop and two D flip-flops, a clock signal, V CLK , a sawtooth generator, V SAW , and the reference current level, V iREF , which is provided by an outer voltage loop.

Current Control Loop Description. The circuit shown in Figure
The operation of the circuit of Figure 4 may be explained with the state voltage and current waveforms of Figure 5.The first waveform shown in Figure 5 is the clock signal of system, V CLK .The second waveform is  sum plotted together with the deference of V iREF with V SAW , where V SAW is a negative slope synchronized with V CLK , while V iREF is the current reference that regulates the peak level of  sum .V COMP is the state of the output comparator, which is the third waveform of this figure.
The fourth and fifth waveforms are the SR flip-flop outputs   and   , with   set to the on state by V CLK and to the off state when V COMP switches to the on state.The fifth and sixth waveforms are the outputs of the first flip-flop, V g s T A1 and V g s T A2 , which are controlled by the rising edge of   , whereas V g s T B1 and V g s T B2 , the outputs of the second  flip-flop, which are the last waves of this figure, are controlled by the rising edge of   .

Numerical Estimation of the 𝑇
and  Periods.  defines the duration of Modes I and IV and may be numerically estimated by determining the instant when either   2 or   1 reaches zero.  may also be calculated using the Newton-Raphson method, [4].This numerical method may be implemented using where Equations of (5) use the output equation that includes   1 , which determine the duration of Mode I, whereas the duration of Mode IV is determined by   2 , such that (6) may be rewritten as follows: defines the duration of Modes II and V and may be numerically estimated by determining the instant when the equation be calculated using the Newton-Raphson method, [4].This numerical method may be implemented using where Equations of (8) use the output equation that includes  2,sum and the expression V iREF − V SAW =    sum , which determines the duration of Mode II, whereas the duration of Mode V is determined by  5,sum and the expression V iREF − V SAW =    sum , such that (9) may be rewritten as follows: . (9)

Modeling of the ZVT Converter with Current Control Loop
3.1.Piece-Wise Linear Model.Equation ( 2) may be used to develop a piece-wise linear model of the converter of Figure 1 Mathematical Problems in Engineering throughout all the modes of operation.The solution of (2) may be expressed as where which defines in the first term of (10) the natural response of the system along the period of time   −  −1 with the initial condition ( −1 ) at Mode n.The second term of (10) is the steady state response, which is obtained by using the convolution integral.Therefore, using (10) for the time interval of  1 ≤  <  1 +   , together with the matrixes of Mode I, the solution of the state vector for Mode I is obtained as follows: In a similar way, the solutions for Modes II to VI at the time intervals (17)

Half-Cycle Model.
The waveform    of Figure 2 shows that operation modes IV, V, and VI are mirrors of Modes I, II, and III, respectively; therefore, the first three operation modes are sufficient to describe the function of the converter.
A particular matrix titled as W may relate the modes I, II, and III with the modes IV, V, and VI, which satisfies the condition  =   , the identity matrix.Therefore, the halfcycle model of the ZVT converter may be obtained replacing the terms A 4 , A 5 , A 6 , B 4 , B 5 , and B 6 by expressions WA 1 , WA 2 , WA 3 , WB 1 , WB 2 , and WB 3 , respectively, in (18), such that the half-cycle model is The previous equation may be rewritten as ( 1 + /2) =  MC ( 1 ) +  MC ( 1 ) for practical purposes.

Sample-Data, Small-Signal Linear Model of the Converter in
Open-Loop Conditions.The equation ( 1 + /2) =  MC ( 1 ) +  MC ( 1 ) may be used as a half-cycle, discrete model of the ZVT converter, which may be written as where   +1 = ( 1 + /2),   = ( 1 ), and   = ( 1 ) A sample-data, small-signal model may be obtained by using the Taylor series, (21), and using small-signal perturbations as x K , U K ,    and  K .One has Using this equation, the sample-data, small-signal linear model becomes The solution of the partial derivatives is  +1 /  =  MC ,  +1 /  =  MC ,  +1 / =   , and  +1 /  =   .  may be determined utilizing the restriction equation of   , whereas  K is obtained using the restriction equation of .

Restriction Equations of the
The previous equation is not linear; therefore, it is necessary to use the Taylor series to obtain a linearized model: The restriction equation of  may be obtained analyzing the waveforms    and  sum with V iREF − V SAW during Mode II (Figures 2 and 5).V SAW is determined by (  /2) and the slope of  sum during Mode II, named  2 , and may be obtained by integrating again  sum when    sum = V iREF − V SAW : The Taylor series is used to linearize the previous equation, and therefore the restriction equation of  becomes where  such that the small-signal model becomes where , and Equation ( 28) may be solved by using the  transform, such that   becomes

Transfer Function.
To verify the dynamic characteristics of the converter is necessary to analyze the transfer functions that relate V  with   , V iREF , and   , which are the throughput input-to-output DC voltage transfer function,  V () = V  ()/V  (), the control-to-output transfer function,   () = V  ()/V iREF (), and the output impedance transfer function   () = V  ()/  (), respectively.The magnitude and phase of each transfer function may be obtained using a Bode diagram, whereas the root locus technique may be employed to describe the behaviour of the poles and zeros of (30).One has

Prototype Operating Parameters.
A 250 W ZVT DC-DC prototype converter was designed under the analysis described in [7] to verify the large-signal model of (14).Table 1 shows the operating parameters of the converter.The steady-state output voltage,   , may be calculated as the average of the rectified voltage V  , such that at full load Taking the assumption shown in (31), the converter component values must comply with the zero-voltage switching Root locus were solved by calculating   and  with the Newton-Raphson method.Figures 6 to 9 show a comparison of the results obtained with the piece-wise model and simulation results obtained with Micro-Cap.The waveforms plotted on these figures are the transformer primary-side current    , Figure 6, the filter inductor current    , Figure 7, the output voltage V  , Figure 8, and the supply current  sum together with V SAW − V iREF , Figure 9. Tables 3 and 4 show a comparison of the instantaneous values of the state vector obtained at the end of a full cycle in steady state conditions, which verifies the exactitude of the large-signal model, whereas Table 4 shows those of the half-cycle model.Both tables list results together with instantaneous results obtained with Micro-Cap.The value of   calculated for Modes I and IV is 0.727 s while  is 0.3998.The magnitude of  V () at low frequency converges to the steady-state DC of V −DC /  , while the magnitude of   () reveals the gain of the control-to-output under dynamic

Conclusion
This paper presented the mathematical derivation of a sample-data, small-signal model for a ZVT DC-DC converter.The method used a piece-wise linear analysis to obtain a large-signal model which was verified with numerical predictions that depend on the integration step size to obtain high accuracy.A sample-data, half-cycle linear model was derived using the large-signal model, such that a dynamic model of the converter was obtained by using a linear approximation.A comparison of the instantaneous values listed in Tables 3 and 4 showed that there is close correspondence between the derived models and the circuit simulation, especially with the half-cycle model.Also, Bode diagrams and a root locus analysis showed that the control system may be steady if  is defined within an interval of 0.3 to 0.6,   within 0.9 V/A to 1.2 V/A, and M within 0.044 V/s to 0.1 V/s.Therefore, the half-cycle model is more accurate than the large-signal model, and it is useful to determine a small-signal, sample-data model of the DC-DC converter for dynamic studies.The presented method may help to power electronic practitioners to derive discrete transfer functions of soft switched DC-DC converter and understand the dynamic behaviour of power electronic systems, which serves as a basic principle to design a controller for the converter outer loop.

Figure 2 :
Figure 2: Ideal waveforms of the converter.

Figure 5 :
Figure 5: Ideal waveform DC-DC ZVT converter with current control loop.

Figure 6 :
Figure 6:    current waveform obtained with the piece-wise linear model and a Micro-Cap simulation.

Figure 7 :Figure 8 :
Figure 7:    current waveform obtained with the piece-wise linear model and a Micro-Cap simulation.

Figure 9 :Figure 10 :Figure 11 :
Figure 9: Waveforms of  sum and V SAW − V iREF obtained with the piece-wise linear model and a Micro-Cap simulation.
= [       V  ]   is the output current disturbance,  = [ sec   1   2  sum ]  is the output vector,  sum is the supply current, and   ,   ,   , and   are the state matrixes of the six operating modes, being  = 1, 2, . . ., 6. Mode I is formed when   1 and   2 are in the on state,   2 and   1 are in the off state, and  1 to  4 are conducting due to the overlap rectifier phenomena.The equivalent circuit of Mode I is shown in Figure 1 =    /  , while the slopes of   1 , 3 during the Mode I are named  3 , which are contrary and of lower amplitude than  1 ; that is, g 3 = −g 1 /2N.The restriction equation of   may be determined by integrating the waveforms  1,3 during Mode I: Control Loop.The restriction equations for   may be obtained analyzing the waveforms   ,   1 , 3 , and  sum , which are shown in Figure2during the Mode I.The slope of  sum during Mode I is named  1 and is determined by the rate of change of    ; that is, ,  2 =    /   ,  3 =    /   ,  4 =    / iREF  , and  5 =    /   .
3.6.Sample-Data, Small-Signal Linear Model of the Converter in Closed-Loop Conditions.The sample-data, small-signal linear model, may be obtained by substituting    and  K , (24) and (26), respectively, in (22):
sum and SAW -iREF i sum and SAW -iREF i

Table 2 :
Component values used in the 250 W prototype.

Table 3 :
Verification of the large-signal model.shouldbe large enough to keep the converter operation with ZVT under a low load condition, whilst  should be small to maintain regulated output voltage for a maximum input voltage.The list of parameters shown in Table1, together with (31), defines the component values that may be used to keep the DC-DC converter operating with the ZVT effect within a load range of

Table 4 :
Verification of the half-cycle model., and the values shown in Table2were decided to be appropriate for the converter design.The output filter components of the rectifier were determined with the output voltage ripple, Δ  , and the filter inductor current ripple, Δ  , which may be calculated by using The piece-wise linear model, the large-signal model, and the half-cycle model of the converter were verified by iterative program developed in MatLab.The piece-wise model was solved using the Runge-Kutta numerical method and using a small simulation step time, together with   and , to calculate the duration of each operating mode, whereas the large-signal model and half-cycle model

Table 5 :
Definition of matrix for each mode of operation.