Mathematical Problems in Engineering
Volume 2017 (2017), Article ID 9861383, 7 pages
https://doi.org/10.1155/2017/9861383

Research Article

A Novel Sigma-Delta Modulator with Fractional-Order Digital Loop Integrator

Chi Xu,¹ Yu Jin,¹ and Duli Yu²

¹College of Information Science and Technology, Beijing University of Chemical Technology, Beijing, China
²Advanced Innovation Center for Soft Matter, Beijing University of Chemical Technology, Beijing, China

Correspondence should be addressed to Yu Jin; jiny@mail.buct.edu.cn

Received 11 August 2017; Accepted 2 October 2017; Published 31 October 2017

Academic Editor: Anna Vila

Copyright © 2017 Chi Xu et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

Abstract.

This paper proposes using a fractional-order digital loop integrator to improve the robust stability of Sigma-Delta modulator, thus extending the integer-order Sigma-Delta modulator to a non-integer-order (fractional-order) one in the Sigma-Delta ADC design field. The proposed fractional-order Sigma-Delta modulator has reasonable noise characteristics, dynamic range, and bandwidth; moreover the signal-to-noise ratio (SNR) is improved remarkably. In particular, a 2nd-order digital loop integrator and a digital controller are combined to work as the fractional-order digital loop integrator, which is realized using FPGA; this will reduce the ASIC analog circuit layout design and chip testing difficulties. The parameters of the proposed fractional-order Sigma-Delta modulator are tuned by using swarm intelligent algorithm, which offers opportunity to simplify the process of tuning parameters and further improve the noise performance. Simulation results are given and they demonstrate the efficiency of the proposed fractional-order Sigma-Delta modulator.

1. Introduction

Sigma-Delta modulator technology has been commonly used in various fields including inertial sensors, such as the MEMS accelerometer and gyroscope [1–3]. Sigma-Delta modulator not only converts analog signal to digital signal but also can suppress the quantization noise of bandwidth effectively. Most of Sigma-Delta modulators are used in closed-loop architect in terms of linearity, dynamic range, and bandwidth [4]. Considerable attention has been given to the issue of the MEMS accelerometer performance comparison between the low-order and high-order closed-loop Sigma-Delta modulators. Many literatures have pointed out that the low-order Sigma-Delta modulator yields better stability with simpler design parameters, but the performance in terms of noise level is unsatisfactory. By contrast, the high-order Sigma-Delta modulator has reasonable noise characteristics, dynamic range, and bandwidth, but its stability is not guaranteed. So, designing a Sigma-Delta modulator with high stability and outstanding performance is much desired to be researched. Recently, high-order Sigma-Delta modulator, which uses additional electronic integrator, has been designed [5]. However, the stability of the high-order Sigma-Delta modulator is affected by variations of the MEMS accelerometer parameters [6]. Previous work has mainly focused on using integer-order integrator as a loop integrator to form the high-order Sigma-Delta modulator to improve its SNR and noise performance [7]. In this paper, a novel Sigma-Delta modulator with the fractional-order digital loop integrator is discussed. The proposed novel Sigma-Delta modulator contains a fractional-order controller, which is able to provide the stability in the placement of fractional-type poles and zeros.

Fractional-order calculus belongs to the branch of mathematics, which is concerned with differentiations and integrations of non-integer-order [8, 9]. According to [10], the remarkable advantage of fractional-order integrator over its counterpart, the integer-order one, is that the stability and robustness of the fractional-order integrator are much stronger. At present, modeling real-world phenomena using fractional-order calculus has received great attention. As we all know, Sigma-Delta modulators that have been applied so far were all considered as integer-order modulators, whereas the proposed Sigma-Delta modulator with the fractional-order digital loop integrator combines some characteristics of systems between the orders and (). Therefore, we will have more possibilities for an adjustment of the poles or zeros of the noise-shaping integrator according to special requirements through changing the system order as a real (not only integer) value. In this paper, a novel Sigma-Delta modulator with the fractional-order digital loop integrator is presented, where the fractional-order digital loop integrator is cascaded between the analog-front-end amplifier and the quantizer. In detail, a 2nd-order digital integrator is used to perform noise-shaping of quantization noise from the comparator to improve SNR, and furthermore a digital controller is immediately in series with the 2nd-order digital integrator to provide the weak or strong fractional-type poles or zeros to improve the robust stability for the proposed fractional-order Sigma-Delta modulator. The parameters of the proposed fractional-order digital loop integrator are tuned by using particle swarm optimization (PSO) algorithm, which is easy to optimize the digital loop integrator parameters.

The rest of this paper is organized as follows: in Section 2, a generalized structure of Sigma-Delta modulator is introduced; in Section 3, the proposed fractional-order Sigma-Delta modulator is discussed; then PSO algorithm for fractional-order Sigma-Delta modulator is presented in Section 4. Simulation results of the proposed Sigma-Delta modulator are demonstrated and analyzed in Section 5. Finally, conclusions are given in Section 6.

2. Mathematical Model of the Sigma-Delta Modulator System

Before discussing the proposed fractional-order Sigma-Delta modulator, a general system block diagram of Sigma-Delta modulator is shown in Figure 1, which illustrates a typical architect of Sigma-Delta modulator.

Figure 1: Block diagram of Sigma-Delta modulator.

In Figure 1, is the transfer function of the sensing element, which is a 2nd-order electromechanical integrator; is the gain of analog-front-end (AFE) amplifier; is a 2nd-order digital integrator, which is employed to perform noise-shaping of quantization noise from the 1-bit comparator to improve SNR. So, Figure 1 presents a MEMS accelerometer-based 4th-order Sigma-Delta modulator, where the 2nd-order digital integrator is inserted between AFE and 1-bit comparator; is the quantizer gain; is the quantization noise of 1-bit quantizer, and is the equivalent linear model of 1-bit DAC feedback. A quasi-linear model of the 1-bit quantizer is presented in Figure 1, where the quantizer output is equal to the sum of quantization noise and quantizer input with a quantization gain .

The linearized dynamical equation of the sensing element can be expressed in the Laplace domain as follows:

where is the proof mass, is the damping coefficient, and is the spring constant. If = 20 mg, and ; the frequency domain characteristic curve of is shown in Figure 2.

Figure 2: Bode plot of the sensing element.

In Figure 1, is the continuous frequency response of digital loop integrator , which can be expressed as

where and are coefficients of the numerator and denominator.

3. Fractional-Order Sigma-Delta Modulator System

3.1. Mathematical Model of the Proposed Sigma-Delta Modulator

In this paper, the proposed fractional-order Sigma-Delta modulator is built by using the fractional-order digital loop integrator instead of . The fractional-order digital loop integrator of the proposed Sigma-Delta modulator is shown in Figure 3.

Figure 3: Digital integrator of the proposed Sigma-Delta modulator.

is the 2nd-order digital loop integrator, which can be written as

where , , , , , and are the coefficients of .

is the digital controller, which can be written as

where , , and , , and are the integral-order, differential-order, and proportional, integral, and differential coefficients of , respectively.

Here, the architect of the proposed fractional-order Sigma-Delta modulator is presented in Figure 4.

Figure 4: Block diagram of the proposed Sigma-Delta modulator.

From the system model shown in Figure 4, the signal transfer function (STF) and the noise transfer function () of the proposed fractional-order Sigma-Delta modulator can be written as

and are the continuous frequency responses of the digital loop integrators and , respectively. Taking (3) and (4) in (5) and (6), STF, can be rewritten as

where

To achieve high SNR and stability of the overall system, , , , , , , , , and in (7) will be optimized by using PSO algorithm in the following section.

3.2. Stability Analysis for the Proposed Sigma-Delta Modulator

In this paper, we use Caputo definition for fractional derivative, which is given as

where is an integer satisfying and is Gamma function. Formula (9) can be transformed into the transfer function in the Laplace domain (assuming zero initial conditions) as follows:

where and are constants, is the fractional commensurate order, and . Formula (10) can be rewritten as

Formula (11) is always represented as the integer-order system model when . As shown in [10], when matrix is deterministic without uncertainty, the stability condition for formula (11) is clearly expressed by

By observation from (12), the stability region of the fractional-order () system is boarder than that of the integrator-order one. In this paper, the fractional commensurate order is set as 0.5 to broader the stability region of the proposed Sigma-Delta modulator. In order to obtain the fractional commensurate order , here we set ; therefore (7) can be rewritten as

By observation from (13), we can see that the order of the proposed Sigma-Delta modulator is 4.5th order and it belongs to commensurate fractional-order system. Therefore, the stability region of the proposed 4.5th-order Sigma-Delta modulator becomes , , as shown in Figure 5.

Figure 5: Stable region of the proposed 4.5th-order Sigma-Delta modulator.

It can be seen from Figure 5 that the stability region of the proposed 4.5th-order Sigma-Delta modulator is wider than that of the traditional integer-order one, the stability of which is only in the left-half -plane.

4. PSO Algorithm for Fractional-Order Sigma-Delta Modulator

4.1. An Introduction to PSO Algorithm

Particle swarm optimization (PSO) algorithm belongs to the global search method [11]. It is inspired by social behavior of bird flocking and swarm theory. In PSO algorithm, the potential solutions are named as particles, and each particle is regarded as a point in a D-dimensional space that adjusts “flying” according to its own flying experience. The th particle is presented as . The best previous position of the th particle is recorded and represented as . The index of the best particle among all the particles in the population is represented by the symbol best. The velocity of the position change for particle is presented as . The particles are manipulated according to the following equation:

where is the inertia weight and and are two positive constants.

4.2. Parameter Optimization

Firstly, the Simulink model of the proposed 4.5th-order Sigma-Delta modulator is developed as shown in Figure 6.

Figure 6: Simulink model of the 4.5th-order Sigma-Delta modulator.

In Figure 6, is the discretization of the fractional-order controller. One of the discretization methods of the controller is to use a Tustin operator to approximate the fractional-order operator [12]. The general form of Tustin operator is given as follows:

is the sample period; is the fractional order. Here, we use Continued Fractional Expansion (CFE) to realize :

The mechanism and steps of this approximation method are presented in [12]. For instance, are approximated as follows:

The parameters of the proposed 4.5th-order Sigma-Delta modulator are listed in Table 1.

Table 1: Parameters of the proposed Sigma-Delta modulator.

Parameter
Value

Proof mass [mg]
20

Damping coefficient [Ns/m]
2.4 × 10⁻³

Spring constant [N/m]
100

AFE gain [V/m]
4.55 × 10⁷

Comparator gain
1

Feedback gain [m/s²]
49.05

4.3. Steps of Parameter Optimization

(1)Selection of initial value of PSO algorithm: here; , , , , , , , , and in (13) are optimized by PSO algorithm; hence, we consider as the position vector of PSO algorithm for the proposed 4.5th-order Sigma-Delta modulator. The individual numbers are 600 corresponding to dimension 9 for the proposed 4.5th-order Sigma-Delta modulator, and the iteration is set as 25: and (2)Objective function: a typical objective for Sigma-Delta is high SNR, which can be maximized and is calculated based on the power spectral density of the output bit stream. Therefore, considering the high SNR as the objective of PSO algorithm is reasonable. For each individual simulation, the SNR is calculated by a function “calcSNR” available through the Delta Sigma Toolbox for Matlab(3)Initializing and in the optimal range and calculating the objective function(4)Applying (14) to update and and then to update best(5)Stopping of the iteration once the termination condition is satisfied. Otherwise, procedure goes back to step ()

5. Simulation

5.1. Simulation Results Discussion

The oversampling ratio (OSR) needs to be specified in the proposed 4.5th-order Sigma-Delta modulator. Here, we choose sample frequency of 128 kHz, and . In each individual procedure, the SNR will be calculated when the Simulink model is running.

In our numerical experiment, The proposed 4.5th-order Sigma-Delta modulator achieved about 92 dB to 118 dB of SNR by yielding the different values for . The optimal values of are selected as in Table 2.

Table 2: The optimized parameters by PSO algorithm.

Parameter
Value

The corresponding SNR of the proposed 4.5th-order Sigma-Delta modulator is 117.647 dB, which is improved 10x compared to only 4th-order Sigma-Delta modulator. The PSD plot of the 4.5th-order Sigma-Delta modulator is also built with selected coefficients and shown in Figure 7. Compared to the 4th-order Sigma-Delta modulator, the proposed 4.5th-order Sigma-Delta modulator not only performs better SNR but also has wider noise floor (bandwidth: 115 Hz in the 4.5th-order Sigma-Delta modulator and 103 Hz in the 4th-order Sigma-Delta modulator) and sharper slope (amplitude gain: 75.1 dB/decade in the 4.5th-order Sigma-Delta modulator and 53.6 dB/decade in the 4th-order Sigma-Delta modulator).

Figure 7: PSD of the 4.5th-order and the 4th-order Sigma-Delta modulator.

5.2. Stability and Robustness Analysis

The fractional-order digital loop integrator of the proposed 4.5th-order Sigma-Delta modulator can be normalized as . Taking the linearized parameters , , and and the major transfer function and and into (5), a fractional-order signal transfer function (STF) of the proposed 4.5th-order Sigma-Delta modulator can be obtained. The root locus models of the proposed 4.5th-order Sigma-Delta modulator and 4th-order Sigma-Delta modulator are built and shown in Figure 8.

(a) 4.5th-order Sigma-Delta modulator

(b) 4th-order Sigma-Delta modulator

Figure 8: Root locus comparison between the 4.5th-order and 4th-order Sigma-Delta modulators.

Figure 8 shows that the proposed 4.5th-order Sigma-Delta modulator is stable. In Figure 8(b), the root locus of the 4th-order Sigma-Delta modulator passes through the right-half -plane, whereas the poles and zeros of the 4.5th-order Sigma-Delta modulator, as shown in Figure 8(a), are allocated along the negative axis of the -plane and the farthest pole achieves −1.2 × 10⁷. This leads to better stability of the designed 4.5th-order Sigma-Delta modulator.

Similar results are also observed at root locus for parametric yield errors, such as different spring constant and damping coefficient , induced by manufacturing tolerances of MEMS. For instance, taking the spring constant = 1000 N/m in MEMS transfer function to verify the robust stability of the proposed 4.5th-order Sigma-Delta modulator, Figure 9 shows the root locus of the proposed 4.5th-order Sigma-Delta modulator with .

Figure 9: Root locus of the 4.5th-order Sigma-Delta modulator with = 1000 N/m.

Also, taking = 2.4 × 10⁻² Ns/m in MEMS transfer function, Figure 10 shows the root locus of the proposed 4.5th-order Sigma-Delta modulator with = 2.4 × 10⁻² Ns/m.

Figure 10: Root locus of the 4.5th-order Sigma-Delta modulator with = 2.4 × 10⁻² Ns/m.

Simulation results show that the robust stability of the two sensing elements only presents an acceptable slight fluctuation, which indicates that the proposed 4.5th-order Sigma-Delta modulator is robust to the sensitivity of MEMS devices.

6. Conclusions

A 4.5th-order Sigma-Delta modulator structure is proposed in this paper. The proposed 4.5th-order Sigma-Delta modulator achieves SNR = 117.647 dB in simulation and noise floor under −150 dB in frequency of 5–150 Hz. The simulated root locus shows improved stability compared to the pure integer-order system with good potential to progress further. This study can promote the development of high performance of MEMS accelerometer and also provides scientific and technical support for the application of fractional-order theory to practical system.

Conflicts of Interest

The authors declare that there are no conflicts of interest regarding the publication of this paper.

Acknowledgments

This work was supported by the research fund to the top scientific and technological innovation team from Beijing University of Chemical Technology (no. buctylkjcx06).

References

B. Lv, P. Wang, D. Wang, J. Liu, and X. Liu, “A high-performance closed-loop fourth-order sigma-delta micro-machined accelerometer,” Key Engineering Materials, vol. 503, pp. 134–138, 2012.

X.-C. Luo and J. Feng, “A monolithic MEMS gyroscope interface circuit in 0.35μm CMOS,” Tien Tzu Hsueh Pao/Acta Electronica Sinica, vol. 42, no. 9, pp. 1868–1872, 2014.

S. Long, Y. Liu, K. He, X. Tang, and Q. Chen, “116 dB dynamic range CMOS readout circuit for MEMS capacitive accelerometer,” Journal of Semiconductors, vol. 35, no. 9, Article ID 095004, pp. 1–5, 2014.

M. Keller, A. Buhmann, M. Ortmanns, and Y. Manoli, “A method for the discrete-time simulation of continuous-time sigma-delta modulators,” in Proceedings of the IEEE International Symposium on Circuits and Systems, ISCAS '07, pp. 241–244, New Orleans, LA, USA, May 2007.

V. P. Petkov and B. E. Boser, “High-order electromechanical modulation in micromachined inertial sensors,” IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 53, no. 5, pp. 1016–1022, 2006.

Y. Dong, M. Kraft, and C. O. Gollasch, “A high performance accelerometer with fifth order-modulator,” in Proceedings of the 15th MicroMechanics Europe Workshop, pp. 41–44, MEW, Leuven, BE, 2004.

C. Lang and R. Tielert, “A low noise accelerometer with digital pid-type controller and multibit force feedback,” in Proceedings of the the 25th European Solid-State Circuits Conference, ESSCIRC '99, pp. 250–253, IEEE, Duisburg, Germany, 1999.

M. Caputo, “Distributed order differential equations modeling dielectric induction and diffusion,” Fractional Calculus and Applied Analysis, vol. 15, no. 4, pp. 421–442, 2001.

Y. Chen, H. Ahn, and D. Xue, “Robust controllability of interval fractional order linear time invariant systems,” in Proceedings of the ASME International Design Engineering Technical Conferences and Computers and Information in Engineering Conference, pp. 1–9, ASME, Long Beach, Calif, USA, 2005.

M. Moze and J. Sabatier, “LMI tools for stability analysis of fractional systems,” in Proceedings of the International Design Engineering Technical Conferences and Computers and Information in Engineering Conference, pp. 1–9, ASME, Boston, MA, USA, 2005.

J. Kennedy and R. Eberhart, “Particle swarm optimization,” in Proceedings of the IEEE International Conference on Neural Networks (ICNN '95), vol. 4, pp. 1942–1948, Perth, Western Australia, November-December 1995.

C. Tricaud and Y. Chen, “An approximate method for numerically solving fractional order optimal control problems of general form,” Computers & Mathematics with Applications. An International Journal, vol. 59, no. 5, pp. 1644–1655, 2010.