Extra-High-Voltage DC-DC Boost Converters Topology with Simple Control Strategy

This paper presents the topology of operating DC-DC buck converter in boost mode for extra-high-voltage applications. Traditional DC-DC boost converters are used in high-voltage applications, but they are not economical due to the limited output voltage, efficiency and they require two sensors with complex control algorithm. Moreover, due to the effect of parasitic elements the output voltage and power transfer efficiency of DC-DC converters are limited. These limitations are overcome by using the voltage lift technique, opens a good way to improve the performance characteristics of DC-DC converter. The technique is applied to DC-DC converter and a simplified control algorithm in this paper. The performance of the controller is studied for both line and load disturbances. These converters perform positive DC-DC voltage increasing conversion with high power density, high efficiency, low cost in simple structure, small ripples, and wide range of control. Simulation results along theoretical analysis are provided to verify its performance.


Introducton
Proceeding to the paper work [1], other two topologies are developed for extra-high-voltage applications.Traditional DC-DC boost converters are used in extra-high-voltage applications.But they are not economical due to the limited output voltage, efficiency, and they require two sensors with complex control algorithm.Because of the effect of parasitic elements, the output voltage and transfer efficiency of DC-DC converters are limited.Voltage lift technique is a popular method widely applied in electronic circuit design.It has been successfully employed in DC-DC converter [1][2][3][4][5] applications in recent years, and opened a way to design high-voltage gain converters.The output voltage increases stage-by-stage along the geometric progression.So to overcome these limitations and to make the DC-DC converter with a simple control loop, a new technique called voltage lift technique is used [6][7][8][9][10][11].
In this paper, a new series of DC-DC converter topologies is analyzed which is different from classical boost converter.This paper introduces positive output boost converters employed with voltage lift technique that implements the output voltage increase in a simple geometric progression.They also effectively enhance the voltage transfer gain as per power-law terms.The performance of this DC-DC converter is superior to classical DC-DC with reduced control scheme.The performance of this DC-DC converter is superior to classical DC-DC with the following advantages.
(i) It performs similar to classical DC-DC boost converter with comparatively high-voltage transfer ratio.
(ii) Wide range of control with smooth ripple at the output voltage is an added advantage of this proposed converter.
(iii) High power density with high efficiency than classical boost converter.
(iv) Closed-loop controller requires only one sensor.
In this paper, the operation and mathematical analysis of the proposed converters I and II are presented.An algorithm is developed to generate PWM pulses for the N-channel MOS-FET.The simulation model of the converter is developed in MATLAB7 using simulink toolbox.Simulation is carried out to study the performance of the converter under line and load disturbances.The simulation results are presented and they closely match with the theoretical results.The effectiveness of the converter is shown by comparing the performance with the classical boost converter.

Topology-I
The proposed topology of new series of boost converter is derived from the DC-DC boost converter circuit.Topology-I is a boost converter circuit with the voltage lift components, that is, additional three stages of inductor and capacitor along with the basic circuit are shown in Figure 1.In this topology, the switch S is N-channel power MOSFET device (NMOS) and it is driven by a pulse-width-modulated (PWM) switching signal with variable frequency f and conduction duty k.For this circuit, the load is usually resistive, R = V 0 /I 0 .
The basic principle of this circuit in boosting up the output voltage is charging and discharging reactive elements into a load, controlling the levels of charge, and consequently the output voltage by switching the DC supply in and out of the circuit at very high frequencies.They include a freewheeling diode to protect the switch from the inductors high reverse currents, and this also ensures that the generated inductor energy is applied to the load.Capacitors are connected in parallel with the load to filter output ripple and maintain a constant output voltage.
It consists of passive components: one static switch S, diodes, four inductors L, L 0 , L 1 , L 2 , and capacitors C, C 0 , C 1 , C 2 , and C 3 .Capacitors C 2 and C 3 perform the characteristics to lift the capacitor voltage V C .The directions of all voltages and currents are defined and shown in Figure 1.We will assume that all the components are ideal and the capacitors are large enough.We also assume that the circuits operate in continuous conduction mode.The output voltage and current are V 0 and I 0 the input voltage and current are V 1 and I 1 .

Analysis of Topology-I
When switch S is turned ON, its equivalent circuit is shown in Figure 2. The source instantaneous current is equal to i L1 + i L0 +i C2 +i L2 +i C3 +i L .The load current flows from the addition of two voltages.That is, the source voltage V 1 and the voltage across the capacitor C during ON period.Also the capacitors C 2 and C 3 are charged to the input voltage under switch-ON condition.All the inductor current rises during switch-ON period.When switch S is turned OFF, source current is equal to zero.The stored energy in the inductors L 1 , L 2 , and L and the capacitorsC 2 and C 3 discharges and charge the capacitor C with the direction as shown in Figure 3. Simultaneously, current i L0 flows through the load, which is sustained by the inductor L 0 .Currents i L , i L1 , and i L2 decrease during switch-OFF period.In steady state, the average inductor voltages over a period are zero.Thus The inductor current i L increases in the switch-on period and decreases in the switch-off period.The corresponding voltages across L are V 1 , and −V L-OFF . Therefore, ( Modelling and Simulation in Engineering 3 Similarly, ( During switch-on period, the voltage across capacitor C 1 is equal to the source voltage plus the voltage across C. Since we assume that C and C 1 are sufficiently large, during switch-on period, Therefore, from switch-off period equivalent circuit, ( The voltage transfer gain of continuous conduction mode (CCM) is The output voltage, current, and the voltage transfer gain are summarized as follows: Average voltages are Average currents are   4.

Topology-II
It is assumed that all the components are ideal and the capacitors are large enough.It is also assumed that the circuits operate in continuous conduction mode.The output voltage and current are V 0 and I 0 , while the input voltage and current are V I and I 1 .Topology-II performs a positiveto-positive DC-DC step-up voltage conversion with high efficiency, high power density and cheap topology in a simple structure.

Analysis of Topology-II
When switch S is turned ON, the equivalent circuit is shown in Figure 5.The source instantaneous current is equal to The load current flows from the addition of two voltages, That is, the source voltage V 1 and the voltage across the capacitor C during switch-ON period.Also the capacitors C 2 , C 3 , and C 4 are charged to the input voltage under switch-ON condition.All the inductor current rises during switch-ON period.When switch S turned OFF, source current is equal to zero and equivalent circuit is shown in Figure 6.The stored energy in the inductors L 1 , L 2 , L 3 , and L and the capacitors C 2 , C 3 , and C 4 discharges and charges the capacitor C with the direction as shown in Figure 6.Simultaneously, current i L0 flows through the load, which is sustained by the inductor L 0 .All the inductor currents decrease during the switch-OFF period.
Under steady state, the average inductor voltages over a period are zero.Thus During switch-on period, Also The inductor current I L increases in the switch-on period and decreases in the switch-off period.The corresponding voltages across L are V 1 and −V L-OFF . Therefore, Similarly, for L 1 , L 2 , and L 3 , From switch-off period equivalent circuit, The output voltage, current, and voltage transfer gain are summarized below Average voltages are Average currents are Table 1 illustrates the comparison between the analyzed DC-DC converters with the classical boost converter.From the table, it is clear that the proposed converter topology produces higher output DC voltage.

Closed-Loop Controller for Proposed Boost Converter
Closed-loop control scheme for the proposed DC-DC boost converter topology is shown in Figures 7 and 8.The control  scheme essentially consists of only one voltage sensor with simple control structure when compared with classical DC-DC boost converter which requires both voltage and current sensors.DC voltage of the load is fed back and compared with V dc reference voltage and the error is given to the PI controller to stabilize the error and the signal obtained from the controller is the modulating signal for the PWM scheme.Signal from the PI controller is compared with high frequency ramp signal to produce required pulse for the Nchannel MOSFET switch to obtain the reference DC voltage at the load.In this paper, for the above model of the converter [12,13] using the Ziegler-Nichols method 1 is (S-shaped curve technique) applied to design the PI controller.
Step input is applied to the plant model and the response is the S shaped curve.By drawing the tangent to the Sshaped curve at its inflection point with reference to Xaxis, the time delay L and time constant Tare calculated.Using [12] Ziegler-Nichols chart, the value of the K p and T i is calculated.The PI controller designed by the above method is tested under different disturbance conditions and results are provided for the feasibility.Closed control schemes for both topologies are the same and tuning parametersK p and K i are different.

Simulation Results
Simulation results of the proposed DC-DC boost converter topologies with simplified controller scheme are presented       second, for analyzing the line disturbance performance.Figure 12 shows the load resistance variation applied to topology-I, initially 48 ohms are maintained and introduced a change to 44 ohms at 0.05 second, for analyzing the load disturbance performance.Figure 13   the output voltage stabilized in 0.005 second for both distortion conditions by the closed-loop controller.Figure 14 illustrates the output current for topology-I under line and load disturbances, as load resistance decreases from 48 ohms to 44 ohms at 0.05 second the load current increases from 1.875 amperes to 2.045 amperes.
Figure 15 depicts the output voltage of the converter at rated condition, maintaining 120 volts at 44 ohms load resistance and the corresponding output current of 2.7272 amperes is shown in Figure 16. Figure 17 shows the line voltage variation applied to topology-I, initially 10 volts are maintained and introduced a change to 9 volts at 0.02 second, for analyzing the line disturbance performance.Figure 18 shows the load resistance variation applied to topology-I, initially 48 ohms are maintained and introduced a change to 44 ohms at 0.04 second, for analyzing the load disturbance performance.Figure 19 illustrates the output voltage for topology-I under both line and load disturbances, the output voltage stabilized in 0.005 second for both distortion conditions by the closed-loop controller.to 44 ohms at 0.05 second the load current increases from 2.5 amperes to 2.7272 amperes.

Effectiveness of the Proposed Converter
The effectiveness of the proposed converter topologies is shown in Table 2 by comparing the simulation results with classical boost converter.It is seen from Table 2 that the output voltage varies from 33.33 volts to 300 volts for topology-I and 44.44 volts to 400 volts for topology-II, respectively, for a duty ratio of 0.1 to 0.9.However, the classical converter produces only a maximum of 90 volts.This shows that the proposed converter provides higher output voltage.

Conclusions
A new series of DC-DC boost converter topologies are proposed.The topologies use voltage lift technique to obtain higher output voltage than the classical boost converter for the same duty ratio.The technique also overcomes the effect of parasitic elements and minimizes the ripple in the output voltage.A simplified controller with one sensor is designed to maintain the output voltage at the required level for the load and line disturbances.Simulation results validate the theoretical analysis.The proposed converter topologies find application in computer peripheral circuits, medical equipments, and industrial applications which require higher DC voltages.

Figure 7 :
Figure 7: Closed-loop controller for topology-I DC-DC boost converter.

Figure 9 :
Figure 9: Output voltage at rated condition for topology-I.

Figure 10 :Figure 11 :
Figure 10: Output current at rated condition for topology-I.

Figure 12 :
Figure 12: Load disturbance at 0.06 second for the topology-I.

Figure 9 Figure 13 :Figure 14 :
Figure9depicts the output voltage of the converter at rated condition, maintaining 90 volts at 44 ohms load resistance, and the corresponding output current of 2.045 amperes is shown in Figure10.Figure11shows the line voltage variation applied to topology-I, initially 10 volts is maintained and introduced a change to 9 volts at 0.03

Figure 15 :
Figure 15: Output voltage at rated condition for topology-II.

Figure 19 :Figure 20 :
Figure 19: Output voltage of the topology-II for line and load disturbances.

Table 1 :
Performance comparison of the proposed DC-DC boost converter with classical boost converter.

Table 2 :
Comparison of simulation result of the proposed converters with classical converter at steady state condition for rated load.
Figure 17: Line disturbance at 0.02 second for topology-II.