Simulated Annealing Technique for Routing in a Rectangular Mesh Network

In the process of automatic design for printed circuit boards (PCBs), the phase following cell placement is routing. On the other hand, routing process is a notoriously difficult problem, and even the simplest routing problem which consists of a set of two-pin nets is known to be NP-complete. In this research, our routing region is first tessellated into a uniformN x ×N y array of square cells. The ultimate goal for a routing problem is to achieve complete automatic routing with minimal need for any manual intervention. Therefore, shortest path for all connections needs to be established. While classical Dijkstra’s algorithm guarantees to find shortest path for a single net, each routed net will form obstacles for later paths. This will add complexities to route later nets and make its routing longer than the optimal path or sometimes impossible to complete. Today’s sequential routing often applies heuristic method to further refine the solution. Through this process, all nets will be rerouted in different order to improve the quality of routing. Because of this, we are motivated to apply simulated annealing, one of the metaheuristic methods to our routing model to produce better candidates of sequence.


Introduction
In electronic design automation (EDA), wire routing or simply called routing is one of the most important steps in the design of VLSI integrated circuits and robot path planning.The connections for each pair of pins (sometimes called terminals or nodes) on the circuit must satisfy the design rules.High quality routing will give a great impact on the chip performance.Due it its importance and pervasive applications, researchers have shown a high interest in this problem and are studying extensively to improve the optimality and efficiency.An optimal routing should provide minimum cost, shortest distance, or lowest running time.
Suppose we are given a netlist and each net in the list consists of a pair of processing elements.This processing element is also sometimes referred to as node, processing node, or pin in the literature.For  2 number of pins, there will be at most /2 nets to be routed.However, in real problem, most of the time, the number of connections is usually less than /2 nets because sometimes some of the pins are not assigned to be connected to any other pins.But we restrict ourselves to have maximum number of nets which is /2 and propose a method to achieve 100% routing while satisfying the routing requirements.
However, it is almost impossible to have all /2 nets routed in one layer especially when  is large.In this paper, our goal is to propose a method to minimize layers in rectangular mesh network while satisfying the routing requirements.In order to do this, we need to maximize number of connections in each layer and thus it is important to have each net routed in shortest way.The complexity of a routing region is bounded by limitations of the number of processors and the energy level, and this energy level highly depends on the netlist.
Routing problem is an interesting topic and is being studied extensively among researchers.Several problems that have been addressed in this field include providing deadlockfree routing scheme [1], obstacle-aware routing problem with net length constraints [2], and also longest path for each net with the presence of obstacles [3].Most of routing algorithm in this field is an extension of Lee's algorithm [4][5][6].Even though it guarantees to find minimum cost possible path if it exists, its searching nature based on wave propagation is slow.Therefore, we are motivated to propose another routing algorithm based on stochastic optimization using simulated annealing technique and Dijkstra's algorithm to solve shortest path part of the problem.Our proposed routing algorithm can be applied to problems of any dimensions.
This paper can be organized as follows.Section 2 states the problem and discusses our routing layout model.Section 3 explains the shortest path problem which uses Dijkstra's algorithm and the implementation of simulated annealing technique to the problem.The simulated work and whole results are discussed in Section 4. The paper concludes with conclusion in Section 5.

Problem Statement
Routing in printed circuit board (PCB) is a process of determining and prescribing paths between various electronic components in order to establish a connection between given source point and its target.Routing in modern chip is a notoriously difficult problem, and even the simplest routing problem which consists of a set of two-pin nets is known to be NP-complete [7].
In this problem, our routing region is assumed to be divided uniformly into   ×   square cells and each cell contains  pins.Unless stated otherwise,  is assumed to be 1.With focus on wiring, we shall assume the location of pins has been specified.This process is as illustrated in Figure 1.
Suppose we are given a set of routing requirements which consist of two-pin nets  = { 1 ,  2 , . . .,   }, where  1 = ( 1 ,  1 ),  2 = ( 2 ,  2 ), . . .,   = ( ,   ) with  and  being source and target pins, respectively.The ultimate goal of this routing problem is to minimize number of layers needed to perform complete routing.In order to do this, we first seek the maximum number of interconnected structures for set of nets  for each layer(s) while minimizing level of congestion throughout the region.The objective function for this problem can be defined as where   = { 1 nonblocking 0 blocking,   =  ×  matrix representing order and pair,  = total number of nets,  = order,  = nets. ( Minimizing energy level is also one of the objectives.In order to calculate the energy level in the routing region, we simply replace   with   , so the energy function becomes where  is the sequence ( can be referred to as number of iterations too).Complete wiring on this mesh network should obey the design rules and satisfy the necessary conditions as follows.
(i) Consider (ii) For each   , there must be exactly one connection only.
(iii) All paths can cross but should not overlap each other.
(iv) Each connection will be made using the communication links with no specific direction.This allows for a simpler representation of the routing configuration, even though it reduces freedom during routing.
As a result of its importance to the industry, we are motivated to produce significant method to perform optimal routing.Figure 2 illustrates the conceptual structure of 4 × 4 rectangular mesh model.
The major features of this grid model are described as follows.
(i) We define  ×  =  2 as the network size.For 4 × 4 model, we designated an ID for each pin in the first row as 1, 2, 3, and 4, respectively, with the upper left corner as 1 and the upper right corner as 4. Similarly, the ID for each pin in the last row were 13, 14, 15, and 16, respectively, with the lower left corner as 13 and the lower right corner as 16.Therefore, each pin in the network will have a unique ID. (ii) All pins can communicate with each other to the left, right, upward, or downward direction as long as the path is not overlapped.(iii) Each connection is independent of other connections.(iv) Each pin will belong to only one net.(v) Only one pin could log data in a given subbus at a time.This operation was performed sequentially and depended highly on the net ordering.Therefore, earlier connection would block later paths.(vi) For the sake of simplicity, each link in the network held a value of 1 as its weight.

Routing Model
Shortest path problem is one of the components in our research work.Basically, this problem seeks the solution to this question: How can processor  be connected to processor  in such a way that it has the minimum distance travelled?
The prototype of most nowadays shortest path problem was actually the travelling salesman problem (TSP).In TSP, the salesman needs to perform a complete tour starting from a point, passing each station only once, and coming back to the starting point while minimizing the distance travelled.

Shortest Path Procedure.
In our problem, it is important to have all pins connected in shortest way since reducing the energy level in routing region is one of our objectives.
In this way, we can provide larger routing space to route remaining nets, thus maximizing number of successive nets on each layer.Several shortest path algorithms have been proposed in literature such as Dijkstra's algorithm which solves single-source problem [8].However, all the weights in the graph should be given in positive value.Otherwise, it will lead to acyclic graphs in which most of the time cannot provide the right shortest path.Bellman and Ford improve Dijkstra's algorithm deficiency by producing Bellman-Ford algorithm which works on negative weights [9,10].Floyd-Warshall algorithm solves all pairs of shortest path and uses matrix to update all the path values [11,12].We decided to use Dijkstra's algorithm as the tool to solve shortest path problem due to several reasons.
(i) Our connected graph which is in the form of rectangular array will not use negative values as its weight.(ii) We only need to find a single path connecting processors  and  in a time; therefore Floyd-Washall's algorithm may not be suitable.
In Dijkstra's algorithm, suppose we are given a connected directed or undirected graph  = {, }, where  is the set of all vertices and  is the weight at every edge representing cost or time.This algorithm works by solving subproblem , which searches the path between the source vertex and all adjacent vertices.Dijkstra's algorithm begins by assigning initial value to each node in the graph and improves them step by step.

Heuristics Improvement.
Traditionally, routing in rectangular array can be performed sequentially or concurrently.Sequential routing is perhaps the most straightforward strategy where one has to select specific net ordering and route the nets one by one according to the order.In this research, we would like to apply the sequential routing approach.Therefore, the quality of the routing solution will greatly depend on the net ordering and the task to find such net ordering has proven to be NP-hard [13].While Dijkstra's algorithm guarantees to find shortest path for a single net, each routed net will form obstacles for later paths.This will add complexities to route later nets and make its routing longer than optimal path or sometimes impossible to complete.Today's sequential routing often applies heuristic method used to conduct rip-up and reroute process to further refine the solution.Through this process, the connections for some nets will be removed and rerouted in different order to improve routing quality.Because of this, we are motivated to apply simulated annealing, one of the metaheuristic methods to our routing model to produce better candidates of sequence.

Simulated Annealing Routing Algorithm.
In this research, a heuristic method called simulated annealing is proposed to produce better quality net ordering.It is a probabilistic method which is first simulated by Metropolis et al. and Kirkpatrick et al. [14,15].This algorithm now has become a very useful tool in solving a variety of combinatorial optimization problems.
This method is motivated from the theory of annealing in solids.The term simulated annealing derives from the roughly analogous physical process of heating and then slowly cooling a substance to obtain a strong crystalline structure [14].The parameters that have been used in this study are as follows.
(2) Initial temperature  0 = 100 ∘ C.This high temperature is to allow a move to almost all potential neighbourhood solutions.
(3) Final temperature   ≅ 0 ∘ C. When the temperature reaches zero or near to zero, the probability of acceptance also will be near to zero and there is almost no chance of accepting worst moves.
(4) Temperature reduction rules are   =  −1 .The temperature decrement is set to geometric decrement where   is current temperature and  −1 is previous iteration temperature.In [6], experience has shown that the best suitable value of  should be 0.8 <  < 0.99.If  value is set too small, the system will rapidly cool and may contain trapped local minimum.If  value is set too high, the cooling procedure will take a longer time as the system will be running more iterations until it reaches the stopping criteria.Therefore, here we choose  = 0.95.
(5) Moves are based on pairwise interchange for two nets randomly.
(6) Only one solution is chosen as neighbouring solution at a time.
During the simulation, the temperature will be lowered gradually until the system "freezes" and no further changes occur.At each temperature, the simulation must proceed long enough for the system to reach steady state or thermal equilibrium.This method avoids being trapped at local minima by accepting sometimes uphill moves.This acceptance is determined by using Boltzman probability: where Δ is the difference costs between the current solution and previous one while   is current temperature.For a given annealing schedule of temperature  = { 1 ,  2 , . ..}, our implemented simulated annealing algorithm is given as follows.
(1) Determine an initial sequence for all to be routed nets, called  0 .Set  =  0 .
(2) Then Dijkstra's algorithm is applied to compute shortest path for each net.For each   , assign to every node a tentative distance value: set it to zero for our initial nodes and to infinity for all other nodes.
(3) Mark all nodes as unvisited.Set the initial node as current.For the current node, consider all of its unvisited neighbors and calculate their tentative distances.Compare the newly calculated tentative distance to the current assigned value and assign the smaller one.
(4) When we are done considering all of the neighbors of the current node, mark the current node as visited.
A visited node will never be checked again.
(5) If   has been marked as visited, then compute (  ,   ).If   is not reached, therefore a blockage has occurred.Abandon the net and continue with the next net in .Repeat the process for every net in .
(6) Compute initial energy,  0 , using (2).Compute the number of successful routed nets,   .Mark that sequence as "accept." (7) From , generate new sequence by swapping any two different elements randomly.

Simulation Results
Through the objective function in (1), we would like to illustrate how the equation works.Suppose we are given a routing region of size 3 × 3 and the net requirement is as follows: Table 1 illustrates the calculation for number of  (successful routed nets in certain order).
For example, suppose we are given a routing region of size 4 × 4 and the net requirement is as follows: Table 2 illustrates the process.At the second iteration,  1 is swapped with  5 producing the sequence  5 ,  2 ,  3 ,  4 ,  1 .Through this sequence, the number of blocked nets is reduced; thus number of  is increased even though  is increasing too.However, as the process continues, the value of  will gradually be lowered into an optimal and acceptable result.Notice that  reflects the total length of wire needed to perform wiring in PCB and the complexity/congestion in that routing region.Our proposed algorithm has been implemented by using Microsoft Visual C++ 2010 [16] and run on an Intel Core2 Duo CPU 2.00 GHz machine with 3 GB memory.We first tested our simulation program to problem size of 4 2 with 16 pins and random 8 nets to be routed.Graph in Figure 3 summarizes the process.Our algorithm improves the maximum number of  up to 6 nets out of 8 at as early as iteration number 6 and no best result was obtained after that.Therefore, for this problem, these six nets will be routed on the first layer and the remaining two nets on the second layer to achieve complete routing.
Figure 4 shows energy level improvement among all acceptable moves and the lowest energy level recoded for  = 6 was  = 17 which takes about only 70.83% from overall routing layout.By accepting some uphill moves based on Boltzman's probability, a less congested routing layout has been generated.Further, our program has been tested to a bigger data set which has 64 pins and 32 nets on 8 × 8 network size.From the graph in Figure 5, the maximum number of  matching or connections was obtained only after iteration number 24 which is when  = 29.20 ∘ .This is due to large number of nets and complicated routing requirements.Therefore, when  is large, the program is allowed to iterate further.Since our program takes less than a second to generate solution at each iteration, allowing the program to continue for a longer time does not really affect the computational time.
Recall, our objective is to maximize number of connections while minimizing the energy level.However, move that resulting to maximum connections is always accepted, neglecting its energy level.But if current value of  is not optimal, it will gradually decrease to an acceptable one as the program continues.As in Figure 6, the lowest energy level recoded for  = 8 at  = 22 is  = 67.
Then the annealing process is repeated to find maximum matching on second layer among remaining 10 nets. Figure 7 shows maximum number of  obtained at every iteration.As we can see, the algorithm is able to route all remaining 10 nets at 8th iteration.Thus, only two layers are needed to perform complete routing for this respective requirement for  = 8.
A clear result of accepting several worst moves with condition results to a lower energy level and this is summarized in Figure 8.
Figure 9 illustrates the whole wiring tracks for each layer.Both layers take less than 60% of the routing region.Therefore, the congestion level on the first and second floor is balanced.Therefore, the overhead cost is reduced and, from the electrical view, each layer holds quite the same amount of heat transfer and thus the performance is improved.This suggests that our algorithm is suitable for adoption into a real problem.
Our proposed algorithm manages to produce high number of connections in various network sizes with less congestion level throughout the region.Therefore, it suggests that this method is suitable for adoption into real problem.

Conclusion
This paper has described a basic routing model which usually uses rectangular grid array as routing layout.This routing     graph can be modeled as  = {, }, where  represents a node and (, V) represents the grid edge or boundary between nodes  and V.In this paper, we propose a method to maximize the number of connections in  ×  grid consisting of an array of mesh connected processing elements (PEs) with /2 number of nets.Notice that each net will be routed sequentially.Therefore, once a net is routed, it will block later path and this will add more complexities to route remaining nets.In order to overcome this, an intelligent heuristic based algorithm using annealing technique has been built to produce better net ordering to further refine the sequence.Together, we infuse the classical shortest path method into the algorithm as the tool to provide shortest route for each net.Our simulation results show that our proposed algorithm is able to minimize number of layers for a complete PCB routing by first maximizing number of connections at each layer.We also provide a low energy level throughout the routing layout by having all nets routed in shortest way.The results also show that accepting some uphill moves with Boltzman's probability leads to a better result and this is how our heuristic algorithm works.For further research, we would like to do some modifications and improvements on the net ordering.

( 8 )
Set  =   and repeat Steps 2-5.Evaluate the new energy for the new sequence, (  ) and the new (  ).

)
Accept the candidate sequence as a current solution, and set  =   , () = (  ) and  =   .Using reducing parameter,  = 0.95, update the temperature counters and parameters.Set  =  + 1,  +1 =   and repeat Step 7. If the total number of iterations or epochs is less than , where  is the specified number to control the number of elapsed iterations, go to Step 7. Otherwise, stop.

Figure 5 :
Figure 5: (a) Number of connections at all iterations.(b) Number of connections among acceptable moves.

Figure 6 :
Figure 6: The algorithm gradually decreases the energy level among  = 22.

Figure 7 :Figure 8 :
Figure 7: Number of connections at all iterations on second layer.

Figure 9 :
Figure 9: Final wiring tracks on each layer.

Table 1 :
Calculation for maximizing number of .

Table 2 :
Calculation of energy level in a routing region.